Add common code for o2dnt and o2dnt2 based boards and add different board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and O3DNT boards. Signed-off-by: Anatolij Gustschin <agust@denx.de>master
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#
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# (C) Copyright 2005-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS-y := $(BOARD).o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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/*
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* Partially derived from board code for digsyMTC, |
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* (C) Copyright 2009 |
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* Grzegorz Bernacki, Semihalf, gjb@semihalf.com |
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* |
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* (C) Copyright 2012 |
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* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc5xxx.h> |
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#include <asm/processor.h> |
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#include <asm/io.h> |
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#include <libfdt.h> |
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#include <fdt_support.h> |
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#include <i2c.h> |
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#include <miiphy.h> |
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#include <net.h> |
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#include <pci.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define SDRAM_MODE 0x00CD0000 |
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#define SDRAM_CONTROL 0x504F0000 |
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#define SDRAM_CONFIG1 0xD2322800 |
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#define SDRAM_CONFIG2 0x8AD70000 |
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enum ifm_sensor_type { |
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O2DNT = 0x00, /* !< O2DNT 32MB */ |
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O2DNT2 = 0x01, /* !< O2DNT2 64MB */ |
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O3DNT = 0x02, /* !< O3DNT 32MB */ |
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O3DNT_MIN = 0x40, /* !< O3DNT Minerva 32MB */ |
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UNKNOWN = 0xff, /* !< Unknow sensor */ |
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}; |
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static enum ifm_sensor_type gt_ifm_sensor_type; |
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#ifndef CONFIG_SYS_RAMBOOT |
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static void sdram_start(int hi_addr) |
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{ |
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struct mpc5xxx_sdram *sdram = (struct mpc5xxx_sdram *)MPC5XXX_SDRAM; |
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long hi_addr_bit = hi_addr ? 0x01000000 : 0; |
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long control = SDRAM_CONTROL | hi_addr_bit; |
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/* unlock mode register */ |
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out_be32(&sdram->ctrl, control | 0x80000000); |
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/* precharge all banks */ |
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out_be32(&sdram->ctrl, control | 0x80000002); |
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/* auto refresh */ |
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out_be32(&sdram->ctrl, control | 0x80000004); |
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/* set mode register */ |
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out_be32(&sdram->mode, SDRAM_MODE); |
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/* normal operation */ |
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out_be32(&sdram->ctrl, control); |
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} |
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#endif |
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/*
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* ATTENTION: Although partially referenced initdram does NOT make real use |
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* use of CONFIG_SYS_SDRAM_BASE. The code does not work if |
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* CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. |
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*/ |
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phys_size_t initdram(int board_type) |
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{ |
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struct mpc5xxx_mmap_ctl *mmap_ctl = |
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(struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; |
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struct mpc5xxx_sdram *sdram = (struct mpc5xxx_sdram *)MPC5XXX_SDRAM; |
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ulong dramsize = 0; |
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ulong dramsize2 = 0; |
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uint svr, pvr; |
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if (gt_ifm_sensor_type == O2DNT2) { |
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/* activate SDRAM CS1 */ |
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setbits_be32((void *)MPC5XXX_GPS_PORT_CONFIG, 0x80000000); |
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} |
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#ifndef CONFIG_SYS_RAMBOOT |
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ulong test1, test2; |
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/* setup SDRAM chip selects */ |
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out_be32(&mmap_ctl->sdram0, 0x0000001E); /* 2 GB at 0x0 */ |
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out_be32(&mmap_ctl->sdram1, 0x00000000); /* disabled */ |
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/* setup config registers */ |
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out_be32(&sdram->config1, SDRAM_CONFIG1); |
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out_be32(&sdram->config2, SDRAM_CONFIG2); |
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/* find RAM size using SDRAM CS0 only */ |
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sdram_start(0); |
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test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x08000000); |
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sdram_start(1); |
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test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x08000000); |
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if (test1 > test2) { |
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sdram_start(0); |
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dramsize = test1; |
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} else { |
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dramsize = test2; |
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} |
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/* memory smaller than 1MB is impossible */ |
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if (dramsize < (1 << 20)) |
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dramsize = 0; |
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/* set SDRAM CS0 size according to the amount of RAM found */ |
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if (dramsize > 0) { |
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out_be32(&mmap_ctl->sdram0, |
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(0x13 + __builtin_ffs(dramsize >> 20) - 1)); |
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} else { |
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out_be32(&mmap_ctl->sdram0, 0); /* disabled */ |
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} |
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/* let SDRAM CS1 start right after CS0 */ |
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out_be32(&mmap_ctl->sdram1, dramsize + 0x0000001E); /* 2G */ |
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/* find RAM size using SDRAM CS1 only */ |
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if (!dramsize) |
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sdram_start(0); |
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test2 = test1 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), |
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0x80000000); |
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if (!dramsize) { |
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sdram_start(1); |
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test2 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), |
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0x80000000); |
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} |
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if (test1 > test2) { |
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sdram_start(0); |
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dramsize2 = test1; |
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} else { |
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dramsize2 = test2; |
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} |
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/* memory smaller than 1MB is impossible */ |
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if (dramsize2 < (1 << 20)) |
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dramsize2 = 0; |
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/* set SDRAM CS1 size according to the amount of RAM found */ |
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if (dramsize2 > 0) { |
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out_be32(&mmap_ctl->sdram1, (dramsize | |
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(0x13 + __builtin_ffs(dramsize2 >> 20) - 1))); |
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} else { |
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out_be32(&mmap_ctl->sdram1, dramsize); /* disabled */ |
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} |
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#else /* CONFIG_SYS_RAMBOOT */ |
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/* retrieve size of memory connected to SDRAM CS0 */ |
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dramsize = in_be32(&mmap_ctl->sdram0) & 0xFF; |
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if (dramsize >= 0x13) |
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dramsize = (1 << (dramsize - 0x13)) << 20; |
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else |
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dramsize = 0; |
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/* retrieve size of memory connected to SDRAM CS1 */ |
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dramsize2 = in_be32(&mmap_ctl->sdram1) & 0xFF; |
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if (dramsize2 >= 0x13) |
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dramsize2 = (1 << (dramsize2 - 0x13)) << 20; |
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else |
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dramsize2 = 0; |
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#endif /* CONFIG_SYS_RAMBOOT */ |
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/*
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* On MPC5200B we need to set the special configuration delay in the |
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* DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM |
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* Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190: |
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* |
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* "The SDelay should be written to a value of 0x00000004. It is |
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* required to account for changes caused by normal wafer processing |
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* parameters." |
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*/ |
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svr = get_svr(); |
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pvr = get_pvr(); |
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if ((SVR_MJREV(svr) >= 2) && |
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(PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) |
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out_be32(&sdram->sdelay, 0x04); |
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return dramsize + dramsize2; |
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} |
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#define GPT_GPIO_IN 0x4 |
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int checkboard(void) |
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{ |
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struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT; |
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unsigned char board_config = 0; |
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int i; |
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/* switch gpt0 - gpt7 to input */ |
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for (i = 0; i < 7; i++) |
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out_be32(&gpt[i].emsr, GPT_GPIO_IN); |
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/* get configuration byte on timer-port */ |
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for (i = 0; i < 7; i++) |
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board_config |= (in_be32(&gpt[i].sr) & 0x100) >> (8 - i); |
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puts("Board: "); |
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switch (board_config) { |
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case 0: |
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puts("O2DNT\n"); |
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gt_ifm_sensor_type = O2DNT; |
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break; |
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case 1: |
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puts("O3DNT\n"); |
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gt_ifm_sensor_type = O3DNT; |
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break; |
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case 2: |
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puts("O2DNT2\n"); |
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gt_ifm_sensor_type = O2DNT2; |
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break; |
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case 64: |
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puts("O3DNT Minerva\n"); |
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gt_ifm_sensor_type = O3DNT_MIN; |
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break; |
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default: |
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puts("Unknown\n"); |
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gt_ifm_sensor_type = UNKNOWN; |
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break; |
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} |
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return 0; |
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} |
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int board_early_init_r(void) |
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{ |
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struct mpc5xxx_lpb *lpb_regs = (struct mpc5xxx_lpb *)MPC5XXX_LPB; |
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/*
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* Now, when we are in RAM, enable flash write access for detection |
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* process. Note that CS_BOOT cannot be cleared when executing in flash. |
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*/ |
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clrbits_be32(&lpb_regs->cs0_cfg, 1); /* clear RO */ |
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/* disable CS_BOOT */ |
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clrbits_be32((void *)MPC5XXX_ADDECR, (1 << 25)); |
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/* enable CS0 */ |
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setbits_be32((void *)MPC5XXX_ADDECR, (1 << 16)); |
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return 0; |
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} |
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#define MIIM_LXT971_LED_CFG_REG 0x14 |
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#define LXT971_LED_CFG_LINK_STATUS 0x4000 |
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#define LXT971_LED_CFG_RX_TX_ACTIVITY 0x0700 |
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#define LXT971_LED_CFG_LINK_ACTIVITY 0x00D0 |
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#define LXT971_LED_CFG_PULSE_STRETCH 0x0002 |
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/*
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* Additional PHY intialization after reset in mpc5xxx_fec_init_phy() |
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*/ |
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void reset_phy(void) |
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{ |
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/*
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* Set LED configuration bits. |
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* It can't be done in misc_init_r() since FEC is not |
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* initialized at this time. Therefore we do it here. |
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*/ |
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miiphy_write("FEC", CONFIG_PHY_ADDR, MIIM_LXT971_LED_CFG_REG, |
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LXT971_LED_CFG_LINK_STATUS | |
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LXT971_LED_CFG_RX_TX_ACTIVITY | |
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LXT971_LED_CFG_LINK_ACTIVITY | |
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LXT971_LED_CFG_PULSE_STRETCH); |
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} |
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#if defined(CONFIG_POST) |
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/*
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* Reads GPIO pin PSC6_3. A keypress is reported, if PSC6_3 is low. If PSC6_3 |
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* is left open, no keypress is detected. |
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*/ |
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int post_hotkeys_pressed(void) |
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{ |
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *) MPC5XXX_GPIO; |
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/*
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* Configure PSC6_1 and PSC6_3 as GPIO. PSC6 then couldn't be used in |
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* CODEC or UART mode. Consumer IrDA should still be possible. |
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*/ |
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clrbits_be32(&gpio->port_config, 0x07000000); |
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setbits_be32(&gpio->port_config, 0x03000000); |
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/* Enable GPIO for GPIO_IRDA_1 (IR_USB_CLK pin) = PSC6_3 */ |
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setbits_be32(&gpio->simple_gpioe, 0x20000000); |
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/* Configure GPIO_IRDA_1 as input */ |
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clrbits_be32(&gpio->simple_ddr, 0x20000000); |
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return (in_be32(&gpio->simple_ival) & 0x20000000) ? 0 : 1; |
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} |
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#endif |
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#ifdef CONFIG_PCI |
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static struct pci_controller hose; |
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void pci_init_board(void) |
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{ |
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pci_mpc5xxx_init(&hose); |
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} |
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#endif |
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
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#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) |
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static void ft_adapt_flash_base(void *blob) |
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{ |
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flash_info_t *dev = &flash_info[0]; |
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int off; |
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struct fdt_property *prop; |
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int len; |
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u32 *reg, *reg2; |
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off = fdt_node_offset_by_compatible(blob, -1, "fsl,mpc5200b-lpb"); |
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if (off < 0) { |
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printf("Could not find fsl,mpc5200b-lpb node.\n"); |
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return; |
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} |
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/* found compatible property */ |
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prop = fdt_get_property_w(blob, off, "ranges", &len); |
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if (prop) { |
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reg = reg2 = (u32 *)&prop->data[0]; |
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reg[2] = dev->start[0]; |
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reg[3] = dev->size; |
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fdt_setprop(blob, off, "ranges", reg2, len); |
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} else |
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printf("Could not find ranges\n"); |
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} |
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extern ulong flash_get_size(phys_addr_t base, int banknum); |
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/* Update the flash baseaddr settings */ |
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int update_flash_size(int flash_size) |
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{ |
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struct mpc5xxx_mmap_ctl *mm = |
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(struct mpc5xxx_mmap_ctl *) CONFIG_SYS_MBAR; |
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flash_info_t *dev; |
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int i; |
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int size = 0; |
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unsigned long base = 0x0; |
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u32 *cs_reg = (u32 *)&mm->cs0_start; |
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for (i = 0; i < 2; i++) { |
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dev = &flash_info[i]; |
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if (dev->size) { |
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/* calculate new base addr for this chipselect */ |
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base -= dev->size; |
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out_be32(cs_reg, START_REG(base)); |
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cs_reg++; |
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out_be32(cs_reg, STOP_REG(base, dev->size)); |
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cs_reg++; |
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/* recalculate the sectoraddr in the cfi driver */ |
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size += flash_get_size(base, i); |
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} |
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} |
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flash_protect_default(); |
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gd->bd->bi_flashstart = base; |
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return 0; |
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} |
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#endif /* defined(CONFIG_SYS_UPDATE_FLASH_SIZE) */ |
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void ft_board_setup(void *blob, bd_t *bd) |
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{ |
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int phy_addr = CONFIG_PHY_ADDR; |
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char eth_path[] = "/soc5200@f0000000/mdio@3000/ethernet-phy@0"; |
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ft_cpu_setup(blob, bd); |
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#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) |
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#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE |
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/* Update reg property in all nor flash nodes too */ |
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fdt_fixup_nor_flash_size(blob); |
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#endif |
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ft_adapt_flash_base(blob); |
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#endif |
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/* fix up the phy address */ |
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do_fixup_by_path(blob, eth_path, "reg", &phy_addr, sizeof(int), 0); |
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} |
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ |
@ -0,0 +1,80 @@ |
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/*
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* (C) Copyright 2012 |
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* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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*/ |
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/*
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* Valid values for CONFIG_SYS_TEXT_BASE are: |
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* 0xFC000000 boot low boot high (standard configuration) |
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* 0x00100000 boot from RAM (for testing only) |
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*/ |
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#ifndef CONFIG_SYS_TEXT_BASE |
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#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ |
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#endif |
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/* Board specific flash config */ |
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#define CONFIG_SYS_FLASH_BASE 0xfc000000 |
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#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ |
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/* max number of sectors on one chip */ |
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#define CONFIG_SYS_MAX_FLASH_SECT 512 |
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/*
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* Include common defines for all ifm boards |
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*/ |
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#include "o2dnt-common.h" |
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/* additional commands */ |
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#define CONFIG_CMD_ITEST |
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/*
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* GPIO configuration: |
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* CS1 SDRAM activate + no CAN + no PCI |
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*/ |
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#define CONFIG_SYS_GPS_PORT_CONFIG 0x8000A004 |
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/* Other board specific configs */ |
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#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 |
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#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 |
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#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
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#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* 1 - 127 MB in DRAM */ |
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#define CONFIG_BOARD_NAME "o2d" |
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#define CONFIG_BOARD_BOOTCMD "run dhcp_boot" |
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#define CONFIG_BOARD_MEM_LIMIT xstr(126) |
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#define BOARD_POST_CRC32_END xstr(0x01000000) |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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CONFIG_IFM_DEFAULT_ENV_SETTINGS \
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CONFIG_IFM_DEFAULT_ENV_OLD \
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CONFIG_IFM_DEFAULT_ENV_NEW \
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"linbot=fc060000\0" \
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"lintop=fc15ffff\0" \
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"rambot=fc160000\0" \
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"ramtop=fc55ffff\0" \
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"jffbot=fc560000\0" \
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"jfftop=fcffffff\0" \
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"ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \
|
||||
"ubotop=fc03ffff\0" \
|
||||
"kernel_addr=0xfc060000\0" \
|
||||
"ramdisk_addr=0xfc160000\0" \
|
||||
"progCram=tftp ${fileaddr} ${cramfsname};" \
|
||||
"erase ${rambot} ${ramtop};" \
|
||||
"cp.b ${fileaddr} ${rambot} ${filesize}\0" \
|
||||
"flash_for_configs=22396\0" \
|
||||
"flash_mtd=run mtd_args addip addmem;" \
|
||||
"bootm ${kernel_addr}\0" \
|
||||
"mtd_args=setenv bootargs root=/dev/mtdblock3 " \
|
||||
"rw rootfstype=cramfs\0" \
|
||||
"master=mw f0000b00 0x8005A006;mw f0000b0c ${IOpin};" \
|
||||
"mw f0000b04 ${IOpin};mw f0000b10 0x20\0" \
|
||||
"dhcp_boot=run dhcpcmd;run flash_mtd\0" \
|
||||
"hostname=IFM_SENSOR\0" \
|
||||
"netretry=once\0" \
|
||||
"autoload=no\0" \
|
||||
"sensorType=O2D222AG\0" |
@ -0,0 +1,84 @@ |
||||
/*
|
||||
* (C) Copyright 2012 |
||||
* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/*
|
||||
* Valid values for CONFIG_SYS_TEXT_BASE are: |
||||
* 0xFC000000 boot low boot high (standard configuration) |
||||
* 0x00100000 boot from RAM (for testing only) |
||||
*/ |
||||
#ifndef CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ |
||||
#endif |
||||
|
||||
/* Board specific flash config */ |
||||
#define CONFIG_SYS_FLASH_BASE 0xfc000000 |
||||
#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ |
||||
/* max number of sectors on one chip */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 512 |
||||
|
||||
/*
|
||||
* Include common defines for all ifm boards |
||||
*/ |
||||
#include "o2dnt-common.h" |
||||
|
||||
/*
|
||||
* GPIO configuration: |
||||
* CS1 SDRAM activate + no CAN + no PCI |
||||
*/ |
||||
#define CONFIG_SYS_GPS_PORT_CONFIG 0x8000A004 |
||||
|
||||
/* Other board specific configs */ |
||||
#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* 1 - 127 MB in DRAM */ |
||||
|
||||
/* Use redundant environment */ |
||||
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) |
||||
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
||||
|
||||
#define CONFIG_BOARD_NAME "o2d300" |
||||
#define CONFIG_BOARD_BOOTCMD "run dhcp_boot" |
||||
#define CONFIG_BOARD_MEM_LIMIT xstr(126) |
||||
#define BOARD_POST_CRC32_END xstr(0x02000000) |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
CONFIG_IFM_DEFAULT_ENV_SETTINGS \
|
||||
CONFIG_IFM_DEFAULT_ENV_OLD \
|
||||
CONFIG_IFM_DEFAULT_ENV_NEW \
|
||||
"autoload=no\0" \
|
||||
"dhcp_boot=run dhcpcmd;run flash_mtd\0" \
|
||||
"flash_mtd=run mtd_args addip addmem;" \
|
||||
"bootm ${kernel_addr}\0" \
|
||||
"mtd_args=setenv bootargs root=/dev/mtdblock4 " \
|
||||
"rw rootfstype=cramfs\0" \
|
||||
"linbot=fc080000\0" \
|
||||
"lintop=fc17ffff\0" \
|
||||
"rambot=fc180000\0" \
|
||||
"ramtop=fc57ffff\0" \
|
||||
"jffbot=fc580000\0" \
|
||||
"jfftop=fd39ffff\0" \
|
||||
"ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \
|
||||
"ubotop=fc03ffff\0" \
|
||||
"halname="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME"_halcon\0" \
|
||||
"halbot=fd3a0000\0" \
|
||||
"haltop=fdf9ffff\0" \
|
||||
"progHal=tftp 200000 ${halname};erase ${halbot} ${haltop};" \
|
||||
"cp.b ${fileaddr} ${halbot} ${filesize}\0" \
|
||||
"kernel_addr=0xfc060000\0" \
|
||||
"ramdisk_addr=0xfc160000\0" \
|
||||
"master=mw f0000b00 0x8005A006;mw f0000b0c ${IOpin};" \
|
||||
"mw f0000b04 ${IOpin};mw f0000b10 0x20\0" \
|
||||
"netretry=once\0" \
|
||||
"protcmd=protect on ${linbot} ${lintop};" \
|
||||
"protect on ${rambot} ${ramtop}\0" \
|
||||
"o2derror=def_env\0" \
|
||||
"sensorType=O2D300AA\0" |
@ -0,0 +1,379 @@ |
||||
/*
|
||||
* Common configuration options for ifm camera boards |
||||
* |
||||
* (C) Copyright 2005 |
||||
* Sebastien Cazaux, ifm electronic gmbh |
||||
* |
||||
* (C) Copyright 2012 |
||||
* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __O2D_CONFIG_H |
||||
#define __O2D_CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
*/ |
||||
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
||||
#define CONFIG_MPC5200 |
||||
|
||||
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* running at 33.000000MHz */ |
||||
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
||||
#if defined(CONFIG_CMD_KGDB) |
||||
/* log base 2 of the above value */ |
||||
#define CONFIG_SYS_CACHELINE_SHIFT 5 |
||||
#endif |
||||
|
||||
/*
|
||||
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ |
||||
CONFIG_SYS_POST_I2C) |
||||
*/ |
||||
|
||||
#ifdef CONFIG_POST |
||||
/* preserve space for the post_word at end of on-chip SRAM */ |
||||
#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) |
||||
#endif |
||||
|
||||
/*
|
||||
* Serial console configuration |
||||
*/ |
||||
#define CONFIG_PSC_CONSOLE 5 /* console is on PSC5 */ |
||||
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
||||
#define CONFIG_SYS_BAUDRATE_TABLE \ |
||||
{ 9600, 19200, 38400, 57600, 115200, 230400 } |
||||
|
||||
/*
|
||||
* PCI Mapping: |
||||
* 0x40000000 - 0x4fffffff - PCI Memory |
||||
* 0x50000000 - 0x50ffffff - PCI IO Space |
||||
*/ |
||||
#undef CONFIG_PCI |
||||
#define CONFIG_PCI_PNP 1 |
||||
|
||||
#define CONFIG_PCI_MEM_BUS 0x40000000 |
||||
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS |
||||
#define CONFIG_PCI_MEM_SIZE 0x10000000 |
||||
|
||||
#define CONFIG_PCI_IO_BUS 0x50000000 |
||||
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS |
||||
#define CONFIG_PCI_IO_SIZE 0x01000000 |
||||
|
||||
#define CONFIG_SYS_XLB_PIPELINING 1 |
||||
|
||||
/* Partitions */ |
||||
#define CONFIG_MAC_PARTITION |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_ISO_PARTITION |
||||
|
||||
#define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
||||
|
||||
#define CONFIG_SYS_ALT_MEMTEST /* Much more complex memory test */ |
||||
|
||||
/*
|
||||
* Supported commands |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_EEPROM |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_I2C |
||||
#define CONFIG_CMD_MII |
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_DHCP |
||||
#ifdef CONFIG_PCI |
||||
#define CONFIG_CMD_PCI |
||||
#endif |
||||
#ifdef CONFIG_POST |
||||
#define CONFIG_CMD_DIAG |
||||
#endif |
||||
|
||||
#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000) |
||||
/* Boot low with 16 or 32 MB Flash */ |
||||
#define CONFIG_SYS_LOWBOOT 1 |
||||
#elif (CONFIG_SYS_TEXT_BASE != 0x00100000) |
||||
#error "CONFIG_SYS_TEXT_BASE value is invalid" |
||||
#endif |
||||
|
||||
/*
|
||||
* Autobooting |
||||
* Be selective on what keys can delay or stop the autoboot process |
||||
* To stop use: "++++++++++" |
||||
*/ |
||||
#define CONFIG_AUTOBOOT_KEYED |
||||
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ |
||||
"press password to stop\n", bootdelay |
||||
#define CONFIG_AUTOBOOT_STOP_STR "++++++++++" |
||||
#undef CONFIG_AUTOBOOT_DELAY_STR |
||||
#define DEBUG_BOOTKEYS 0 |
||||
|
||||
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
||||
|
||||
#define CONFIG_PREBOOT "run master" |
||||
|
||||
#undef CONFIG_BOOTARGS |
||||
|
||||
#define xstr(s) str(s) |
||||
#define str(s) #s |
||||
|
||||
#if !defined(CONFIG_CONSOLE_DEV) |
||||
#define CONFIG_CONSOLE_DEV "ttyPSC1" |
||||
#endif |
||||
|
||||
/*
|
||||
* Default environment for booting old and new kernel versions |
||||
*/ |
||||
#define CONFIG_IFM_DEFAULT_ENV_OLD \ |
||||
"flash_self_old=run ramargs addip addmem;" \
|
||||
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
|
||||
"flash_nfs_old=run nfsargs addip addmem;" \
|
||||
"bootm ${kernel_addr}\0" \
|
||||
"net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
|
||||
"run nfsargs addip addmem;" \
|
||||
"bootm ${kernel_addr_r}\0" |
||||
|
||||
#define CONFIG_IFM_DEFAULT_ENV_NEW \ |
||||
"fdt_addr_r=900000\0" \
|
||||
"fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0" \
|
||||
"flash_self=run ramargs addip addtty addmisc;" \
|
||||
"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
|
||||
"flash_nfs=run nfsargs addip addtty addmisc;" \
|
||||
"bootm ${kernel_addr} - ${fdt_addr}\0" \
|
||||
"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
|
||||
"tftp ${fdt_addr_r} ${fdt_file}; " \
|
||||
"run nfsargs addip addtty addmisc;" \
|
||||
"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
|
||||
|
||||
#define CONFIG_IFM_DEFAULT_ENV_SETTINGS \ |
||||
"IOpin=0x64\0" \
|
||||
"addip=setenv bootargs ${bootargs} " \
|
||||
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
|
||||
":${hostname}:${netdev}:off panic=1\0" \
|
||||
"addmem=setenv bootargs ${bootargs} ${memlimit}\0" \
|
||||
"addmisc=sete bootargs ${bootargs} ${miscargs}\0" \
|
||||
"addtty=sete bootargs ${bootargs} console=" \
|
||||
CONFIG_CONSOLE_DEV ",${baudrate}\0" \
|
||||
"bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
|
||||
"kernel_addr_r=600000\0" \
|
||||
"initrd_high=0x03e00000\0" \
|
||||
"memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0" \
|
||||
"memtest=mtest 0x00100000 "xstr(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
|
||||
"netdev=eth0\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=${serverip}:${rootpath}\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
|
||||
"progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
|
||||
"cp.b ${fileaddr} ${linbot} ${filesize}\0" \
|
||||
"ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
|
||||
"progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};" \
|
||||
"cp.b ${fileaddr} ${rambot} ${filesize}\0" \
|
||||
"jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0" \
|
||||
"progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};" \
|
||||
"cp.b ${fileaddr} ${jffbot} ${filesize}\0" \
|
||||
"rootpath=/opt/eldk/ppc_6xx\0" \
|
||||
"uboname=" CONFIG_BOARD_NAME \
|
||||
"/u-boot.bin_" CONFIG_BOARD_NAME "_act\0" \
|
||||
"progubo=tftp 200000 ${uboname};" \
|
||||
"protect off ${ubobot} ${ubotop};" \
|
||||
"erase ${ubobot} ${ubotop};" \
|
||||
"cp.b ${fileaddr} ${ubobot} ${filesize}\0" \
|
||||
"unlock=yes\0" \
|
||||
"post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;" \
|
||||
"setenv bootdelay 1;" \
|
||||
"crc32 "xstr(CONFIG_SYS_TEXT_BASE)" " \
|
||||
BOARD_POST_CRC32_END";" \
|
||||
"setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0" |
||||
|
||||
#define CONFIG_BOOTCOMMAND "run post" |
||||
|
||||
/*
|
||||
* IPB Bus clocking configuration. |
||||
*/ |
||||
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ |
||||
|
||||
#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) |
||||
/*
|
||||
* PCI Bus clocking configuration |
||||
* |
||||
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if |
||||
* CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock |
||||
* of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. |
||||
*/ |
||||
#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ |
||||
#endif |
||||
|
||||
/*
|
||||
* I2C configuration |
||||
*/ |
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
||||
#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 or #2 */ |
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ |
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F |
||||
|
||||
/*
|
||||
* EEPROM configuration: |
||||
* |
||||
* O2DNT board is equiped with Ramtron FRAM device FM24CL16 |
||||
* 16 Kib Ferroelectric Nonvolatile serial RAM memory |
||||
* organized as 2048 x 8 bits and addressable as eight I2C devices |
||||
* 0x50 ... 0x57 each 256 bytes in size |
||||
* |
||||
*/ |
||||
#define CONFIG_SYS_I2C_FRAM |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */ |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 |
||||
/*
|
||||
* There is no write delay with FRAM, write operations are performed at bus |
||||
* speed. Thus, no status polling or write delay is needed. |
||||
*/ |
||||
|
||||
/*
|
||||
* Flash configuration |
||||
*/ |
||||
#define CONFIG_SYS_FLASH_CFI 1 |
||||
#define CONFIG_FLASH_CFI_DRIVER 1 |
||||
#define CONFIG_FLASH_16BIT |
||||
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
||||
#define CONFIG_SYS_FLASH_CFI_AMD_RESET |
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO |
||||
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ |
||||
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } |
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Erase Timeout (in ms) */ |
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (in ms) */ |
||||
/* Timeout for Flash Clear Lock Bits (in ms) */ |
||||
#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 |
||||
/* "Real" (hardware) sectors protection */ |
||||
#define CONFIG_SYS_FLASH_PROTECTION |
||||
|
||||
/*
|
||||
* Environment settings |
||||
*/ |
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
#define CONFIG_ENV_SIZE 0x20000 |
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 |
||||
#define CONFIG_ENV_OVERWRITE 1 |
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) |
||||
|
||||
/*
|
||||
* Memory map |
||||
*/ |
||||
#define CONFIG_SYS_MBAR 0xF0000000 |
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000 |
||||
#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 |
||||
|
||||
/* Use SRAM until RAM will be available */ |
||||
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM |
||||
#ifdef CONFIG_POST |
||||
/* preserve space for the post_word at end of on-chip SRAM */ |
||||
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE |
||||
#else |
||||
/* End of used area in DPRAM */ |
||||
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE |
||||
#endif |
||||
|
||||
/* size in bytes reserved for initial data */ |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 |
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ |
||||
CONFIG_SYS_GBL_DATA_SIZE) |
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* 192 kB for Monitor */ |
||||
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */ |
||||
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial map for Linux */ |
||||
|
||||
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
||||
#define CONFIG_SYS_RAMBOOT 1 |
||||
#endif |
||||
|
||||
/*
|
||||
* Ethernet configuration |
||||
*/ |
||||
#define CONFIG_MPC5xxx_FEC |
||||
#define CONFIG_MPC5xxx_FEC_MII100 |
||||
#define CONFIG_PHY_ADDR 0x00 |
||||
#define CONFIG_RESET_PHY_R |
||||
|
||||
/*
|
||||
* GPIO configuration |
||||
*/ |
||||
#define CONFIG_SYS_GPIO_DATADIR 0x00000064 /* PSC1_2, PSC2_1,2 output */ |
||||
#define CONFIG_SYS_GPIO_OPENDRAIN 0x00000000 /* No open drain */ |
||||
#define CONFIG_SYS_GPIO_DATAVALUE 0x00000000 /* PSC1_1 to 1, rest to 0 */ |
||||
#define CONFIG_SYS_GPIO_ENABLE 0x00000064 /* PSC1_2, PSC2_1,2 enable */ |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
||||
#define CONFIG_CMDLINE_EDITING |
||||
#define CONFIG_SYS_HUSH_PARSER |
||||
|
||||
#if defined(CONFIG_CMD_KGDB) |
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
/* Print Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
||||
sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
/* max number of command args */ |
||||
#define CONFIG_SYS_MAXARGS 16 |
||||
/* Boot Argument Buffer Size */ |
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
||||
|
||||
/* default load address */ |
||||
#define CONFIG_SYS_LOAD_ADDR 0x100000 |
||||
|
||||
/* decrementer freq: 1 ms ticks */ |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/*
|
||||
* Various low-level settings |
||||
*/ |
||||
#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI |
||||
#define CONFIG_SYS_HID0_FINAL HID0_ICE |
||||
|
||||
#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE |
||||
#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE |
||||
#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE |
||||
#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE |
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_R |
||||
|
||||
#define CONFIG_SYS_CS_BURST 0x00000000 |
||||
#define CONFIG_SYS_CS_DEADCYCLE 0x33333333 |
||||
|
||||
/*
|
||||
* DT support |
||||
*/ |
||||
#define CONFIG_OF_LIBFDT 1 |
||||
#define CONFIG_OF_BOARD_SETUP 1 |
||||
|
||||
#define OF_CPU "PowerPC,5200@0" |
||||
#define OF_SOC "soc5200@f0000000" |
||||
#define OF_TBCLK (bd->bi_busfreq / 4) |
||||
|
||||
#endif /* __O2D_CONFIG_H */ |
@ -0,0 +1,72 @@ |
||||
/*
|
||||
* (C) Copyright 2012 |
||||
* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/*
|
||||
* Valid values for CONFIG_SYS_TEXT_BASE are: |
||||
* 0xFC000000 boot low boot high (standard configuration) |
||||
* 0x00100000 boot from RAM (for testing only) |
||||
*/ |
||||
#ifndef CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ |
||||
#endif |
||||
|
||||
/* Board specific flash config */ |
||||
#define CONFIG_SYS_FLASH_BASE 0xfc000000 |
||||
#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ |
||||
/* max number of sectors on one chip */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 512 |
||||
|
||||
/*
|
||||
* Include common defines for all ifm boards |
||||
*/ |
||||
#include "o2dnt-common.h" |
||||
|
||||
/* additional commands */ |
||||
#define CONFIG_CMD_ITEST |
||||
|
||||
/*
|
||||
* GPIO configuration: |
||||
* CS1 SDRAM activate + no CAN + no PCI |
||||
*/ |
||||
#define CONFIG_SYS_GPS_PORT_CONFIG 0x8000A004 |
||||
|
||||
/* Other board specific configs */ |
||||
#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* 1 - 127 MB in DRAM */ |
||||
|
||||
#define CONFIG_BOARD_NAME "o2dnt2" |
||||
#define CONFIG_BOARD_BOOTCMD "run flash_self" |
||||
#define CONFIG_BOARD_MEM_LIMIT xstr(126) |
||||
#define BOARD_POST_CRC32_END xstr(0x01000000) |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
CONFIG_IFM_DEFAULT_ENV_SETTINGS \
|
||||
CONFIG_IFM_DEFAULT_ENV_OLD \
|
||||
CONFIG_IFM_DEFAULT_ENV_NEW \
|
||||
"linbot=fc060000\0" \
|
||||
"lintop=fc15ffff\0" \
|
||||
"rambot=fc160000\0" \
|
||||
"ramtop=fc55ffff\0" \
|
||||
"jffbot=fc560000\0" \
|
||||
"jfftop=fce5ffff\0" \
|
||||
"ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \
|
||||
"ubotop=fc03ffff\0" \
|
||||
"calname="CONFIG_BOARD_NAME"/uCal_"CONFIG_BOARD_NAME"_act\0" \
|
||||
"calbot=fce60000\0" \
|
||||
"caltop=fcffffff\0" \
|
||||
"progCal=tftp 200000 ${calname};erase ${calbot} ${caltop};" \
|
||||
"cp.b ${fileaddr} ${calbot} ${filesize}\0" \
|
||||
"kernel_addr=0xfc060000\0" \
|
||||
"ramdisk_addr=0xfc160000\0" \
|
||||
"master=mw f0000b00 0x8005A006;mw f0000b0c ${IOpin};" \
|
||||
"mw f0000b04 ${IOpin};mw f0000b10 0x20\0" |
@ -0,0 +1,69 @@ |
||||
/*
|
||||
* (C) Copyright 2012 |
||||
* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/*
|
||||
* Valid values for CONFIG_SYS_TEXT_BASE are: |
||||
* 0xFF000000 boot low boot high (standard configuration) |
||||
* 0x00100000 boot from RAM (for testing only) |
||||
*/ |
||||
#ifndef CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_TEXT_BASE 0xff000000 /* Standard: boot low */ |
||||
#endif |
||||
|
||||
/* Board specific flash config */ |
||||
#define CONFIG_SYS_FLASH_BASE 0xff000000 |
||||
#define CONFIG_SYS_FLASH_SIZE 0x01000000 /* maximum 16MB */ |
||||
/* max number of sectors on one chip */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 |
||||
|
||||
/*
|
||||
* Include common defines for all ifm boards |
||||
*/ |
||||
#include "o2dnt-common.h" |
||||
|
||||
/* GPIO configuration */ |
||||
#define CONFIG_SYS_GPS_PORT_CONFIG 0x00002006 /* no CAN */ |
||||
|
||||
/* Other board specific configs */ |
||||
#define CONFIG_SYS_BOOTCS_CFG 0x00087801 |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xff000000 |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 - 63 MB in DRAM */ |
||||
|
||||
#define CONFIG_BOARD_NAME "o2i" |
||||
#define CONFIG_BOARD_BOOTCMD "run dhcp_boot" |
||||
#define CONFIG_BOARD_MEM_LIMIT xstr(62) |
||||
#define BOARD_POST_CRC32_END xstr(0x01000000) |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
CONFIG_IFM_DEFAULT_ENV_SETTINGS \
|
||||
CONFIG_IFM_DEFAULT_ENV_OLD \
|
||||
CONFIG_IFM_DEFAULT_ENV_NEW \
|
||||
"linbot=ff060000\0" \
|
||||
"lintop=ff15ffff\0" \
|
||||
"rambot=ff160000\0" \
|
||||
"ramtop=ff55ffff\0" \
|
||||
"jffbot=ff560000\0" \
|
||||
"jfftop=ffebffff\0" \
|
||||
"kernel_addr=0xff060000\0" \
|
||||
"ramdisk_addr=0xff160000\0" \
|
||||
"ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \
|
||||
"ubotop=ff03ffff\0" \
|
||||
"autoload=no\0" \
|
||||
"dhcp_boot=run dhcpcmd; run flash_mtd\0" \
|
||||
"hostname=IFM_SENSOR\0" \
|
||||
"flash_mtd=run mtd_args addip addmem;bootm ${kernel_addr}\0" \
|
||||
"mtd_args=setenv bootargs root=/dev/mtdblock3 " \
|
||||
"rw rootfstype=cramfs\0" \
|
||||
"sensorType=O2I100AA\0" \
|
||||
"netretry=once\0" \
|
||||
"master=mw f0000b00 0x00052006;mw f0000b0c ${IOpin};" \
|
||||
"mw f0000b04 ${IOpin};mw f0000b10 0x20\0" |
@ -0,0 +1,77 @@ |
||||
/*
|
||||
* (C) Copyright 2012 |
||||
* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/*
|
||||
* Valid values for CONFIG_SYS_TEXT_BASE are: |
||||
* 0xFF000000 boot low boot high (standard configuration) |
||||
* 0x00100000 boot from RAM (for testing only) |
||||
*/ |
||||
#ifndef CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_TEXT_BASE 0xff000000 /* Standard: boot low */ |
||||
#endif |
||||
|
||||
/* Board specific flash config */ |
||||
#define CONFIG_SYS_FLASH_BASE 0xff000000 |
||||
#define CONFIG_SYS_FLASH_SIZE 0x01000000 /* maximum 16MB */ |
||||
/* max number of sectors on one chip */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 |
||||
|
||||
/*
|
||||
* Include common defines for all ifm boards |
||||
*/ |
||||
#include "o2dnt-common.h" |
||||
|
||||
/* GPIO configuration */ |
||||
#define CONFIG_SYS_GPS_PORT_CONFIG 0x00002004 /* no CAN */ |
||||
|
||||
/* Other board specific configs */ |
||||
#define CONFIG_NETCONSOLE |
||||
|
||||
#define CONFIG_SYS_BOOTCS_CFG 0x00087801 |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xff000000 |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 - 63 MB in DRAM */ |
||||
|
||||
#define CONFIG_BOARD_NAME "o2mnt" |
||||
#define CONFIG_BOARD_BOOTCMD "${newcmd}" |
||||
#define CONFIG_BOARD_MEM_LIMIT xstr(62) |
||||
#define BOARD_POST_CRC32_END xstr(0x01000000) |
||||
|
||||
#ifndef CONFIG_IFM_SENSOR_TYPE |
||||
#define CONFIG_IFM_SENSOR_TYPE "O2M110" |
||||
#endif |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
CONFIG_IFM_DEFAULT_ENV_SETTINGS \
|
||||
CONFIG_IFM_DEFAULT_ENV_OLD \
|
||||
CONFIG_IFM_DEFAULT_ENV_NEW \
|
||||
"linbot=ff060000\0" \
|
||||
"lintop=ff25ffff\0" \
|
||||
"rambot=ff260000\0" \
|
||||
"ramtop=ffc5ffff\0" \
|
||||
"jffbot=ffc60000\0" \
|
||||
"jfftop=ffffffff\0" \
|
||||
"ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \
|
||||
"ubotop=ff03ffff\0" \
|
||||
"kernel_addr=0xff060000\0" \
|
||||
"ramdisk_addr=0xff260000\0" \
|
||||
"newcmd=run scrprot;run flash_ext2\0" \
|
||||
"scrprot=protect on ${linbot} ${lintop};protect on ${rambot} " \
|
||||
"${ramtop}\0" \
|
||||
"flash_ext2=run ext2args addip addmem;bootm ${kernel_addr}\0" \
|
||||
"ext2args=setenv bootargs root=/dev/mtdblock3 ro " \
|
||||
"rootfstype=ext2\0" \
|
||||
"pwm=mw f0000674 0x10006;mw f0000678 0x30000;" \
|
||||
"mw f0000678 0x30001;mw f0000670 0x3\0" \
|
||||
"master=mw f0000b00 0x00052006;mw f0000b0c $(IOpin);" \
|
||||
"mw f0000b04 $(IOpin);mw f0000b10 0x24;run pwm\0" \
|
||||
"sensortyp="CONFIG_IFM_SENSOR_TYPE"\0" \
|
||||
"srelease=0.00\0" |
@ -0,0 +1,73 @@ |
||||
/*
|
||||
* (C) Copyright 2012 |
||||
* DENX Software Engineering, Anatolij Gustschin <agust@denx.de> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/*
|
||||
* Valid values for CONFIG_SYS_TEXT_BASE are: |
||||
* 0xFC000000 boot low boot high (standard configuration) |
||||
* 0x00100000 boot from RAM (for testing only) |
||||
*/ |
||||
#ifndef CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ |
||||
#endif |
||||
|
||||
/* Board specific flash config */ |
||||
#define CONFIG_SYS_FLASH_BASE 0xfc000000 |
||||
#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ |
||||
/* max number of sectors on one chip */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 512 |
||||
|
||||
/*
|
||||
* Include common defines for all ifm boards |
||||
*/ |
||||
#include "o2dnt-common.h" |
||||
|
||||
/* Additional commands */ |
||||
#define CONFIG_CMD_BSP |
||||
#define CONFIG_CMD_REGINFO |
||||
|
||||
/*
|
||||
* GPIO configuration: |
||||
* no CAN + no PCI |
||||
*/ |
||||
#define CONFIG_SYS_GPS_PORT_CONFIG 0x0000A000 |
||||
|
||||
/* Other board specific configs */ |
||||
#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 - 63 MB in DRAM */ |
||||
|
||||
#define CONFIG_BOARD_NAME "o3dnt" |
||||
#define CONFIG_BOARD_BOOTCMD "run flash_self" |
||||
#define CONFIG_BOARD_MEM_LIMIT xstr(62) |
||||
#define BOARD_POST_CRC32_END xstr(0x01000000) |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
CONFIG_IFM_DEFAULT_ENV_SETTINGS \
|
||||
CONFIG_IFM_DEFAULT_ENV_OLD \
|
||||
CONFIG_IFM_DEFAULT_ENV_NEW \
|
||||
"linbot=fc060000\0" \
|
||||
"lintop=fc15ffff\0" \
|
||||
"rambot=fc160000\0" \
|
||||
"ramtop=fc55ffff\0" \
|
||||
"jffbot=fc560000\0" \
|
||||
"jfftop=fce5ffff\0" \
|
||||
"ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \
|
||||
"ubotop=fc03ffff\0" \
|
||||
"calname="CONFIG_BOARD_NAME"/uCal_"CONFIG_BOARD_NAME"_act\0" \
|
||||
"calbot=fce60000\0" \
|
||||
"caltop=fcffffff\0" \
|
||||
"progCal=tftp 200000 ${calname};erase ${calbot} ${caltop};" \
|
||||
"cp.b ${fileaddr} ${calbot} ${filesize}\0" \
|
||||
"kernel_addr=0xfc060000\0" \
|
||||
"ramdisk_addr=0xfc160000\0" \
|
||||
"master=mw f0000b00 0x0005A006;mw f0000b0c ${IOpin};" \
|
||||
"mw f0000b04 ${IOpin};mw f0000b10 0x20\0" |
Loading…
Reference in new issue