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@ -66,7 +66,7 @@ static void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd) |
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static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte) |
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{ |
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struct nand_chip *this = mtdinfo->priv; |
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ulong base = (ulong) this->IO_ADDR_W; |
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ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; |
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if (hwctl & 0x1) |
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out8(base + NDFC_CMD, byte); |
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@ -79,7 +79,7 @@ static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte) |
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static u_char ndfc_read_byte(struct mtd_info *mtdinfo) |
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{ |
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struct nand_chip *this = mtdinfo->priv; |
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ulong base = (ulong) this->IO_ADDR_W; |
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ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; |
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return (in8(base + NDFC_DATA)); |
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} |
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@ -87,7 +87,7 @@ static u_char ndfc_read_byte(struct mtd_info *mtdinfo) |
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static int ndfc_dev_ready(struct mtd_info *mtdinfo) |
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{ |
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struct nand_chip *this = mtdinfo->priv; |
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ulong base = (ulong) this->IO_ADDR_W; |
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ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; |
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while (!(in32(base + NDFC_STAT) & NDFC_STAT_IS_READY)) |
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; |
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@ -111,30 +111,30 @@ static int ndfc_dev_ready(struct mtd_info *mtdinfo) |
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static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len) |
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{ |
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struct nand_chip *this = mtdinfo->priv; |
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ulong base = (ulong) this->IO_ADDR_W; |
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ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; |
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uint32_t *p = (uint32_t *) buf; |
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for(;len > 0; len -= 4) |
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for (;len > 0; len -= 4) |
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*p++ = in32(base + NDFC_DATA); |
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} |
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static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) |
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{ |
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struct nand_chip *this = mtdinfo->priv; |
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ulong base = (ulong) this->IO_ADDR_W; |
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ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; |
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uint32_t *p = (uint32_t *) buf; |
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for(; len > 0; len -= 4) |
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for (; len > 0; len -= 4) |
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out32(base + NDFC_DATA, *p++); |
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} |
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static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) |
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{ |
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struct nand_chip *this = mtdinfo->priv; |
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ulong base = (ulong) this->IO_ADDR_W; |
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ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; |
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uint32_t *p = (uint32_t *) buf; |
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for(; len > 0; len -= 4) |
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for (; len > 0; len -= 4) |
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if (*p++ != in32(base + NDFC_DATA)) |
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return -1; |
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@ -142,8 +142,20 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len |
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} |
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#endif /* #ifndef CONFIG_NAND_SPL */ |
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void board_nand_select_device(struct nand_chip *nand, int chip) |
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{ |
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ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; |
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/* Set NandFlash Core Configuration Register */ |
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/* 1col x 2 rows */ |
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out32(base + NDFC_CCR, 0x00000000 | (chip << 24)); |
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} |
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void board_nand_init(struct nand_chip *nand) |
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{ |
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int chip = (ulong)nand->IO_ADDR_W & 0x00000003; |
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ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; |
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nand->eccmode = NAND_ECC_SOFT; |
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nand->hwcontrol = ndfc_hwcontrol; |
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@ -166,10 +178,11 @@ void board_nand_init(struct nand_chip *nand) |
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mtebc(pb0ap, CFG_EBC_PB0AP); |
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#endif |
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/* Set NandFlash Core Configuration Register */ |
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/* Chip select 3, 1col x 2 rows */ |
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out32(CFG_NAND_BASE + NDFC_CCR, 0x00000000 | (CFG_NAND_CS << 24)); |
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out32(CFG_NAND_BASE + NDFC_BCFG0 + (CFG_NAND_CS << 2), 0x80002222); |
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/*
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* Select required NAND chip in NDFC |
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*/ |
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board_nand_select_device(nand, chip); |
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out32(base + NDFC_BCFG0 + (chip << 2), 0x80002222); |
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} |
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#endif |
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