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@ -20,6 +20,8 @@ |
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#include <fsl_esdhc.h> |
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#include <fdt_support.h> |
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#include <asm/io.h> |
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#include <dm.h> |
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#include <asm-generic/gpio.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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@ -72,6 +74,30 @@ struct fsl_esdhc { |
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uint scr; /* eSDHC control register */ |
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}; |
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/**
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* struct fsl_esdhc_priv |
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* |
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* @esdhc_regs: registers of the sdhc controller |
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* @sdhc_clk: Current clk of the sdhc controller |
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* @bus_width: bus width, 1bit, 4bit or 8bit |
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* @cfg: mmc config |
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* @mmc: mmc |
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* Following is used when Driver Model is enabled for MMC |
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* @dev: pointer for the device |
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* @non_removable: 0: removable; 1: non-removable |
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* @cd_gpio: gpio for card detection |
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*/ |
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struct fsl_esdhc_priv { |
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struct fsl_esdhc *esdhc_regs; |
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unsigned int sdhc_clk; |
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unsigned int bus_width; |
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struct mmc_config cfg; |
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struct mmc *mmc; |
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struct udevice *dev; |
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int non_removable; |
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struct gpio_desc cd_gpio; |
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}; |
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/* Return the XFERTYP flags for a given command and data packet */ |
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static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) |
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{ |
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@ -118,8 +144,8 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) |
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static void |
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esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data) |
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{ |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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uint blocks; |
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char *buffer; |
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uint databuf; |
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@ -180,8 +206,8 @@ esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data) |
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static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) |
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{ |
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int timeout; |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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#ifdef CONFIG_FSL_LAYERSCAPE |
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dma_addr_t addr; |
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#endif |
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@ -312,8 +338,8 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
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int err = 0; |
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uint xfertyp; |
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uint irqstat; |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) |
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@ -482,9 +508,9 @@ out: |
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static void set_sysctl(struct mmc *mmc, uint clock) |
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{ |
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int div, pre_div; |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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int sdhc_clk = cfg->sdhc_clk; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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int sdhc_clk = priv->sdhc_clk; |
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uint clk; |
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if (clock < mmc->cfg->f_min) |
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@ -527,8 +553,8 @@ static void set_sysctl(struct mmc *mmc, uint clock) |
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#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK |
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static void esdhc_clock_control(struct mmc *mmc, bool enable) |
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{ |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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u32 value; |
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u32 time_out; |
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@ -556,8 +582,8 @@ static void esdhc_clock_control(struct mmc *mmc, bool enable) |
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static void esdhc_set_ios(struct mmc *mmc) |
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{ |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK |
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/* Select to use peripheral clock */ |
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@ -580,8 +606,8 @@ static void esdhc_set_ios(struct mmc *mmc) |
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static int esdhc_init(struct mmc *mmc) |
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{ |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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int timeout = 1000; |
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/* Reset the entire host controller */ |
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@ -621,14 +647,23 @@ static int esdhc_init(struct mmc *mmc) |
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static int esdhc_getcd(struct mmc *mmc) |
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{ |
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struct fsl_esdhc_cfg *cfg = mmc->priv; |
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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struct fsl_esdhc_priv *priv = mmc->priv; |
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struct fsl_esdhc *regs = priv->esdhc_regs; |
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int timeout = 1000; |
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#ifdef CONFIG_ESDHC_DETECT_QUIRK |
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if (CONFIG_ESDHC_DETECT_QUIRK) |
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return 1; |
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#endif |
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#ifdef CONFIG_DM_MMC |
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if (priv->non_removable) |
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return 1; |
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if (dm_gpio_is_valid(&priv->cd_gpio)) |
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return dm_gpio_get_value(&priv->cd_gpio); |
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#endif |
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while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) |
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udelay(1000); |
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@ -656,16 +691,29 @@ static const struct mmc_ops esdhc_ops = { |
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.getcd = esdhc_getcd, |
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}; |
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int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) |
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static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, |
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struct fsl_esdhc_priv *priv) |
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{ |
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if (!cfg || !priv) |
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return -EINVAL; |
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priv->esdhc_regs = (struct fsl_esdhc *)(unsigned long)(cfg->esdhc_base); |
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priv->bus_width = cfg->max_bus_width; |
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priv->sdhc_clk = cfg->sdhc_clk; |
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return 0; |
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}; |
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static int fsl_esdhc_init(struct fsl_esdhc_priv *priv) |
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{ |
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struct fsl_esdhc *regs; |
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struct mmc *mmc; |
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u32 caps, voltage_caps; |
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if (!cfg) |
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return -1; |
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if (!priv) |
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return -EINVAL; |
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regs = (struct fsl_esdhc *)cfg->esdhc_base; |
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regs = priv->esdhc_regs; |
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/* First reset the eSDHC controller */ |
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esdhc_reset(regs); |
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@ -676,7 +724,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) |
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#endif |
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writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); |
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memset(&cfg->cfg, 0, sizeof(cfg->cfg)); |
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memset(&priv->cfg, 0, sizeof(priv->cfg)); |
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voltage_caps = 0; |
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caps = esdhc_read32(®s->hostcapblt); |
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@ -698,47 +746,83 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) |
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if (caps & ESDHC_HOSTCAPBLT_VS33) |
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voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34; |
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cfg->cfg.name = "FSL_SDHC"; |
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cfg->cfg.ops = &esdhc_ops; |
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priv->cfg.name = "FSL_SDHC"; |
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priv->cfg.ops = &esdhc_ops; |
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#ifdef CONFIG_SYS_SD_VOLTAGE |
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cfg->cfg.voltages = CONFIG_SYS_SD_VOLTAGE; |
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priv->cfg.voltages = CONFIG_SYS_SD_VOLTAGE; |
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#else |
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cfg->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; |
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priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; |
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#endif |
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if ((cfg->cfg.voltages & voltage_caps) == 0) { |
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if ((priv->cfg.voltages & voltage_caps) == 0) { |
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printf("voltage not supported by controller\n"); |
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return -1; |
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} |
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cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; |
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if (priv->bus_width == 8) |
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priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; |
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else if (priv->bus_width == 4) |
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priv->cfg.host_caps = MMC_MODE_4BIT; |
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priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; |
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#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE |
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cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz; |
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priv->cfg.host_caps |= MMC_MODE_DDR_52MHz; |
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#endif |
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if (cfg->max_bus_width > 0) { |
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if (cfg->max_bus_width < 8) |
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cfg->cfg.host_caps &= ~MMC_MODE_8BIT; |
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if (cfg->max_bus_width < 4) |
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cfg->cfg.host_caps &= ~MMC_MODE_4BIT; |
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if (priv->bus_width > 0) { |
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if (priv->bus_width < 8) |
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priv->cfg.host_caps &= ~MMC_MODE_8BIT; |
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if (priv->bus_width < 4) |
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priv->cfg.host_caps &= ~MMC_MODE_4BIT; |
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} |
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if (caps & ESDHC_HOSTCAPBLT_HSS) |
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cfg->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; |
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priv->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; |
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#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK |
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if (CONFIG_ESDHC_DETECT_8_BIT_QUIRK) |
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cfg->cfg.host_caps &= ~MMC_MODE_8BIT; |
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priv->cfg.host_caps &= ~MMC_MODE_8BIT; |
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#endif |
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cfg->cfg.f_min = 400000; |
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cfg->cfg.f_max = min(cfg->sdhc_clk, (u32)52000000); |
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priv->cfg.f_min = 400000; |
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priv->cfg.f_max = min(priv->sdhc_clk, (u32)52000000); |
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cfg->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; |
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priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; |
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mmc = mmc_create(&cfg->cfg, cfg); |
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mmc = mmc_create(&priv->cfg, priv); |
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if (mmc == NULL) |
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return -1; |
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priv->mmc = mmc; |
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return 0; |
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} |
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int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) |
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{ |
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struct fsl_esdhc_priv *priv; |
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int ret; |
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if (!cfg) |
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return -EINVAL; |
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priv = calloc(sizeof(struct fsl_esdhc_priv), 1); |
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if (!priv) |
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return -ENOMEM; |
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ret = fsl_esdhc_cfg_to_priv(cfg, priv); |
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if (ret) { |
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debug("%s xlate failure\n", __func__); |
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free(priv); |
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return ret; |
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} |
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ret = fsl_esdhc_init(priv); |
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if (ret) { |
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debug("%s init failure\n", __func__); |
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free(priv); |
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return ret; |
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} |
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return 0; |
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} |
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@ -819,3 +903,92 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) |
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4 + 1, 1); |
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} |
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#endif |
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#ifdef CONFIG_DM_MMC |
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#include <asm/arch/clock.h> |
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static int fsl_esdhc_probe(struct udevice *dev) |
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{ |
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
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struct fsl_esdhc_priv *priv = dev_get_priv(dev); |
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const void *fdt = gd->fdt_blob; |
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int node = dev->of_offset; |
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fdt_addr_t addr; |
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unsigned int val; |
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int ret; |
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addr = dev_get_addr(dev); |
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if (addr == FDT_ADDR_T_NONE) |
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return -EINVAL; |
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priv->esdhc_regs = (struct fsl_esdhc *)addr; |
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priv->dev = dev; |
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val = fdtdec_get_int(fdt, node, "bus-width", -1); |
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if (val == 8) |
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priv->bus_width = 8; |
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else if (val == 4) |
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priv->bus_width = 4; |
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else |
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priv->bus_width = 1; |
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if (fdt_get_property(fdt, node, "non-removable", NULL)) { |
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priv->non_removable = 1; |
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} else { |
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priv->non_removable = 0; |
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gpio_request_by_name_nodev(fdt, node, "cd-gpios", 0, |
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&priv->cd_gpio, GPIOD_IS_IN); |
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} |
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/*
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* TODO: |
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* Because lack of clk driver, if SDHC clk is not enabled, |
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* need to enable it first before this driver is invoked. |
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* |
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* we use MXC_ESDHC_CLK to get clk freq. |
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* If one would like to make this function work, |
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* the aliases should be provided in dts as this: |
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* |
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* aliases { |
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* mmc0 = &usdhc1; |
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* mmc1 = &usdhc2; |
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* mmc2 = &usdhc3; |
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* mmc3 = &usdhc4; |
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* }; |
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* Then if your board only supports mmc2 and mmc3, but we can |
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* correctly get the seq as 2 and 3, then let mxc_get_clock |
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* work as expected. |
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*/ |
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priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq); |
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if (priv->sdhc_clk <= 0) { |
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dev_err(dev, "Unable to get clk for %s\n", dev->name); |
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return -EINVAL; |
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} |
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ret = fsl_esdhc_init(priv); |
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if (ret) { |
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dev_err(dev, "fsl_esdhc_init failure\n"); |
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return ret; |
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} |
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upriv->mmc = priv->mmc; |
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return 0; |
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} |
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static const struct udevice_id fsl_esdhc_ids[] = { |
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{ .compatible = "fsl,imx6ul-usdhc", }, |
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{ .compatible = "fsl,imx6sx-usdhc", }, |
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{ .compatible = "fsl,imx6sl-usdhc", }, |
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{ .compatible = "fsl,imx6q-usdhc", }, |
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{ .compatible = "fsl,imx7d-usdhc", }, |
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{ /* sentinel */ } |
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}; |
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U_BOOT_DRIVER(fsl_esdhc) = { |
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.name = "fsl-esdhc-mmc", |
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.id = UCLASS_MMC, |
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.of_match = fsl_esdhc_ids, |
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.probe = fsl_esdhc_probe, |
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.priv_auto_alloc_size = sizeof(struct fsl_esdhc_priv), |
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|
}; |
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#endif |
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Tom Rini
9 years ago