@ -8,9 +8,9 @@
# define __AXP_MC_STATIC_H
MV_DRAM_MC_INIT ddr3_A0_db_667 [ MV_MAX_DDR3_STATIC_SIZE ] = {
# ifdef MV _DDR_32BIT
# ifdef CONFIG _DDR_32BIT
{ 0x00001400 , 0x7301c924 } , /*DDR SDRAM Configuration Register */
# else /*MV _DDR_64BIT */
# else /*CONFIG _DDR_64BIT */
{ 0x00001400 , 0x7301CA28 } , /*DDR SDRAM Configuration Register */
# endif
{ 0x00001404 , 0x3630b800 } , /*Dunit Control Low Register */
@ -66,9 +66,9 @@ MV_DRAM_MC_INIT ddr3_A0_db_667[MV_MAX_DDR3_STATIC_SIZE] = {
} ;
MV_DRAM_MC_INIT ddr3_A0_AMC_667 [ MV_MAX_DDR3_STATIC_SIZE ] = {
# ifdef MV _DDR_32BIT
# ifdef CONFIG _DDR_32BIT
{ 0x00001400 , 0x7301c924 } , /*DDR SDRAM Configuration Register */
# else /*MV _DDR_64BIT */
# else /*CONFIG _DDR_64BIT */
{ 0x00001400 , 0x7301CA28 } , /*DDR SDRAM Configuration Register */
# endif
{ 0x00001404 , 0x3630b800 } , /*Dunit Control Low Register */
@ -124,9 +124,9 @@ MV_DRAM_MC_INIT ddr3_A0_AMC_667[MV_MAX_DDR3_STATIC_SIZE] = {
} ;
MV_DRAM_MC_INIT ddr3_A0_db_400 [ MV_MAX_DDR3_STATIC_SIZE ] = {
# ifdef MV _DDR_32BIT
# ifdef CONFIG _DDR_32BIT
{ 0x00001400 , 0x73004C30 } , /*DDR SDRAM Configuration Register */
# else /* MV _DDR_64BIT */
# else /* CONFIG _DDR_64BIT */
{ 0x00001400 , 0x7300CC30 } , /*DDR SDRAM Configuration Register */
# endif
{ 0x00001404 , 0x3630B840 } , /*Dunit Control Low Register */
@ -176,9 +176,9 @@ MV_DRAM_MC_INIT ddr3_A0_db_400[MV_MAX_DDR3_STATIC_SIZE] = {
} ;
MV_DRAM_MC_INIT ddr3_Z1_db_600 [ MV_MAX_DDR3_STATIC_SIZE ] = {
# ifdef MV _DDR_32BIT
# ifdef CONFIG _DDR_32BIT
{ 0x00001400 , 0x73014A28 } , /*DDR SDRAM Configuration Register */
# else /*MV _DDR_64BIT */
# else /*CONFIG _DDR_64BIT */
{ 0x00001400 , 0x7301CA28 } , /*DDR SDRAM Configuration Register */
# endif
{ 0x00001404 , 0x3630B040 } , /*Dunit Control Low Register */
@ -233,9 +233,9 @@ MV_DRAM_MC_INIT ddr3_Z1_db_600[MV_MAX_DDR3_STATIC_SIZE] = {
} ;
MV_DRAM_MC_INIT ddr3_Z1_db_300 [ MV_MAX_DDR3_STATIC_SIZE ] = {
# ifdef MV _DDR_32BIT
# ifdef CONFIG _DDR_32BIT
{ 0x00001400 , 0x73004C30 } , /*DDR SDRAM Configuration Register */
# else /*MV _DDR_64BIT */
# else /*CONFIG _DDR_64BIT */
{ 0x00001400 , 0x7300CC30 } , /*DDR SDRAM Configuration Register */
/*{0x00001400, 0x7304CC30}, */ /*DDR SDRAM Configuration Register */
# endif