* Patch by Matthew S. McClintock, 14 Apr 2004:

fix initdram function for utx8245 board

* Patch by Markus Pietrek, 14 Apr 2004:
  use ATAG_INITRD2 instead of deprecated ATAG_INITRD tag

* Patch by Reinhard Meyer, 18 Apr 2004:
  provide the IDE Reset Function for EMK 5200 boards

* Patch by Masami Komiya, 12 Apr 2004:
  fix pci_hose_write_config_{byte,word}_via_dword problems

CHANGELOG

@@ -2,6 +2,18 @@
 Changes for U-Boot 1.1.1:
 ======================================================================
 
+* Patch by Matthew S. McClintock, 14 Apr 2004:
+  fix initdram function for utx8245 board
+
+* Patch by Markus Pietrek, 14 Apr 2004:
+  use ATAG_INITRD2 instead of deprecated ATAG_INITRD tag
+
+* Patch by Reinhard Meyer, 18 Apr 2004:
+  provide the IDE Reset Function for EMK 5200 boards
+
+* Patch by Masami Komiya, 12 Apr 2004:
+  fix pci_hose_write_config_{byte,word}_via_dword problems
+
 * Patch by Sangmoon Kim, 12 Apr 2004:
   Update max RAM size for debris board
 

board/emk/top5200/top5200.c

@@ -182,21 +182,29 @@ void pci_init_board(void)
 #endif
 
 /*****************************************************************************
- * provide the PCI Reset Function
+ * provide the IDE Reset Function
  *****************************************************************************/
-#ifdef CFG_CMD_IDE
-#define GPIO_PSC1_4	0x01000000ul
+#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+
+#define GPIO_PSC1_4	0x01000000UL
+
+void init_ide_reset (void)
+{
+	debug ("init_ide_reset\n");
+
+    	/* Configure PSC1_4 as GPIO output for ATA reset */
+	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
+	*(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC1_4;
+}
+
 void ide_set_reset (int idereset)
 {
+	debug ("ide_reset(%d)\n", idereset);
+
 	if (idereset) {
 		*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
 	} else {
-		*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA |=  GPIO_PSC1_4;
 	}
-
-	/* Configure PSC1_4 as GPIO output for ATA reset */
-	/* (it does not matter we do this every time) */
-	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
-	*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
 }
-#endif
+#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */

board/utx8245/utx8245.c

@@ -48,35 +48,30 @@ int checkboard(void)
 
 long int initdram(int board_type)
 {
-#if 1
 	long size;
 	long new_bank0_end;
+	long new_bank1_end;
 	long mear1;
 	long emear1;
-/*
-	write_bat(IBAT1, ((CFG_MAX_RAM_SIZE/2) | BATU_BL_256M | BATU_VS | BATU_VP),
-			( (CFG_MAX_RAM_SIZE/2)| BATL_PP_10 | BATL_MEMCOHERENCE));
 
-	write_bat(DBAT1, ((CFG_MAX_RAM_SIZE/2) | BATU_BL_256M | BATU_VS | BATU_VP),
-			( (CFG_MAX_RAM_SIZE/2)| BATL_PP_10 | BATL_MEMCOHERENCE));
-*/
 	size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
 
-	new_bank0_end = size - 1;
+	new_bank0_end = size/2 - 1;
+	new_bank1_end = size - 1;
 	mear1 = mpc824x_mpc107_getreg(MEAR1);
 	emear1 = mpc824x_mpc107_getreg(EMEAR1);
-	mear1 = (mear1  & 0xFFFFFF00) |
-		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
-	emear1 = (emear1 & 0xFFFFFF00) |
-		((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+
+	mear1 = (mear1  & 0xFFFF0000) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) |
+		((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8);
+	emear1 = (emear1 & 0xFFFF0000) |
+		((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) |
+		((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8);
+		
 	mpc824x_mpc107_setreg(MEAR1, mear1);
 	mpc824x_mpc107_setreg(EMEAR1, emear1);
 
 	return (size);
-#else
-	return (CFG_MAX_RAM_SIZE);
-#endif
-
 }
 
 

drivers/pci.c

@@ -103,14 +103,14 @@ int pci_hose_write_config_##size##_via_dword(struct pci_controller *hose,\
 					     pci_dev_t dev, 		\
 					     int offset, type val)	\
 {									\
-	u32 val32, mask, ldata;						\
+	u32 val32, mask, ldata, shift;					\
 									\
 	if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\
 		return -1;						\
 									\
-	mask = val_mask;						\
-	ldata = (((unsigned long)val) & mask) << ((offset & (int)off_mask) * 8);\
-	mask <<= ((mask & (int)off_mask) * 8);				\
+	shift = ((offset & (int)off_mask) * 8);				\
+	ldata = (((unsigned long)val) & val_mask) << shift;		\
+	mask = val_mask << shift;					\
 	val32 = (val32 & ~mask) | ldata;				\
 									\
 	if (pci_hose_write_config_dword(hose, dev, offset & 0xfc, val32) < 0)\

include/configs/TOP5200.h

@@ -94,7 +94,11 @@
 
 #  define CONFIG_USB_OHCI
 #  define CONFIG_USB_CLOCK	0x0001bbbb
-#  define CONFIG_USB_CONFIG	0x00005000
+#  if defined (CONFIG_EVAL5200)
+#    define CONFIG_USB_CONFIG	0x00005100
+#  else
+#    define CONFIG_USB_CONFIG	0x00001000
+#  endif
 #  define ADD_USB_CMD             CFG_CMD_USB | CFG_CMD_FAT
 #  define CONFIG_DOS_PARTITION
 #  define CONFIG_USB_STORAGE
@@ -325,7 +329,7 @@
  * PCI disabled
  * Ethernet 100 with MD
  */
-#define CFG_GPS_PORT_CONFIG	0x00058444
+#define CFG_GPS_PORT_CONFIG	0x00058044
 
 /*
  * Miscellaneous configurable options

lib_arm/armlinux.c

@@ -340,7 +340,7 @@ static void setup_initrd_tag (bd_t *bd, ulong initrd_start, ulong initrd_end)
 	/* an ATAG_INITRD node tells the kernel where the compressed
 	 * ramdisk can be found. ATAG_RDIMG is a better name, actually.
 	 */
-	params->hdr.tag = ATAG_INITRD;
+	params->hdr.tag = ATAG_INITRD2;
 	params->hdr.size = tag_size (tag_initrd);
 
 	params->u.initrd.start = initrd_start;