Wolfgang Denk
16 years ago
commit
4ace2823bc
@ -1,199 +0,0 @@ |
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/*
|
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* Copyright (C) 2006 Atmel Corporation |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/chip-features.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/memory-map.h> |
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|
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/*
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* Lots of small functions here. We depend on --gc-sections getting |
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* rid of the ones we don't need. |
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*/ |
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void gpio_enable_ebi(void) |
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{ |
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#ifdef CONFIG_SYS_HSDRAMC |
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#ifndef CONFIG_SYS_SDRAM_16BIT |
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gpio_select_periph_A(GPIO_PIN_PE0, 0); |
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gpio_select_periph_A(GPIO_PIN_PE1, 0); |
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gpio_select_periph_A(GPIO_PIN_PE2, 0); |
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gpio_select_periph_A(GPIO_PIN_PE3, 0); |
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gpio_select_periph_A(GPIO_PIN_PE4, 0); |
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gpio_select_periph_A(GPIO_PIN_PE5, 0); |
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gpio_select_periph_A(GPIO_PIN_PE6, 0); |
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gpio_select_periph_A(GPIO_PIN_PE7, 0); |
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gpio_select_periph_A(GPIO_PIN_PE8, 0); |
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gpio_select_periph_A(GPIO_PIN_PE9, 0); |
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gpio_select_periph_A(GPIO_PIN_PE10, 0); |
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gpio_select_periph_A(GPIO_PIN_PE11, 0); |
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gpio_select_periph_A(GPIO_PIN_PE12, 0); |
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gpio_select_periph_A(GPIO_PIN_PE13, 0); |
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gpio_select_periph_A(GPIO_PIN_PE14, 0); |
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gpio_select_periph_A(GPIO_PIN_PE15, 0); |
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#endif |
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gpio_select_periph_A(GPIO_PIN_PE26, 0); |
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#endif |
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} |
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|
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#ifdef AT32AP700x_CHIP_HAS_USART |
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void gpio_enable_usart0(void) |
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{ |
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gpio_select_periph_B(GPIO_PIN_PA8, 0); |
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gpio_select_periph_B(GPIO_PIN_PA9, 0); |
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} |
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void gpio_enable_usart1(void) |
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{ |
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gpio_select_periph_A(GPIO_PIN_PA17, 0); |
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gpio_select_periph_A(GPIO_PIN_PA18, 0); |
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} |
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void gpio_enable_usart2(void) |
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{ |
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gpio_select_periph_B(GPIO_PIN_PB26, 0); |
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gpio_select_periph_B(GPIO_PIN_PB27, 0); |
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} |
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void gpio_enable_usart3(void) |
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{ |
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gpio_select_periph_B(GPIO_PIN_PB17, 0); |
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gpio_select_periph_B(GPIO_PIN_PB18, 0); |
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} |
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#endif |
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#ifdef AT32AP700x_CHIP_HAS_MACB |
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void gpio_enable_macb0(void) |
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{ |
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gpio_select_periph_A(GPIO_PIN_PC3, 0); /* TXD0 */ |
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gpio_select_periph_A(GPIO_PIN_PC4, 0); /* TXD1 */ |
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gpio_select_periph_A(GPIO_PIN_PC7, 0); /* TXEN */ |
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gpio_select_periph_A(GPIO_PIN_PC8, 0); /* TXCK */ |
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gpio_select_periph_A(GPIO_PIN_PC9, 0); /* RXD0 */ |
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gpio_select_periph_A(GPIO_PIN_PC10, 0); /* RXD1 */ |
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gpio_select_periph_A(GPIO_PIN_PC13, 0); /* RXER */ |
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gpio_select_periph_A(GPIO_PIN_PC15, 0); /* RXDV */ |
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gpio_select_periph_A(GPIO_PIN_PC16, 0); /* MDC */ |
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gpio_select_periph_A(GPIO_PIN_PC17, 0); /* MDIO */ |
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#if !defined(CONFIG_RMII) |
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gpio_select_periph_A(GPIO_PIN_PC0, 0); /* COL */ |
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gpio_select_periph_A(GPIO_PIN_PC1, 0); /* CRS */ |
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gpio_select_periph_A(GPIO_PIN_PC2, 0); /* TXER */ |
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gpio_select_periph_A(GPIO_PIN_PC5, 0); /* TXD2 */ |
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gpio_select_periph_A(GPIO_PIN_PC6, 0); /* TXD3 */ |
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gpio_select_periph_A(GPIO_PIN_PC11, 0); /* RXD2 */ |
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gpio_select_periph_A(GPIO_PIN_PC12, 0); /* RXD3 */ |
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gpio_select_periph_A(GPIO_PIN_PC14, 0); /* RXCK */ |
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gpio_select_periph_A(GPIO_PIN_PC18, 0); /* SPD */ |
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#endif |
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} |
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void gpio_enable_macb1(void) |
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{ |
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gpio_select_periph_B(GPIO_PIN_PD13, 0); /* TXD0 */ |
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gpio_select_periph_B(GPIO_PIN_PD14, 0); /* TXD1 */ |
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gpio_select_periph_B(GPIO_PIN_PD11, 0); /* TXEN */ |
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gpio_select_periph_B(GPIO_PIN_PD12, 0); /* TXCK */ |
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gpio_select_periph_B(GPIO_PIN_PD10, 0); /* RXD0 */ |
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gpio_select_periph_B(GPIO_PIN_PD6, 0); /* RXD1 */ |
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gpio_select_periph_B(GPIO_PIN_PD5, 0); /* RXER */ |
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gpio_select_periph_B(GPIO_PIN_PD4, 0); /* RXDV */ |
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gpio_select_periph_B(GPIO_PIN_PD3, 0); /* MDC */ |
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gpio_select_periph_B(GPIO_PIN_PD2, 0); /* MDIO */ |
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#if !defined(CONFIG_RMII) |
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gpio_select_periph_B(GPIO_PIN_PC19, 0); /* COL */ |
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gpio_select_periph_B(GPIO_PIN_PC23, 0); /* CRS */ |
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gpio_select_periph_B(GPIO_PIN_PC26, 0); /* TXER */ |
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gpio_select_periph_B(GPIO_PIN_PC27, 0); /* TXD2 */ |
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gpio_select_periph_B(GPIO_PIN_PC28, 0); /* TXD3 */ |
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gpio_select_periph_B(GPIO_PIN_PC29, 0); /* RXD2 */ |
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gpio_select_periph_B(GPIO_PIN_PC30, 0); /* RXD3 */ |
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gpio_select_periph_B(GPIO_PIN_PC24, 0); /* RXCK */ |
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gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD */ |
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#endif |
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} |
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#endif |
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#ifdef AT32AP700x_CHIP_HAS_MMCI |
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void gpio_enable_mmci(void) |
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{ |
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gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK */ |
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gpio_select_periph_A(GPIO_PIN_PA11, 0); /* CMD */ |
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gpio_select_periph_A(GPIO_PIN_PA12, 0); /* DATA0 */ |
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gpio_select_periph_A(GPIO_PIN_PA13, 0); /* DATA1 */ |
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gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */ |
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gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ |
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} |
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#endif |
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#ifdef AT32AP700x_CHIP_HAS_SPI |
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void gpio_enable_spi0(unsigned long cs_mask) |
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{ |
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gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */ |
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gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */ |
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gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */ |
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/* Set up NPCSx as GPIO outputs, initially high */ |
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if (cs_mask & (1 << 0)) { |
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gpio_set_value(GPIO_PIN_PA3, 1); |
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gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT); |
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} |
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if (cs_mask & (1 << 1)) { |
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gpio_set_value(GPIO_PIN_PA4, 1); |
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gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT); |
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} |
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if (cs_mask & (1 << 2)) { |
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gpio_set_value(GPIO_PIN_PA5, 1); |
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gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT); |
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} |
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if (cs_mask & (1 << 3)) { |
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gpio_set_value(GPIO_PIN_PA20, 1); |
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gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT); |
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} |
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} |
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void gpio_enable_spi1(unsigned long cs_mask) |
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{ |
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gpio_select_periph_B(GPIO_PIN_PA0, 0); /* MISO */ |
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gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */ |
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gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */ |
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/* Set up NPCSx as GPIO outputs, initially high */ |
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if (cs_mask & (1 << 0)) { |
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gpio_set_value(GPIO_PIN_PB2, 1); |
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gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT); |
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} |
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if (cs_mask & (1 << 1)) { |
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gpio_set_value(GPIO_PIN_PB3, 1); |
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gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT); |
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} |
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if (cs_mask & (1 << 2)) { |
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gpio_set_value(GPIO_PIN_PB4, 1); |
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gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT); |
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} |
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if (cs_mask & (1 << 3)) { |
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gpio_set_value(GPIO_PIN_PA27, 1); |
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gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT); |
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} |
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} |
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#endif |
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@ -0,0 +1,204 @@ |
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/*
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* Copyright (C) 2006, 2008 Atmel Corporation |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/chip-features.h> |
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#include <asm/arch/memory-map.h> |
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#include <asm/arch/portmux.h> |
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/*
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* Lots of small functions here. We depend on --gc-sections getting |
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* rid of the ones we don't need. |
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*/ |
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void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width, |
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unsigned long flags, unsigned long drive_strength) |
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{ |
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unsigned long porte_mask = 0; |
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if (bus_width > 16) |
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portmux_select_peripheral(PORTMUX_PORT_E, 0xffff, |
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER); |
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if (addr_width > 23) |
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porte_mask |= (((1 << (addr_width - 23)) - 1) & 7) << 16; |
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if (flags & PORTMUX_EBI_CS(2)) |
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porte_mask |= 1 << 25; |
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if (flags & PORTMUX_EBI_CS(4)) |
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porte_mask |= 1 << 21; |
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if (flags & PORTMUX_EBI_CS(5)) |
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porte_mask |= 1 << 22; |
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if (flags & (PORTMUX_EBI_CF(0) | PORTMUX_EBI_CF(1))) |
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porte_mask |= (1 << 19) | (1 << 20) | (1 << 23); |
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portmux_select_peripheral(PORTMUX_PORT_E, porte_mask, |
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PORTMUX_FUNC_A, 0); |
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if (flags & PORTMUX_EBI_NWAIT) |
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portmux_select_peripheral(PORTMUX_PORT_E, 1 << 24, |
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PORTMUX_FUNC_A, PORTMUX_PULL_UP); |
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} |
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#ifdef AT32AP700x_CHIP_HAS_MACB |
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void portmux_enable_macb0(unsigned long flags, unsigned long drive_strength) |
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{ |
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unsigned long portc_mask; |
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portc_mask = (1 << 3) /* TXD0 */ |
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| (1 << 4) /* TXD1 */ |
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| (1 << 7) /* TXEN */ |
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| (1 << 8) /* TXCK */ |
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| (1 << 9) /* RXD0 */ |
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| (1 << 10) /* RXD1 */ |
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| (1 << 13) /* RXER */ |
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| (1 << 15) /* RXDV */ |
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| (1 << 16) /* MDC */ |
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| (1 << 17); /* MDIO */ |
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if (flags & PORTMUX_MACB_MII) |
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portc_mask |= (1 << 0) /* COL */ |
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| (1 << 1) /* CRS */ |
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| (1 << 2) /* TXER */ |
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| (1 << 5) /* TXD2 */ |
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| (1 << 6) /* TXD3 */ |
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| (1 << 11) /* RXD2 */ |
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| (1 << 12) /* RXD3 */ |
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| (1 << 14); /* RXCK */ |
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if (flags & PORTMUX_MACB_SPEED) |
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portc_mask |= (1 << 18);/* SPD */ |
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/* REVISIT: Some pins are probably pure outputs */ |
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portmux_select_peripheral(PORTMUX_PORT_C, portc_mask, |
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER); |
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} |
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void portmux_enable_macb1(unsigned long flags, unsigned long drive_strength) |
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{ |
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unsigned long portc_mask = 0; |
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unsigned long portd_mask; |
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portd_mask = (1 << 13) /* TXD0 */ |
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| (1 << 14) /* TXD1 */ |
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| (1 << 11) /* TXEN */ |
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| (1 << 12) /* TXCK */ |
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| (1 << 10) /* RXD0 */ |
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| (1 << 6) /* RXD1 */ |
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| (1 << 5) /* RXER */ |
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| (1 << 4) /* RXDV */ |
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| (1 << 3) /* MDC */ |
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| (1 << 2); /* MDIO */ |
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if (flags & PORTMUX_MACB_MII) |
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portc_mask = (1 << 19) /* COL */ |
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| (1 << 23) /* CRS */ |
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| (1 << 26) /* TXER */ |
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| (1 << 27) /* TXD2 */ |
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| (1 << 28) /* TXD3 */ |
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| (1 << 29) /* RXD2 */ |
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| (1 << 30) /* RXD3 */ |
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| (1 << 24); /* RXCK */ |
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if (flags & PORTMUX_MACB_SPEED) |
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portd_mask |= (1 << 15);/* SPD */ |
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/* REVISIT: Some pins are probably pure outputs */ |
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portmux_select_peripheral(PORTMUX_PORT_D, portc_mask, |
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER); |
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portmux_select_peripheral(PORTMUX_PORT_C, portc_mask, |
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER); |
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} |
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#endif |
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|
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#ifdef AT32AP700x_CHIP_HAS_MMCI |
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void portmux_enable_mmci(unsigned int slot, unsigned long flags, |
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unsigned long drive_strength) |
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{ |
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unsigned long mask; |
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unsigned long portmux_flags = PORTMUX_PULL_UP; |
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|
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/* First, the common CLK signal. It doesn't need a pull-up */ |
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portmux_select_peripheral(PORTMUX_PORT_A, 1 << 10, |
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PORTMUX_FUNC_A, 0); |
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|
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if (flags & PORTMUX_MMCI_EXT_PULLUP) |
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portmux_flags = 0; |
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|
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/* Then, the per-slot signals */ |
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switch (slot) { |
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case 0: |
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mask = (1 << 11) | (1 << 12); /* CMD and DATA0 */ |
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if (flags & PORTMUX_MMCI_4BIT) |
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/* DATA1..DATA3 */ |
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mask |= (1 << 13) | (1 << 14) | (1 << 15); |
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portmux_select_peripheral(PORTMUX_PORT_A, mask, |
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PORTMUX_FUNC_A, portmux_flags); |
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break; |
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case 1: |
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mask = (1 << 6) | (1 << 7); /* CMD and DATA0 */ |
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if (flags & PORTMUX_MMCI_4BIT) |
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/* DATA1..DATA3 */ |
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mask |= (1 << 8) | (1 << 9) | (1 << 10); |
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portmux_select_peripheral(PORTMUX_PORT_B, mask, |
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PORTMUX_FUNC_B, portmux_flags); |
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break; |
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} |
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} |
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#endif |
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|
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#ifdef AT32AP700x_CHIP_HAS_SPI |
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void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength) |
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{ |
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unsigned long pin_mask; |
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|
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/* MOSI and SCK */ |
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portmux_select_peripheral(PORTMUX_PORT_A, (1 << 1) | (1 << 2), |
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PORTMUX_FUNC_A, 0); |
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/* MISO may float */ |
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portmux_select_peripheral(PORTMUX_PORT_A, 1 << 0, |
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER); |
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|
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/* Set up NPCSx as GPIO outputs, initially high */ |
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pin_mask = (cs_mask & 7) << 3; |
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if (cs_mask & (1 << 3)) |
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pin_mask |= 1 << 20; |
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|
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portmux_select_gpio(PORTMUX_PORT_A, pin_mask, |
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PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); |
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} |
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|
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void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength) |
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{ |
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/* MOSI and SCK */ |
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portmux_select_peripheral(PORTMUX_PORT_B, (1 << 1) | (1 << 5), |
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PORTMUX_FUNC_B, 0); |
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/* MISO may float */ |
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portmux_select_peripheral(PORTMUX_PORT_B, 1 << 0, |
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER); |
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|
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/* Set up NPCSx as GPIO outputs, initially high */ |
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portmux_select_gpio(PORTMUX_PORT_B, (cs_mask & 7) << 2, |
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PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); |
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portmux_select_gpio(PORTMUX_PORT_A, (cs_mask & 8) << (27 - 3), |
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PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); |
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} |
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#endif |
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@ -1,116 +0,0 @@ |
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/*
|
||||
* Copyright (C) 2006 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
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#include <common.h> |
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|
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#include <asm/io.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/memory-map.h> |
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|
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#include "pio2.h" |
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|
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void gpio_select_periph_A(unsigned int pin, int use_pullup) |
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{ |
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void *base = gpio_pin_to_addr(pin); |
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uint32_t mask = 1 << (pin & 0x1f); |
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|
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if (!base) |
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panic("Invalid GPIO pin %u\n", pin); |
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|
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pio2_writel(base, ASR, mask); |
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pio2_writel(base, PDR, mask); |
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if (use_pullup) |
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pio2_writel(base, PUER, mask); |
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else |
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pio2_writel(base, PUDR, mask); |
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} |
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|
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void gpio_select_periph_B(unsigned int pin, int use_pullup) |
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{ |
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void *base = gpio_pin_to_addr(pin); |
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uint32_t mask = 1 << (pin & 0x1f); |
||||
|
||||
if (!base) |
||||
panic("Invalid GPIO pin %u\n", pin); |
||||
|
||||
pio2_writel(base, BSR, mask); |
||||
pio2_writel(base, PDR, mask); |
||||
if (use_pullup) |
||||
pio2_writel(base, PUER, mask); |
||||
else |
||||
pio2_writel(base, PUDR, mask); |
||||
} |
||||
|
||||
void gpio_select_pio(unsigned int pin, unsigned long gpiof_flags) |
||||
{ |
||||
void *base = gpio_pin_to_addr(pin); |
||||
uint32_t mask = 1 << (pin & 0x1f); |
||||
|
||||
if (!base) |
||||
panic("Invalid GPIO pin %u\n", pin); |
||||
|
||||
if (gpiof_flags & GPIOF_OUTPUT) { |
||||
if (gpiof_flags & GPIOF_MULTIDRV) |
||||
pio2_writel(base, MDER, mask); |
||||
else |
||||
pio2_writel(base, MDDR, mask); |
||||
pio2_writel(base, PUDR, mask); |
||||
pio2_writel(base, OER, mask); |
||||
} else { |
||||
if (gpiof_flags & GPIOF_PULLUP) |
||||
pio2_writel(base, PUER, mask); |
||||
else |
||||
pio2_writel(base, PUDR, mask); |
||||
if (gpiof_flags & GPIOF_DEGLITCH) |
||||
pio2_writel(base, IFER, mask); |
||||
else |
||||
pio2_writel(base, IFDR, mask); |
||||
pio2_writel(base, ODR, mask); |
||||
} |
||||
|
||||
pio2_writel(base, PER, mask); |
||||
} |
||||
|
||||
void gpio_set_value(unsigned int pin, int value) |
||||
{ |
||||
void *base = gpio_pin_to_addr(pin); |
||||
uint32_t mask = 1 << (pin & 0x1f); |
||||
|
||||
if (!base) |
||||
panic("Invalid GPIO pin %u\n", pin); |
||||
|
||||
if (value) |
||||
pio2_writel(base, SODR, mask); |
||||
else |
||||
pio2_writel(base, CODR, mask); |
||||
} |
||||
|
||||
int gpio_get_value(unsigned int pin) |
||||
{ |
||||
void *base = gpio_pin_to_addr(pin); |
||||
int value; |
||||
|
||||
if (!base) |
||||
panic("Invalid GPIO pin %u\n", pin); |
||||
|
||||
value = pio2_readl(base, PDSR); |
||||
return (value >> (pin & 0x1f)) & 1; |
||||
} |
||||
@ -0,0 +1,107 @@ |
||||
/*
|
||||
* Copyright (C) 2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#include <common.h> |
||||
|
||||
#include <asm/io.h> |
||||
#include <asm/arch/memory-map.h> |
||||
#include <asm/arch/gpio.h> |
||||
|
||||
void portmux_select_peripheral(void *port, unsigned long pin_mask, |
||||
enum portmux_function func, unsigned long flags) |
||||
{ |
||||
/* Both pull-up and pull-down set means buskeeper */ |
||||
if (flags & PORTMUX_PULL_DOWN) |
||||
gpio_writel(port, PDERS, pin_mask); |
||||
else |
||||
gpio_writel(port, PDERC, pin_mask); |
||||
if (flags & PORTMUX_PULL_UP) |
||||
gpio_writel(port, PUERS, pin_mask); |
||||
else |
||||
gpio_writel(port, PUERC, pin_mask); |
||||
|
||||
/* Select drive strength */ |
||||
if (flags & PORTMUX_DRIVE_LOW) |
||||
gpio_writel(port, ODCR0S, pin_mask); |
||||
else |
||||
gpio_writel(port, ODCR0C, pin_mask); |
||||
if (flags & PORTMUX_DRIVE_HIGH) |
||||
gpio_writel(port, ODCR1S, pin_mask); |
||||
else |
||||
gpio_writel(port, ODCR1C, pin_mask); |
||||
|
||||
/* Select function */ |
||||
if (func & PORTMUX_FUNC_B) |
||||
gpio_writel(port, PMR0S, pin_mask); |
||||
else |
||||
gpio_writel(port, PMR0C, pin_mask); |
||||
if (func & PORTMUX_FUNC_C) |
||||
gpio_writel(port, PMR1S, pin_mask); |
||||
else |
||||
gpio_writel(port, PMR1C, pin_mask); |
||||
|
||||
/* Disable GPIO (i.e. enable peripheral) */ |
||||
gpio_writel(port, GPERC, pin_mask); |
||||
} |
||||
|
||||
void portmux_select_gpio(void *port, unsigned long pin_mask, |
||||
unsigned long flags) |
||||
{ |
||||
/* Both pull-up and pull-down set means buskeeper */ |
||||
if (flags & PORTMUX_PULL_DOWN) |
||||
gpio_writel(port, PDERS, pin_mask); |
||||
else |
||||
gpio_writel(port, PDERC, pin_mask); |
||||
if (flags & PORTMUX_PULL_UP) |
||||
gpio_writel(port, PUERS, pin_mask); |
||||
else |
||||
gpio_writel(port, PUERC, pin_mask); |
||||
|
||||
/* Enable open-drain mode if requested */ |
||||
if (flags & PORTMUX_OPEN_DRAIN) |
||||
gpio_writel(port, ODMERS, pin_mask); |
||||
else |
||||
gpio_writel(port, ODMERC, pin_mask); |
||||
|
||||
/* Select drive strength */ |
||||
if (flags & PORTMUX_DRIVE_LOW) |
||||
gpio_writel(port, ODCR0S, pin_mask); |
||||
else |
||||
gpio_writel(port, ODCR0C, pin_mask); |
||||
if (flags & PORTMUX_DRIVE_HIGH) |
||||
gpio_writel(port, ODCR1S, pin_mask); |
||||
else |
||||
gpio_writel(port, ODCR1C, pin_mask); |
||||
|
||||
/* Select direction and initial pin state */ |
||||
if (flags & PORTMUX_DIR_OUTPUT) { |
||||
if (flags & PORTMUX_INIT_HIGH) |
||||
gpio_writel(port, OVRS, pin_mask); |
||||
else |
||||
gpio_writel(port, OVRC, pin_mask); |
||||
gpio_writel(port, ODERS, pin_mask); |
||||
} else { |
||||
gpio_writel(port, ODERC, pin_mask); |
||||
} |
||||
|
||||
/* Enable GPIO */ |
||||
gpio_writel(port, GPERS, pin_mask); |
||||
} |
||||
@ -0,0 +1,92 @@ |
||||
/*
|
||||
* Copyright (C) 2006, 2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#include <common.h> |
||||
|
||||
#include <asm/io.h> |
||||
#include <asm/arch/memory-map.h> |
||||
#include <asm/arch/gpio.h> |
||||
|
||||
void portmux_select_peripheral(void *port, unsigned long pin_mask, |
||||
enum portmux_function func, unsigned long flags) |
||||
{ |
||||
if (flags & PORTMUX_PULL_UP) |
||||
pio_writel(port, PUER, pin_mask); |
||||
else |
||||
pio_writel(port, PUDR, pin_mask); |
||||
|
||||
switch (func) { |
||||
case PORTMUX_FUNC_A: |
||||
pio_writel(port, ASR, pin_mask); |
||||
break; |
||||
case PORTMUX_FUNC_B: |
||||
pio_writel(port, BSR, pin_mask); |
||||
break; |
||||
} |
||||
|
||||
pio_writel(port, PDR, pin_mask); |
||||
} |
||||
|
||||
void portmux_select_gpio(void *port, unsigned long pin_mask, |
||||
unsigned long flags) |
||||
{ |
||||
if (flags & PORTMUX_PULL_UP) |
||||
pio_writel(port, PUER, pin_mask); |
||||
else |
||||
pio_writel(port, PUDR, pin_mask); |
||||
|
||||
if (flags & PORTMUX_OPEN_DRAIN) |
||||
pio_writel(port, MDER, pin_mask); |
||||
else |
||||
pio_writel(port, MDDR, pin_mask); |
||||
|
||||
if (flags & PORTMUX_DIR_OUTPUT) { |
||||
if (flags & PORTMUX_INIT_HIGH) |
||||
pio_writel(port, SODR, pin_mask); |
||||
else |
||||
pio_writel(port, CODR, pin_mask); |
||||
pio_writel(port, OER, pin_mask); |
||||
} else { |
||||
pio_writel(port, ODR, pin_mask); |
||||
} |
||||
|
||||
pio_writel(port, PER, pin_mask); |
||||
} |
||||
|
||||
void pio_set_output_value(unsigned int pin, int value) |
||||
{ |
||||
void *port = pio_pin_to_port(pin); |
||||
|
||||
if (!port) |
||||
panic("Invalid GPIO pin %u\n", pin); |
||||
|
||||
__pio_set_output_value(port, pin & 0x1f, value); |
||||
} |
||||
|
||||
int pio_get_input_value(unsigned int pin) |
||||
{ |
||||
void *port = pio_pin_to_port(pin); |
||||
|
||||
if (!port) |
||||
panic("Invalid GPIO pin %u\n", pin); |
||||
|
||||
return __pio_get_input_value(port, pin & 0x1f); |
||||
} |
||||
@ -0,0 +1,208 @@ |
||||
AVR32 Port multiplexer configuration |
||||
==================================== |
||||
|
||||
On AVR32 chips, most external I/O pins are routed through a port |
||||
multiplexer. There are currently two kinds of port multiplexer |
||||
hardware around with different register interfaces: |
||||
|
||||
* PIO (AT32AP700x; this is also used on ARM AT91 chips) |
||||
* GPIO (all other AVR32 chips) |
||||
|
||||
The "PIO" variant supports multiplexing up to two peripherals per pin |
||||
in addition to GPIO (software control). Each pin has configurable |
||||
pull-up, glitch filter, interrupt and multi-drive capabilities. |
||||
|
||||
The "GPIO" variant supports multiplexing up to four peripherals per |
||||
pin in addition to GPIO. Each pin has configurable |
||||
pull-up/pull-down/buskeeper, glitch filter, interrupt, open-drain and |
||||
schmitt-trigger capabilities, as well as configurable drive strength |
||||
and slew rate control. |
||||
|
||||
Both controllers are configured using the same API, but the functions |
||||
may accept different values for some parameters depending on the |
||||
actual portmux implementation, and some parameters may be ignored by |
||||
one of the implementation (e.g. the "PIO" implementation will ignore |
||||
the drive strength flags since the hardware doesn't support |
||||
configurable drive strength.) |
||||
|
||||
Selecting the portmux implementation |
||||
------------------------------------ |
||||
Since u-boot is lacking a Kconfig-style configuration engine, the |
||||
portmux implementation must be selected manually by defining one of |
||||
the following symbols: |
||||
|
||||
CONFIG_PORTMUX_PIO |
||||
CONFIG_PORTMUX_GPIO |
||||
|
||||
depending on which implementation the chip in question uses. |
||||
|
||||
Identifying pins |
||||
---------------- |
||||
The portmux configuration functions described below identify the pins |
||||
to act on based on two parameters: A "port" (i.e. a block of pins |
||||
that somehow belong together) and a pin mask. Both are defined in an |
||||
implementation-specific manner. |
||||
|
||||
The available ports are defined on the form |
||||
|
||||
#define PORTMUX_PORT_A (something) |
||||
|
||||
where "A" matches the identifier given in the chip's data sheet, and |
||||
"something" is whatever the portmux implementation needs to identify |
||||
the port (usually a memory address). |
||||
|
||||
The pin mask is a bitmask where each '1' bit indicates a pin to apply |
||||
the current operation to. The width of the bitmask may vary from port |
||||
to port, but it is never wider than 32 bits (which is the width of |
||||
'unsigned long' on avr32). |
||||
|
||||
Selecting functions |
||||
------------------- |
||||
Each pin can either be assigned to one of a predefined set of on-chip |
||||
peripherals, or it can be set up to be controlled by software. For the |
||||
former case, the portmux implementation defines an enum containing all |
||||
the possible peripheral functions that can be selected. For example, |
||||
the PIO implementation, which allows multiplexing two peripherals per |
||||
pin, defines it like this: |
||||
|
||||
enum portmux_function { |
||||
PORTMUX_FUNC_A, |
||||
PORTMUX_FUNC_B, |
||||
}; |
||||
|
||||
To configure a set of pins to be connected to a given peripheral |
||||
function, the following function is used. |
||||
|
||||
void portmux_select_peripheral(void *port, unsigned long pin_mask, |
||||
enum portmux_function func, unsigned long flags); |
||||
|
||||
To configure a set of pins to be controlled by software (GPIO), the |
||||
following function is used. In this case, no "function" argument is |
||||
required since "GPIO" is a function in its own right. |
||||
|
||||
void portmux_select_gpio(void *port, unsigned int pin_mask, |
||||
unsigned long flags); |
||||
|
||||
Both of these functions take a "flags" parameter which may be used to |
||||
alter the default configuration of the pin. This is a bitmask of |
||||
various flags defined in an implementation-specific way, but the names |
||||
of the flags are the same on all implementations. |
||||
|
||||
PORTMUX_DIR_OUTPUT |
||||
PORTMUX_DIR_INPUT |
||||
|
||||
These mutually-exlusive flags configure the initial direction of the |
||||
pins. PORTMUX_DIR_OUTPUT means that the pins are driven by the CPU, |
||||
while PORTMUX_DIR_INPUT means that the pins are tristated by the CPU. |
||||
These flags are ignored by portmux_select_peripheral(). |
||||
|
||||
PORTMUX_INIT_HIGH |
||||
PORTMUX_INIT_LOW |
||||
|
||||
These mutually-exclusive flags configure the initial state of the |
||||
pins: High (Vdd) or low (Vss). They are only effective when |
||||
portmux_select_gpio() is called with the PORTMUX_DIR_OUTPUT flag set. |
||||
|
||||
PORTMUX_PULL_UP |
||||
PORTMUX_PULL_DOWN |
||||
PORTMUX_BUSKEEPER |
||||
|
||||
These mutually-exclusive flags are used to enable any on-chip CMOS |
||||
resistors connected to the pins. PORTMUX_PULL_UP causes the pins to be |
||||
pulled up to Vdd, PORTMUX_PULL_DOWN causes the pins to be pulled down |
||||
to Vss, and PORTMUX_BUSKEEPER will keep the pins in whatever state |
||||
they were left in by whatever was driving them last. If none of the |
||||
flags are specified, the pins are left floating if no one are driving |
||||
them; this is only recommended for always-output pins (e.g. extern |
||||
address and control lines driven by the CPU.) |
||||
|
||||
Note that the "PIO" implementation will silently ignore the |
||||
PORTMUX_PULL_DOWN flag and interpret PORTMUX_BUSKEEPER as |
||||
PORTMUX_PULL_UP. |
||||
|
||||
PORTMUX_DRIVE_MIN |
||||
PORTMUX_DRIVE_LOW |
||||
PORTMUX_DRIVE_HIGH |
||||
PORTMUX_DRIVE_MAX |
||||
|
||||
These mutually-exlusive flags determine the drive strength of the |
||||
pins. PORTMUX_DRIVE_MIN will give low power-consumption, but may cause |
||||
corruption of high-speed signals. PORTMUX_DRIVE_MAX will give high |
||||
power-consumption, but may be necessary on pins toggling at very high |
||||
speeds. PORTMUX_DRIVE_LOW and PORTMUX_DRIVE_HIGH specify something in |
||||
between the other two. |
||||
|
||||
Note that setting the drive strength too high may cause excessive |
||||
overshoot and EMI problems, which may in turn cause signal corruption. |
||||
Also note that the "PIO" implementation will silently ignore these |
||||
flags. |
||||
|
||||
PORTMUX_OPEN_DRAIN |
||||
|
||||
This flag will configure the pins as "open drain", i.e. setting the |
||||
pin state to 0 will drive it low, while setting it to 1 will leave it |
||||
floating (or, in most cases, let it be pulled high by an internal or |
||||
external pull-up resistor.) In the data sheet for chips using the |
||||
"PIO" variant, this mode is called "multi-driver". |
||||
|
||||
Enabling specific peripherals |
||||
----------------------------- |
||||
In addition to the above functions, each chip provides a set of |
||||
functions for setting up the port multiplexer to use a given |
||||
peripheral. The following are some of the functions available. |
||||
|
||||
All the functions below take a "drive_strength" parameter, which must |
||||
be one of the PORTMUX_DRIVE_x flags specified above. Any other |
||||
portmux flags will be silently filtered out. |
||||
|
||||
To set up the External Bus Interface (EBI), call |
||||
|
||||
void portmux_enable_ebi(unsigned int bus_width, |
||||
unsigned long flags, unsigned long drive_strength) |
||||
|
||||
where "bus_width" must be either 16 or 32. "flags" can be any |
||||
combination of the following flags. |
||||
|
||||
PORTMUX_EBI_CS(x) /* Enable chip select x */ |
||||
PORTMUX_EBI_NAND /* Enable NAND flash interface */ |
||||
PORTMUX_EBI_CF(x) /* Enable CompactFlash interface x */ |
||||
PORTMUX_EBI_NWAIT /* Enable NWAIT signal */ |
||||
|
||||
To set up a USART, call |
||||
|
||||
void portmux_enable_usartX(unsigned long drive_strength); |
||||
|
||||
where X is replaced by the USART instance to be configured. |
||||
|
||||
To set up an ethernet MAC: |
||||
|
||||
void portmux_enable_macbX(unsigned long flags, |
||||
unsigned long drive_strength); |
||||
|
||||
where X is replaced by the MACB instance to be configured. "flags" can |
||||
be any combination of the following flags. |
||||
|
||||
PORTMUX_MACB_RMII /* Just set up the RMII interface */ |
||||
PORTMUX_MACB_MII /* Set up full MII interface */ |
||||
PORTMUX_MACB_SPEED /* Enable the SPEED pin */ |
||||
|
||||
To set up the MMC controller: |
||||
|
||||
void portmux_enable_mmci(unsigned long slot, unsigned long flags |
||||
unsigned long drive_strength); |
||||
|
||||
where "slot" identifies which of the alternative SD card slots to |
||||
enable. "flags" can be any combination of the following flags: |
||||
|
||||
PORTMUX_MMCI_4BIT /* Enable 4-bit SD card interface */ |
||||
PORTMUX_MMCI_8BIT /* Enable 8-bit MMC+ interface */ |
||||
PORTMUX_MMCI_EXT_PULLUP /* Board has external pull-ups */ |
||||
|
||||
To set up a SPI controller: |
||||
|
||||
void portmux_enable_spiX(unsigned long cs_mask, |
||||
unsigned long drive_strength); |
||||
|
||||
where X is replaced by the SPI instance to be configured. "cs_mask" is |
||||
a 4-bit bitmask specifying which of the four standard chip select |
||||
lines to set up as GPIOs. |
||||
@ -0,0 +1,86 @@ |
||||
#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__ |
||||
#define __ASM_AVR32_ARCH_GPIO_IMPL_H__ |
||||
|
||||
/* Register offsets */ |
||||
struct gpio_regs { |
||||
u32 GPER; |
||||
u32 GPERS; |
||||
u32 GPERC; |
||||
u32 GPERT; |
||||
u32 PMR0; |
||||
u32 PMR0S; |
||||
u32 PMR0C; |
||||
u32 PMR0T; |
||||
u32 PMR1; |
||||
u32 PMR1S; |
||||
u32 PMR1C; |
||||
u32 PMR1T; |
||||
u32 __reserved0[4]; |
||||
u32 ODER; |
||||
u32 ODERS; |
||||
u32 ODERC; |
||||
u32 ODERT; |
||||
u32 OVR; |
||||
u32 OVRS; |
||||
u32 OVRC; |
||||
u32 OVRT; |
||||
u32 PVR; |
||||
u32 __reserved_PVRS; |
||||
u32 __reserved_PVRC; |
||||
u32 __reserved_PVRT; |
||||
u32 PUER; |
||||
u32 PUERS; |
||||
u32 PUERC; |
||||
u32 PUERT; |
||||
u32 PDER; |
||||
u32 PDERS; |
||||
u32 PDERC; |
||||
u32 PDERT; |
||||
u32 IER; |
||||
u32 IERS; |
||||
u32 IERC; |
||||
u32 IERT; |
||||
u32 IMR0; |
||||
u32 IMR0S; |
||||
u32 IMR0C; |
||||
u32 IMR0T; |
||||
u32 IMR1; |
||||
u32 IMR1S; |
||||
u32 IMR1C; |
||||
u32 IMR1T; |
||||
u32 GFER; |
||||
u32 GFERS; |
||||
u32 GFERC; |
||||
u32 GFERT; |
||||
u32 IFR; |
||||
u32 __reserved_IFRS; |
||||
u32 IFRC; |
||||
u32 __reserved_IFRT; |
||||
u32 ODMER; |
||||
u32 ODMERS; |
||||
u32 ODMERC; |
||||
u32 ODMERT; |
||||
u32 __reserved1[4]; |
||||
u32 ODCR0; |
||||
u32 ODCR0S; |
||||
u32 ODCR0C; |
||||
u32 ODCR0T; |
||||
u32 ODCR1; |
||||
u32 ODCR1S; |
||||
u32 ODCR1C; |
||||
u32 ODCR1T; |
||||
u32 __reserved2[4]; |
||||
u32 OSRR0; |
||||
u32 OSRR0S; |
||||
u32 OSRR0C; |
||||
u32 OSRR0T; |
||||
u32 __reserved3[8]; |
||||
u32 STER; |
||||
u32 STERS; |
||||
u32 STERC; |
||||
u32 STERT; |
||||
u32 __reserved4[35]; |
||||
u32 VERSION; |
||||
}; |
||||
|
||||
#endif /* __ASM_AVR32_ARCH_GPIO_IMPL_H__ */ |
||||
@ -0,0 +1,89 @@ |
||||
/*
|
||||
* Copyright (C) 2006, 2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#ifndef __ASM_AVR32_ARCH_PORTMUX_H__ |
||||
#define __ASM_AVR32_ARCH_PORTMUX_H__ |
||||
|
||||
#include <asm/arch/gpio.h> |
||||
|
||||
#define PORTMUX_PORT_A ((void *)PIOA_BASE) |
||||
#define PORTMUX_PORT_B ((void *)PIOB_BASE) |
||||
#define PORTMUX_PORT_C ((void *)PIOC_BASE) |
||||
#define PORTMUX_PORT_D ((void *)PIOD_BASE) |
||||
#define PORTMUX_PORT_E ((void *)PIOE_BASE) |
||||
|
||||
void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width, |
||||
unsigned long flags, unsigned long drive_strength); |
||||
|
||||
#define PORTMUX_EBI_CS(x) (1 << (x)) |
||||
#define PORTMUX_EBI_NAND (1 << 6) |
||||
#define PORTMUX_EBI_CF(x) (1 << ((x) + 7)) |
||||
#define PORTMUX_EBI_NWAIT (1 << 9) |
||||
|
||||
#ifdef AT32AP700x_CHIP_HAS_USART |
||||
static inline void portmux_enable_usart0(unsigned long drive_strength) |
||||
{ |
||||
portmux_select_peripheral(PORTMUX_PORT_A, (1 << 8) | (1 << 9), |
||||
PORTMUX_FUNC_B, 0); |
||||
} |
||||
|
||||
static inline void portmux_enable_usart1(unsigned long drive_strength) |
||||
{ |
||||
portmux_select_peripheral(PORTMUX_PORT_A, (1 << 17) | (1 << 18), |
||||
PORTMUX_FUNC_A, 0); |
||||
} |
||||
|
||||
static inline void portmux_enable_usart2(unsigned long drive_strength) |
||||
{ |
||||
portmux_select_peripheral(PORTMUX_PORT_B, (1 << 26) | (1 << 27), |
||||
PORTMUX_FUNC_B, 0); |
||||
} |
||||
|
||||
static inline void portmux_enable_usart3(unsigned long drive_strength) |
||||
{ |
||||
portmux_select_peripheral(PORTMUX_PORT_B, (1 << 17) | (1 << 18), |
||||
PORTMUX_FUNC_B, 0); |
||||
} |
||||
#endif |
||||
#ifdef AT32AP700x_CHIP_HAS_MACB |
||||
void portmux_enable_macb0(unsigned long flags, unsigned long drive_strength); |
||||
void portmux_enable_macb1(unsigned long flags, unsigned long drive_strength); |
||||
|
||||
#define PORTMUX_MACB_RMII (0) |
||||
#define PORTMUX_MACB_MII (1 << 0) |
||||
#define PORTMUX_MACB_SPEED (1 << 1) |
||||
|
||||
#endif |
||||
#ifdef AT32AP700x_CHIP_HAS_MMCI |
||||
void portmux_enable_mmci(unsigned int slot, unsigned long flags, |
||||
unsigned long drive_strength); |
||||
|
||||
#define PORTMUX_MMCI_4BIT (1 << 0) |
||||
#define PORTMUX_MMCI_8BIT (PORTMUX_MMCI_4BIT | (1 << 1)) |
||||
#define PORTMUX_MMCI_EXT_PULLUP (1 << 2) |
||||
|
||||
#endif |
||||
#ifdef AT32AP700x_CHIP_HAS_SPI |
||||
void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength); |
||||
void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength); |
||||
#endif |
||||
|
||||
#endif /* __ASM_AVR32_ARCH_PORTMUX_H__ */ |
||||
@ -0,0 +1,114 @@ |
||||
/*
|
||||
* Copyright (C) 2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#ifndef __AVR32_PORTMUX_GPIO_H__ |
||||
#define __AVR32_PORTMUX_GPIO_H__ |
||||
|
||||
#include <asm/io.h> |
||||
|
||||
/* Register layout for this specific device */ |
||||
#include <asm/arch/gpio-impl.h> |
||||
|
||||
/* Register access macros */ |
||||
#define gpio_readl(port, reg) \ |
||||
__raw_readl(&((struct gpio_regs *)port)->reg) |
||||
#define gpio_writel(gpio, reg, value) \ |
||||
__raw_writel(value, &((struct gpio_regs *)port)->reg) |
||||
|
||||
/* Portmux API starts here. See doc/README.AVR32-port-muxing */ |
||||
|
||||
enum portmux_function { |
||||
PORTMUX_FUNC_A, |
||||
PORTMUX_FUNC_B, |
||||
PORTMUX_FUNC_C, |
||||
PORTMUX_FUNC_D, |
||||
}; |
||||
|
||||
#define PORTMUX_DIR_INPUT (0 << 0) |
||||
#define PORTMUX_DIR_OUTPUT (1 << 0) |
||||
#define PORTMUX_INIT_LOW (0 << 1) |
||||
#define PORTMUX_INIT_HIGH (1 << 1) |
||||
#define PORTMUX_PULL_UP (1 << 2) |
||||
#define PORTMUX_PULL_DOWN (2 << 2) |
||||
#define PORTMUX_BUSKEEPER (3 << 2) |
||||
#define PORTMUX_DRIVE_MIN (0 << 4) |
||||
#define PORTMUX_DRIVE_LOW (1 << 4) |
||||
#define PORTMUX_DRIVE_HIGH (2 << 4) |
||||
#define PORTMUX_DRIVE_MAX (3 << 4) |
||||
#define PORTMUX_OPEN_DRAIN (1 << 6) |
||||
|
||||
void portmux_select_peripheral(void *port, unsigned long pin_mask, |
||||
enum portmux_function func, unsigned long flags); |
||||
void portmux_select_gpio(void *port, unsigned long pin_mask, |
||||
unsigned long flags); |
||||
|
||||
/* Internal helper functions */ |
||||
|
||||
static inline void *gpio_pin_to_port(unsigned int pin) |
||||
{ |
||||
return (void *)GPIO_BASE + (pin >> 5) * 0x200; |
||||
} |
||||
|
||||
static inline void __gpio_set_output_value(void *port, unsigned int pin, |
||||
int value) |
||||
{ |
||||
if (value) |
||||
gpio_writel(port, OVRS, 1 << pin); |
||||
else |
||||
gpio_writel(port, OVRC, 1 << pin); |
||||
} |
||||
|
||||
static inline int __gpio_get_input_value(void *port, unsigned int pin) |
||||
{ |
||||
return (gpio_readl(port, PVR) >> pin) & 1; |
||||
} |
||||
|
||||
void gpio_set_output_value(unsigned int pin, int value); |
||||
int gpio_get_input_value(unsigned int pin); |
||||
|
||||
/* GPIO API starts here */ |
||||
|
||||
/*
|
||||
* GCC doesn't realize that the constant case is extremely trivial, |
||||
* so we need to help it make the right decision by using |
||||
* always_inline. |
||||
*/ |
||||
__attribute__((always_inline)) |
||||
static inline void gpio_set_value(unsigned int pin, int value) |
||||
{ |
||||
if (__builtin_constant_p(pin)) |
||||
__gpio_set_output_value(gpio_pin_to_port(pin), |
||||
pin & 0x1f, value); |
||||
else |
||||
gpio_set_output_value(pin, value); |
||||
} |
||||
|
||||
__attribute__((always_inline)) |
||||
static inline int gpio_get_value(unsigned int pin) |
||||
{ |
||||
if (__builtin_constant_p(pin)) |
||||
return __gpio_get_input_value(gpio_pin_to_port(pin), |
||||
pin & 0x1f); |
||||
else |
||||
return gpio_get_input_value(pin); |
||||
} |
||||
|
||||
#endif /* __AVR32_PORTMUX_GPIO_H__ */ |
||||
@ -0,0 +1,138 @@ |
||||
/*
|
||||
* Copyright (C) 2006, 2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#ifndef __AVR32_PORTMUX_PIO_H__ |
||||
#define __AVR32_PORTMUX_PIO_H__ |
||||
|
||||
#include <asm/io.h> |
||||
|
||||
/* PIO register offsets */ |
||||
#define PIO_PER 0x0000 |
||||
#define PIO_PDR 0x0004 |
||||
#define PIO_PSR 0x0008 |
||||
#define PIO_OER 0x0010 |
||||
#define PIO_ODR 0x0014 |
||||
#define PIO_OSR 0x0018 |
||||
#define PIO_IFER 0x0020 |
||||
#define PIO_IFDR 0x0024 |
||||
#define PIO_ISFR 0x0028 |
||||
#define PIO_SODR 0x0030 |
||||
#define PIO_CODR 0x0034 |
||||
#define PIO_ODSR 0x0038 |
||||
#define PIO_PDSR 0x003c |
||||
#define PIO_IER 0x0040 |
||||
#define PIO_IDR 0x0044 |
||||
#define PIO_IMR 0x0048 |
||||
#define PIO_ISR 0x004c |
||||
#define PIO_MDER 0x0050 |
||||
#define PIO_MDDR 0x0054 |
||||
#define PIO_MDSR 0x0058 |
||||
#define PIO_PUDR 0x0060 |
||||
#define PIO_PUER 0x0064 |
||||
#define PIO_PUSR 0x0068 |
||||
#define PIO_ASR 0x0070 |
||||
#define PIO_BSR 0x0074 |
||||
#define PIO_ABSR 0x0078 |
||||
#define PIO_OWER 0x00a0 |
||||
#define PIO_OWDR 0x00a4 |
||||
#define PIO_OWSR 0x00a8 |
||||
|
||||
/* Hardware register access */ |
||||
#define pio_readl(base, reg) \ |
||||
__raw_readl((void *)base + PIO_##reg) |
||||
#define pio_writel(base, reg, value) \ |
||||
__raw_writel((value), (void *)base + PIO_##reg) |
||||
|
||||
/* Portmux API starts here. See doc/README.AVR32-port-muxing */ |
||||
|
||||
enum portmux_function { |
||||
PORTMUX_FUNC_A, |
||||
PORTMUX_FUNC_B, |
||||
}; |
||||
|
||||
/* Pull-down, buskeeper and drive strength are not supported */ |
||||
#define PORTMUX_DIR_INPUT (0 << 0) |
||||
#define PORTMUX_DIR_OUTPUT (1 << 0) |
||||
#define PORTMUX_INIT_LOW (0 << 1) |
||||
#define PORTMUX_INIT_HIGH (1 << 1) |
||||
#define PORTMUX_PULL_UP (1 << 2) |
||||
#define PORTMUX_PULL_DOWN (0) |
||||
#define PORTMUX_BUSKEEPER PORTMUX_PULL_UP |
||||
#define PORTMUX_DRIVE_MIN (0) |
||||
#define PORTMUX_DRIVE_LOW (0) |
||||
#define PORTMUX_DRIVE_HIGH (0) |
||||
#define PORTMUX_DRIVE_MAX (0) |
||||
#define PORTMUX_OPEN_DRAIN (1 << 3) |
||||
|
||||
void portmux_select_peripheral(void *port, unsigned long pin_mask, |
||||
enum portmux_function func, unsigned long flags); |
||||
void portmux_select_gpio(void *port, unsigned long pin_mask, |
||||
unsigned long flags); |
||||
|
||||
/* Internal helper functions */ |
||||
|
||||
static inline void __pio_set_output_value(void *port, unsigned int pin, |
||||
int value) |
||||
{ |
||||
/*
|
||||
* value will usually be constant, but it's pretty cheap |
||||
* either way. |
||||
*/ |
||||
if (value) |
||||
pio_writel(port, SODR, 1 << pin); |
||||
else |
||||
pio_writel(port, CODR, 1 << pin); |
||||
} |
||||
|
||||
static inline int __pio_get_input_value(void *port, unsigned int pin) |
||||
{ |
||||
return (pio_readl(port, PDSR) >> pin) & 1; |
||||
} |
||||
|
||||
void pio_set_output_value(unsigned int pin, int value); |
||||
int pio_get_input_value(unsigned int pin); |
||||
|
||||
/* GPIO API starts here */ |
||||
|
||||
/*
|
||||
* GCC doesn't realize that the constant case is extremely trivial, |
||||
* so we need to help it make the right decision by using |
||||
* always_inline. |
||||
*/ |
||||
__attribute__((always_inline)) |
||||
static inline void gpio_set_value(unsigned int pin, int value) |
||||
{ |
||||
if (__builtin_constant_p(pin)) |
||||
__pio_set_output_value(pio_pin_to_port(pin), pin & 0x1f, value); |
||||
else |
||||
pio_set_output_value(pin, value); |
||||
} |
||||
|
||||
__attribute__((always_inline)) |
||||
static inline int gpio_get_value(unsigned int pin) |
||||
{ |
||||
if (__builtin_constant_p(pin)) |
||||
return __pio_get_input_value(pio_pin_to_port(pin), pin & 0x1f); |
||||
else |
||||
return pio_get_input_value(pin); |
||||
} |
||||
|
||||
#endif /* __AVR32_PORTMUX_PIO_H__ */ |
||||
Loading…
Reference in new issue