mx6: tqma6: clear enet clk sel for mba6

we have external ref clock from phy.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>

board/tqc/tqma6/tqma6_mba6.c

@@ -114,6 +114,11 @@ static iomux_v3_cfg_t const mba6_enet_pads[] = {
 
 static void mba6_setup_iomuxc_enet(void)
 {
+	struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+	/* clear gpr1[ENET_CLK_SEL] for externel clock */
+	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
+
 	__raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE,
 		     (void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
 	__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,