A few small additional items are needed to support DM_SPI and DM_SERIAL, so those were added to da850-evm-u-boot.dtsi Signed-off-by: Adam Ford <aford173@gmail.com>master
Adam Ford
7 years ago
committed by
Tom Rini
parent
ec4e99a4a2
commit
4c70755986
@ -0,0 +1,22 @@ |
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/* |
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* da850-evm U-Boot Additions |
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* |
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* Copyright (C) 2017 Logic PD, Inc. |
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* Copyright (C) Adam Ford |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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/ { |
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chosen { |
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stdout-path = &serial2; |
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}; |
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|
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aliases { |
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spi0 = &spi1; |
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}; |
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}; |
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|
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&flash { |
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compatible = "m25p64", "spi-flash"; |
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}; |
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@ -0,0 +1,304 @@ |
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/* |
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* Device Tree for DA850 EVM board |
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* |
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation, version 2. |
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*/ |
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/dts-v1/; |
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#include "da850.dtsi" |
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#include <dt-bindings/gpio/gpio.h> |
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|
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/ { |
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compatible = "ti,da850-evm", "ti,da850"; |
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model = "DA850/AM1808/OMAP-L138 EVM"; |
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|
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soc@1c00000 { |
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pmx_core: pinmux@14120 { |
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status = "okay"; |
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|
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mcasp0_pins: pinmux_mcasp0_pins { |
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pinctrl-single,bits = < |
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/* |
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* AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR, |
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* AFSR, AMUTE |
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*/ |
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0x00 0x11111111 0xffffffff |
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/* AXR11, AXR12 */ |
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0x04 0x00011000 0x000ff000 |
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>; |
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}; |
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nand_pins: nand_pins { |
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pinctrl-single,bits = < |
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/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */ |
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0x1c 0x10110110 0xf0ff0ff0 |
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/* |
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* EMA_D[0], EMA_D[1], EMA_D[2], |
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* EMA_D[3], EMA_D[4], EMA_D[5], |
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* EMA_D[6], EMA_D[7] |
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*/ |
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0x24 0x11111111 0xffffffff |
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/* EMA_A[1], EMA_A[2] */ |
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0x30 0x01100000 0x0ff00000 |
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>; |
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}; |
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}; |
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serial0: serial@42000 { |
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status = "okay"; |
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}; |
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serial1: serial@10c000 { |
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status = "okay"; |
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}; |
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serial2: serial@10d000 { |
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status = "okay"; |
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}; |
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rtc0: rtc@23000 { |
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status = "okay"; |
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}; |
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i2c0: i2c@22000 { |
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status = "okay"; |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&i2c0_pins>; |
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|
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tps: tps@48 { |
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reg = <0x48>; |
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}; |
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tlv320aic3106: tlv320aic3106@18 { |
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#sound-dai-cells = <0>; |
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compatible = "ti,tlv320aic3106"; |
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reg = <0x18>; |
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status = "okay"; |
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|
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/* Regulators */ |
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IOVDD-supply = <&vdcdc2_reg>; |
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/* Derived from VBAT: Baseboard 3.3V / 1.8V */ |
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AVDD-supply = <&vbat>; |
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DRVDD-supply = <&vbat>; |
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DVDD-supply = <&vbat>; |
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}; |
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tca6416: gpio@20 { |
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compatible = "ti,tca6416"; |
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reg = <0x20>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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}; |
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}; |
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wdt: wdt@21000 { |
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status = "okay"; |
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}; |
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mmc0: mmc@40000 { |
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max-frequency = <50000000>; |
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bus-width = <4>; |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc0_pins>; |
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}; |
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spi1: spi@30e000 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; |
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flash: m25p80@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "m25p64"; |
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spi-max-frequency = <30000000>; |
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m25p,fast-read; |
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reg = <0>; |
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partition@0 { |
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label = "U-Boot-SPL"; |
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reg = <0x00000000 0x00010000>; |
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read-only; |
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}; |
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partition@1 { |
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label = "U-Boot"; |
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reg = <0x00010000 0x00080000>; |
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read-only; |
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}; |
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partition@2 { |
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label = "U-Boot-Env"; |
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reg = <0x00090000 0x00010000>; |
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read-only; |
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}; |
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partition@3 { |
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label = "Kernel"; |
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reg = <0x000a0000 0x00280000>; |
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}; |
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partition@4 { |
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label = "Filesystem"; |
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reg = <0x00320000 0x00400000>; |
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}; |
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partition@5 { |
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label = "MAC-Address"; |
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reg = <0x007f0000 0x00010000>; |
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read-only; |
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}; |
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}; |
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}; |
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mdio: mdio@224000 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mdio_pins>; |
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bus_freq = <2200000>; |
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}; |
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eth0: ethernet@220000 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mii_pins>; |
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}; |
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gpio: gpio@226000 { |
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status = "okay"; |
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}; |
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}; |
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vbat: fixedregulator0 { |
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compatible = "regulator-fixed"; |
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regulator-name = "vbat"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-boot-on; |
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}; |
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|
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sound { |
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compatible = "simple-audio-card"; |
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simple-audio-card,name = "DA850/OMAP-L138 EVM"; |
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simple-audio-card,widgets = |
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"Line", "Line In", |
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"Line", "Line Out"; |
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simple-audio-card,routing = |
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"LINE1L", "Line In", |
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"LINE1R", "Line In", |
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"Line Out", "LLOUT", |
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"Line Out", "RLOUT"; |
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simple-audio-card,format = "dsp_b"; |
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simple-audio-card,bitclock-master = <&link0_codec>; |
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simple-audio-card,frame-master = <&link0_codec>; |
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simple-audio-card,bitclock-inversion; |
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|
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simple-audio-card,cpu { |
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sound-dai = <&mcasp0>; |
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system-clock-frequency = <24576000>; |
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}; |
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link0_codec: simple-audio-card,codec { |
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sound-dai = <&tlv320aic3106>; |
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system-clock-frequency = <24576000>; |
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}; |
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}; |
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}; |
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|
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/include/ "tps6507x.dtsi" |
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&tps { |
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vdcdc1_2-supply = <&vbat>; |
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vdcdc3-supply = <&vbat>; |
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vldo1_2-supply = <&vbat>; |
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regulators { |
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vdcdc1_reg: regulator@0 { |
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regulator-name = "VDCDC1_3.3V"; |
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regulator-min-microvolt = <3150000>; |
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regulator-max-microvolt = <3450000>; |
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regulator-always-on; |
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regulator-boot-on; |
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}; |
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vdcdc2_reg: regulator@1 { |
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regulator-name = "VDCDC2_3.3V"; |
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regulator-min-microvolt = <1710000>; |
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regulator-max-microvolt = <3450000>; |
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regulator-always-on; |
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regulator-boot-on; |
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ti,defdcdc_default = <1>; |
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}; |
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vdcdc3_reg: regulator@2 { |
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regulator-name = "VDCDC3_1.2V"; |
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regulator-min-microvolt = <950000>; |
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regulator-max-microvolt = <1350000>; |
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regulator-always-on; |
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regulator-boot-on; |
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ti,defdcdc_default = <1>; |
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}; |
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ldo1_reg: regulator@3 { |
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regulator-name = "LDO1_1.8V"; |
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regulator-min-microvolt = <1710000>; |
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regulator-max-microvolt = <1890000>; |
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regulator-always-on; |
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regulator-boot-on; |
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}; |
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ldo2_reg: regulator@4 { |
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regulator-name = "LDO2_1.2V"; |
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regulator-min-microvolt = <1140000>; |
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regulator-max-microvolt = <1320000>; |
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regulator-always-on; |
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regulator-boot-on; |
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}; |
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}; |
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}; |
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&mcasp0 { |
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#sound-dai-cells = <0>; |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mcasp0_pins>; |
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op-mode = <0>; /* MCASP_IIS_MODE */ |
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tdm-slots = <2>; |
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/* 4 serializer */ |
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serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
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0 0 0 0 |
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0 0 0 0 |
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0 0 0 1 |
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2 0 0 0 |
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>; |
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tx-num-evt = <32>; |
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rx-num-evt = <32>; |
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}; |
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&edma0 { |
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ti,edma-reserved-slot-ranges = <32 50>; |
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}; |
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&edma1 { |
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ti,edma-reserved-slot-ranges = <32 90>; |
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}; |
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&aemif { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&nand_pins>; |
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status = "ok"; |
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cs3 { |
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#address-cells = <2>; |
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#size-cells = <1>; |
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clock-ranges; |
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ranges; |
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ti,cs-chipselect = <3>; |
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nand@2000000,0 { |
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compatible = "ti,davinci-nand"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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reg = <0 0x02000000 0x02000000 |
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1 0x00000000 0x00008000>; |
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ti,davinci-chipselect = <1>; |
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ti,davinci-mask-ale = <0>; |
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ti,davinci-mask-cle = <0>; |
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ti,davinci-mask-chipsel = <0>; |
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ti,davinci-ecc-mode = "hw"; |
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ti,davinci-ecc-bits = <4>; |
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ti,davinci-nand-use-bbt; |
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}; |
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}; |
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}; |
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|
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&vpif { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>; |
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status = "okay"; |
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}; |
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@ -0,0 +1,581 @@ |
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/* |
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* Copyright 2012 DENX Software Engineering GmbH |
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* Heiko Schocher <hs@denx.de> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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*/ |
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#include "skeleton.dtsi" |
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#include <dt-bindings/interrupt-controller/irq.h> |
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|
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/ { |
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arm { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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intc: interrupt-controller@fffee000 { |
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compatible = "ti,cp-intc"; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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ti,intc-size = <101>; |
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reg = <0xfffee000 0x2000>; |
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}; |
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}; |
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|
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aliases { |
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spi0 = &spi0; |
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}; |
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|
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soc@1c00000 { |
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compatible = "simple-bus"; |
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model = "da850"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0x0 0x01c00000 0x400000>; |
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interrupt-parent = <&intc>; |
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|
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pmx_core: pinmux@14120 { |
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compatible = "pinctrl-single"; |
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reg = <0x14120 0x50>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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#pinctrl-cells = <2>; |
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pinctrl-single,bit-per-mux; |
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pinctrl-single,register-width = <32>; |
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pinctrl-single,function-mask = <0xf>; |
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status = "disabled"; |
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|
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serial0_rtscts_pins: pinmux_serial0_rtscts_pins { |
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pinctrl-single,bits = < |
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/* UART0_RTS UART0_CTS */ |
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0x0c 0x22000000 0xff000000 |
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>; |
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}; |
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serial0_rxtx_pins: pinmux_serial0_rxtx_pins { |
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pinctrl-single,bits = < |
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/* UART0_TXD UART0_RXD */ |
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0x0c 0x00220000 0x00ff0000 |
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>; |
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}; |
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serial1_rtscts_pins: pinmux_serial1_rtscts_pins { |
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pinctrl-single,bits = < |
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/* UART1_CTS UART1_RTS */ |
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0x00 0x00440000 0x00ff0000 |
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>; |
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}; |
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serial1_rxtx_pins: pinmux_serial1_rxtx_pins { |
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pinctrl-single,bits = < |
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/* UART1_TXD UART1_RXD */ |
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0x10 0x22000000 0xff000000 |
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>; |
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}; |
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serial2_rtscts_pins: pinmux_serial2_rtscts_pins { |
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pinctrl-single,bits = < |
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/* UART2_CTS UART2_RTS */ |
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0x00 0x44000000 0xff000000 |
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>; |
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}; |
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serial2_rxtx_pins: pinmux_serial2_rxtx_pins { |
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pinctrl-single,bits = < |
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/* UART2_TXD UART2_RXD */ |
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0x10 0x00220000 0x00ff0000 |
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>; |
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}; |
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i2c0_pins: pinmux_i2c0_pins { |
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pinctrl-single,bits = < |
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/* I2C0_SDA,I2C0_SCL */ |
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0x10 0x00002200 0x0000ff00 |
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>; |
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}; |
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i2c1_pins: pinmux_i2c1_pins { |
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pinctrl-single,bits = < |
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/* I2C1_SDA, I2C1_SCL */ |
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0x10 0x00440000 0x00ff0000 |
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>; |
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}; |
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mmc0_pins: pinmux_mmc_pins { |
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pinctrl-single,bits = < |
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/* MMCSD0_DAT[3] MMCSD0_DAT[2] |
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* MMCSD0_DAT[1] MMCSD0_DAT[0] |
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* MMCSD0_CMD MMCSD0_CLK |
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*/ |
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0x28 0x00222222 0x00ffffff |
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>; |
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}; |
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ehrpwm0a_pins: pinmux_ehrpwm0a_pins { |
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pinctrl-single,bits = < |
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/* EPWM0A */ |
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0xc 0x00000002 0x0000000f |
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>; |
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}; |
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ehrpwm0b_pins: pinmux_ehrpwm0b_pins { |
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pinctrl-single,bits = < |
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/* EPWM0B */ |
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0xc 0x00000020 0x000000f0 |
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>; |
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}; |
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ehrpwm1a_pins: pinmux_ehrpwm1a_pins { |
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pinctrl-single,bits = < |
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/* EPWM1A */ |
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0x14 0x00000002 0x0000000f |
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>; |
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}; |
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ehrpwm1b_pins: pinmux_ehrpwm1b_pins { |
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pinctrl-single,bits = < |
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/* EPWM1B */ |
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0x14 0x00000020 0x000000f0 |
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>; |
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}; |
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ecap0_pins: pinmux_ecap0_pins { |
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pinctrl-single,bits = < |
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/* ECAP0_APWM0 */ |
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0x8 0x20000000 0xf0000000 |
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>; |
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}; |
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ecap1_pins: pinmux_ecap1_pins { |
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pinctrl-single,bits = < |
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/* ECAP1_APWM1 */ |
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0x4 0x40000000 0xf0000000 |
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>; |
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}; |
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ecap2_pins: pinmux_ecap2_pins { |
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pinctrl-single,bits = < |
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/* ECAP2_APWM2 */ |
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0x4 0x00000004 0x0000000f |
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>; |
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}; |
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spi0_pins: pinmux_spi0_pins { |
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pinctrl-single,bits = < |
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/* SIMO, SOMI, CLK */ |
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0xc 0x00001101 0x0000ff0f |
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>; |
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}; |
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spi0_cs0_pin: pinmux_spi0_cs0 { |
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pinctrl-single,bits = < |
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/* CS0 */ |
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0x10 0x00000010 0x000000f0 |
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>; |
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}; |
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spi0_cs3_pin: pinmux_spi0_cs3_pin { |
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pinctrl-single,bits = < |
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/* CS3 */ |
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0xc 0x01000000 0x0f000000 |
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>; |
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}; |
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spi1_pins: pinmux_spi1_pins { |
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pinctrl-single,bits = < |
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/* SIMO, SOMI, CLK */ |
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0x14 0x00110100 0x00ff0f00 |
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>; |
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}; |
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spi1_cs0_pin: pinmux_spi1_cs0 { |
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pinctrl-single,bits = < |
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/* CS0 */ |
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0x14 0x00000010 0x000000f0 |
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>; |
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}; |
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mdio_pins: pinmux_mdio_pins { |
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pinctrl-single,bits = < |
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/* MDIO_CLK, MDIO_D */ |
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0x10 0x00000088 0x000000ff |
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>; |
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}; |
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mii_pins: pinmux_mii_pins { |
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pinctrl-single,bits = < |
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/* |
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* MII_TXEN, MII_TXCLK, MII_COL |
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* MII_TXD_3, MII_TXD_2, MII_TXD_1 |
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* MII_TXD_0 |
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*/ |
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0x8 0x88888880 0xfffffff0 |
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/* |
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* MII_RXER, MII_CRS, MII_RXCLK |
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* MII_RXDV, MII_RXD_3, MII_RXD_2 |
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* MII_RXD_1, MII_RXD_0 |
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*/ |
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0xc 0x88888888 0xffffffff |
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>; |
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}; |
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lcd_pins: pinmux_lcd_pins { |
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pinctrl-single,bits = < |
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/* |
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* LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5], |
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* LCD_D[6], LCD_D[7] |
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*/ |
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0x40 0x22222200 0xffffff00 |
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/* |
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* LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13], |
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* LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1] |
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*/ |
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0x44 0x22222222 0xffffffff |
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/* LCD_D[8], LCD_D[9] */ |
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0x48 0x00000022 0x000000ff |
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|
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/* LCD_PCLK */ |
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0x48 0x02000000 0x0f000000 |
||||
/* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */ |
||||
0x4c 0x02000022 0x0f0000ff |
||||
>; |
||||
}; |
||||
vpif_capture_pins: vpif_capture_pins { |
||||
pinctrl-single,bits = < |
||||
/* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */ |
||||
0x38 0x11111111 0xffffffff |
||||
/* VP_DIN[10..15,0..1] */ |
||||
0x3c 0x11111111 0xffffffff |
||||
/* VP_DIN[8..9] */ |
||||
0x40 0x00000011 0x000000ff |
||||
>; |
||||
}; |
||||
vpif_display_pins: vpif_display_pins { |
||||
pinctrl-single,bits = < |
||||
/* VP_DOUT[2..7] */ |
||||
0x40 0x11111100 0xffffff00 |
||||
/* VP_DOUT[10..15,0..1] */ |
||||
0x44 0x11111111 0xffffffff |
||||
/* VP_DOUT[8..9] */ |
||||
0x48 0x00000011 0x000000ff |
||||
/* |
||||
* VP_CLKOUT3, VP_CLKIN3, |
||||
* VP_CLKOUT2, VP_CLKIN2 |
||||
*/ |
||||
0x4c 0x00111100 0x00ffff00 |
||||
>; |
||||
}; |
||||
}; |
||||
prictrl: priority-controller@14110 { |
||||
compatible = "ti,da850-mstpri"; |
||||
reg = <0x14110 0x0c>; |
||||
status = "disabled"; |
||||
}; |
||||
cfgchip: chip-controller@1417c { |
||||
compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; |
||||
reg = <0x1417c 0x14>; |
||||
|
||||
usb_phy: usb-phy { |
||||
compatible = "ti,da830-usb-phy"; |
||||
#phy-cells = <1>; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
edma0: edma@0 { |
||||
compatible = "ti,edma3-tpcc"; |
||||
/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */ |
||||
reg = <0x0 0x8000>; |
||||
reg-names = "edma3_cc"; |
||||
interrupts = <11 12>; |
||||
interrupt-names = "edma3_ccint", "edma3_ccerrint"; |
||||
#dma-cells = <2>; |
||||
|
||||
ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>; |
||||
}; |
||||
edma0_tptc0: tptc@8000 { |
||||
compatible = "ti,edma3-tptc"; |
||||
reg = <0x8000 0x400>; |
||||
interrupts = <13>; |
||||
interrupt-names = "edm3_tcerrint"; |
||||
}; |
||||
edma0_tptc1: tptc@8400 { |
||||
compatible = "ti,edma3-tptc"; |
||||
reg = <0x8400 0x400>; |
||||
interrupts = <32>; |
||||
interrupt-names = "edm3_tcerrint"; |
||||
}; |
||||
edma1: edma@230000 { |
||||
compatible = "ti,edma3-tpcc"; |
||||
/* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */ |
||||
reg = <0x230000 0x8000>; |
||||
reg-names = "edma3_cc"; |
||||
interrupts = <93 94>; |
||||
interrupt-names = "edma3_ccint", "edma3_ccerrint"; |
||||
#dma-cells = <2>; |
||||
|
||||
ti,tptcs = <&edma1_tptc0 7>; |
||||
}; |
||||
edma1_tptc0: tptc@238000 { |
||||
compatible = "ti,edma3-tptc"; |
||||
reg = <0x238000 0x400>; |
||||
interrupts = <95>; |
||||
interrupt-names = "edm3_tcerrint"; |
||||
}; |
||||
serial0: serial@42000 { |
||||
compatible = "ti,da830-uart", "ns16550a"; |
||||
reg = <0x42000 0x100>; |
||||
reg-io-width = <4>; |
||||
reg-shift = <2>; |
||||
interrupts = <25>; |
||||
status = "disabled"; |
||||
}; |
||||
serial1: serial@10c000 { |
||||
compatible = "ti,da830-uart", "ns16550a"; |
||||
reg = <0x10c000 0x100>; |
||||
reg-io-width = <4>; |
||||
reg-shift = <2>; |
||||
interrupts = <53>; |
||||
status = "disabled"; |
||||
}; |
||||
serial2: serial@10d000 { |
||||
compatible = "ti,da830-uart", "ns16550a"; |
||||
reg = <0x10d000 0x100>; |
||||
reg-io-width = <4>; |
||||
reg-shift = <2>; |
||||
interrupts = <61>; |
||||
status = "disabled"; |
||||
}; |
||||
rtc0: rtc@23000 { |
||||
compatible = "ti,da830-rtc"; |
||||
reg = <0x23000 0x1000>; |
||||
interrupts = <19 |
||||
19>; |
||||
status = "disabled"; |
||||
}; |
||||
i2c0: i2c@22000 { |
||||
compatible = "ti,davinci-i2c"; |
||||
reg = <0x22000 0x1000>; |
||||
interrupts = <15>; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
status = "disabled"; |
||||
}; |
||||
i2c1: i2c@228000 { |
||||
compatible = "ti,davinci-i2c"; |
||||
reg = <0x228000 0x1000>; |
||||
interrupts = <51>; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
status = "disabled"; |
||||
}; |
||||
wdt: wdt@21000 { |
||||
compatible = "ti,davinci-wdt"; |
||||
reg = <0x21000 0x1000>; |
||||
status = "disabled"; |
||||
}; |
||||
mmc0: mmc@40000 { |
||||
compatible = "ti,da830-mmc"; |
||||
reg = <0x40000 0x1000>; |
||||
cap-sd-highspeed; |
||||
cap-mmc-highspeed; |
||||
interrupts = <16>; |
||||
dmas = <&edma0 16 0>, <&edma0 17 0>; |
||||
dma-names = "rx", "tx"; |
||||
status = "disabled"; |
||||
}; |
||||
vpif: video@217000 { |
||||
compatible = "ti,da850-vpif"; |
||||
reg = <0x217000 0x1000>; |
||||
interrupts = <92>; |
||||
status = "disabled"; |
||||
|
||||
/* VPIF capture port */ |
||||
port@0 { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
|
||||
/* VPIF display port */ |
||||
port@1 { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
}; |
||||
mmc1: mmc@21b000 { |
||||
compatible = "ti,da830-mmc"; |
||||
reg = <0x21b000 0x1000>; |
||||
cap-sd-highspeed; |
||||
cap-mmc-highspeed; |
||||
interrupts = <72>; |
||||
dmas = <&edma1 28 0>, <&edma1 29 0>; |
||||
dma-names = "rx", "tx"; |
||||
status = "disabled"; |
||||
}; |
||||
ehrpwm0: pwm@300000 { |
||||
compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", |
||||
"ti,am33xx-ehrpwm"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x300000 0x2000>; |
||||
status = "disabled"; |
||||
}; |
||||
ehrpwm1: pwm@302000 { |
||||
compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", |
||||
"ti,am33xx-ehrpwm"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x302000 0x2000>; |
||||
status = "disabled"; |
||||
}; |
||||
ecap0: ecap@306000 { |
||||
compatible = "ti,da850-ecap", "ti,am3352-ecap", |
||||
"ti,am33xx-ecap"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x306000 0x80>; |
||||
status = "disabled"; |
||||
}; |
||||
ecap1: ecap@307000 { |
||||
compatible = "ti,da850-ecap", "ti,am3352-ecap", |
||||
"ti,am33xx-ecap"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x307000 0x80>; |
||||
status = "disabled"; |
||||
}; |
||||
ecap2: ecap@308000 { |
||||
compatible = "ti,da850-ecap", "ti,am3352-ecap", |
||||
"ti,am33xx-ecap"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x308000 0x80>; |
||||
status = "disabled"; |
||||
}; |
||||
spi0: spi@41000 { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
compatible = "ti,da830-spi"; |
||||
reg = <0x41000 0x1000>; |
||||
num-cs = <6>; |
||||
ti,davinci-spi-intr-line = <1>; |
||||
interrupts = <20>; |
||||
dmas = <&edma0 14 0>, <&edma0 15 0>; |
||||
dma-names = "rx", "tx"; |
||||
status = "disabled"; |
||||
}; |
||||
spi1: spi@30e000 { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
compatible = "ti,da830-spi"; |
||||
reg = <0x30e000 0x1000>; |
||||
num-cs = <4>; |
||||
ti,davinci-spi-intr-line = <1>; |
||||
interrupts = <56>; |
||||
dmas = <&edma0 18 0>, <&edma0 19 0>; |
||||
dma-names = "rx", "tx"; |
||||
status = "disabled"; |
||||
}; |
||||
usb0: usb@200000 { |
||||
compatible = "ti,da830-musb"; |
||||
reg = <0x200000 0x1000>; |
||||
ranges; |
||||
interrupts = <58>; |
||||
interrupt-names = "mc"; |
||||
dr_mode = "otg"; |
||||
phys = <&usb_phy 0>; |
||||
phy-names = "usb-phy"; |
||||
status = "disabled"; |
||||
|
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
|
||||
dmas = <&cppi41dma 0 0 &cppi41dma 1 0 |
||||
&cppi41dma 2 0 &cppi41dma 3 0 |
||||
&cppi41dma 0 1 &cppi41dma 1 1 |
||||
&cppi41dma 2 1 &cppi41dma 3 1>; |
||||
dma-names = |
||||
"rx1", "rx2", "rx3", "rx4", |
||||
"tx1", "tx2", "tx3", "tx4"; |
||||
|
||||
cppi41dma: dma-controller@201000 { |
||||
compatible = "ti,da830-cppi41"; |
||||
reg = <0x201000 0x1000 |
||||
0x202000 0x1000 |
||||
0x204000 0x4000>; |
||||
reg-names = "controller", |
||||
"scheduler", "queuemgr"; |
||||
interrupts = <58>; |
||||
#dma-cells = <2>; |
||||
#dma-channels = <4>; |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
sata: sata@218000 { |
||||
compatible = "ti,da850-ahci"; |
||||
reg = <0x218000 0x2000>, <0x22c018 0x4>; |
||||
interrupts = <67>; |
||||
status = "disabled"; |
||||
}; |
||||
mdio: mdio@224000 { |
||||
compatible = "ti,davinci_mdio"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
reg = <0x224000 0x1000>; |
||||
status = "disabled"; |
||||
}; |
||||
eth0: ethernet@220000 { |
||||
compatible = "ti,davinci-dm6467-emac"; |
||||
reg = <0x220000 0x4000>; |
||||
ti,davinci-ctrl-reg-offset = <0x3000>; |
||||
ti,davinci-ctrl-mod-reg-offset = <0x2000>; |
||||
ti,davinci-ctrl-ram-offset = <0>; |
||||
ti,davinci-ctrl-ram-size = <0x2000>; |
||||
local-mac-address = [ 00 00 00 00 00 00 ]; |
||||
interrupts = <33 |
||||
34 |
||||
35 |
||||
36 |
||||
>; |
||||
status = "disabled"; |
||||
}; |
||||
usb1: usb@225000 { |
||||
compatible = "ti,da830-ohci"; |
||||
reg = <0x225000 0x1000>; |
||||
interrupts = <59>; |
||||
phys = <&usb_phy 1>; |
||||
phy-names = "usb-phy"; |
||||
status = "disabled"; |
||||
}; |
||||
gpio: gpio@226000 { |
||||
compatible = "ti,dm6441-gpio"; |
||||
gpio-controller; |
||||
#gpio-cells = <2>; |
||||
reg = <0x226000 0x1000>; |
||||
interrupts = <42 IRQ_TYPE_EDGE_BOTH |
||||
43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH |
||||
45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH |
||||
47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH |
||||
49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>; |
||||
ti,ngpio = <144>; |
||||
ti,davinci-gpio-unbanked = <0>; |
||||
status = "disabled"; |
||||
interrupt-controller; |
||||
#interrupt-cells = <2>; |
||||
}; |
||||
pinconf: pin-controller@22c00c { |
||||
compatible = "ti,da850-pupd"; |
||||
reg = <0x22c00c 0x8>; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
mcasp0: mcasp@100000 { |
||||
compatible = "ti,da830-mcasp-audio"; |
||||
reg = <0x100000 0x2000>, |
||||
<0x102000 0x400000>; |
||||
reg-names = "mpu", "dat"; |
||||
interrupts = <54>; |
||||
interrupt-names = "common"; |
||||
status = "disabled"; |
||||
dmas = <&edma0 1 1>, |
||||
<&edma0 0 1>; |
||||
dma-names = "tx", "rx"; |
||||
}; |
||||
|
||||
lcdc: display@213000 { |
||||
compatible = "ti,da850-tilcdc"; |
||||
reg = <0x213000 0x1000>; |
||||
interrupts = <52>; |
||||
max-pixelclock = <37500>; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
aemif: aemif@68000000 { |
||||
compatible = "ti,da850-aemif"; |
||||
#address-cells = <2>; |
||||
#size-cells = <1>; |
||||
|
||||
reg = <0x68000000 0x00008000>; |
||||
ranges = <0 0 0x60000000 0x08000000 |
||||
1 0 0x68000000 0x00008000>; |
||||
status = "disabled"; |
||||
}; |
||||
memctrl: memory-controller@b0000000 { |
||||
compatible = "ti,da850-ddr-controller"; |
||||
reg = <0xb0000000 0xe8>; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,47 @@ |
||||
/* |
||||
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
*/ |
||||
|
||||
/* |
||||
* Integrated Power Management Chip |
||||
* http://www.ti.com/lit/ds/symlink/tps65070.pdf |
||||
*/ |
||||
|
||||
&tps { |
||||
compatible = "ti,tps6507x"; |
||||
|
||||
regulators { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
vdcdc1_reg: regulator@0 { |
||||
reg = <0>; |
||||
regulator-compatible = "VDCDC1"; |
||||
}; |
||||
|
||||
vdcdc2_reg: regulator@1 { |
||||
reg = <1>; |
||||
regulator-compatible = "VDCDC2"; |
||||
}; |
||||
|
||||
vdcdc3_reg: regulator@2 { |
||||
reg = <2>; |
||||
regulator-compatible = "VDCDC3"; |
||||
}; |
||||
|
||||
ldo1_reg: regulator@3 { |
||||
reg = <3>; |
||||
regulator-compatible = "LDO1"; |
||||
}; |
||||
|
||||
ldo2_reg: regulator@4 { |
||||
reg = <4>; |
||||
regulator-compatible = "LDO2"; |
||||
}; |
||||
|
||||
}; |
||||
}; |
||||
Loading…
Reference in new issue