This i.MX28 platform supports the following: * 2x FEC ethernet * USB on USBH0 * I2C EEPROM * SPI NVRAM * LEDs Signed-off-by: Marek Vasut <marex@denx.de>master
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#
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# (C) Copyright 2000-2012
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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ifndef CONFIG_SPL_BUILD |
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COBJS := sc_sps_1.o
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else |
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COBJS := spl_boot.o
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endif |
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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/*
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* SchulerControl GmbH, SC_SPS_1 module |
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* |
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* Copyright (C) 2012 Marek Vasut <marex@denx.de> |
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* on behalf of DENX Software Engineering GmbH |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/gpio.h> |
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#include <asm/io.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/iomux-mx28.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/sys_proto.h> |
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#include <linux/mii.h> |
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#include <miiphy.h> |
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#include <netdev.h> |
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#include <errno.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/*
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* Functions |
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*/ |
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int board_early_init_f(void) |
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{ |
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/* IO0 clock at 480MHz */ |
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mx28_set_ioclk(MXC_IOCLK0, 480000); |
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/* IO1 clock at 480MHz */ |
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mx28_set_ioclk(MXC_IOCLK1, 480000); |
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/* SSP0 clock at 96MHz */ |
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mx28_set_sspclk(MXC_SSPCLK0, 96000, 0); |
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/* SSP2 clock at 96MHz */ |
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mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); |
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#ifdef CONFIG_CMD_USB |
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mxs_iomux_setup_pad(MX28_PAD_AUART1_CTS__USB0_OVERCURRENT); |
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mxs_iomux_setup_pad(MX28_PAD_AUART2_TX__GPIO_3_9 | |
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MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL); |
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gpio_direction_output(MX28_PAD_AUART2_TX__GPIO_3_9, 1); |
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#endif |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* Adress of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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return mx28_dram_init(); |
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} |
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#ifdef CONFIG_CMD_MMC |
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int board_mmc_init(bd_t *bis) |
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{ |
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return mxsmmc_initialize(bis, 0, NULL); |
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} |
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#endif |
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#ifdef CONFIG_CMD_NET |
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int board_eth_init(bd_t *bis) |
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{ |
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struct mx28_clkctrl_regs *clkctrl_regs = |
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(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; |
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int ret; |
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ret = cpu_eth_init(bis); |
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clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet, |
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CLKCTRL_ENET_TIME_SEL_MASK, |
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CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN); |
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ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE); |
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if (ret) { |
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printf("FEC MXS: Unable to init FEC0\n"); |
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return ret; |
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} |
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ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE); |
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if (ret) { |
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printf("FEC MXS: Unable to init FEC1\n"); |
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return ret; |
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} |
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return ret; |
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} |
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#endif |
@ -0,0 +1,165 @@ |
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/*
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* SchulerControl GmbH, SC_SPS_1 module setup |
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* |
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* Copyright (C) 2012 Marek Vasut <marex@denx.de> |
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* on behalf of DENX Software Engineering GmbH |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <asm/io.h> |
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#include <asm/arch/iomux-mx28.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/sys_proto.h> |
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#define MUX_CONFIG_LED (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) |
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#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP) |
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#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP) |
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#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) |
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#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) |
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const iomux_cfg_t iomux_setup[] = { |
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/* -- Strick 3 -- */ |
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/* FEC Ethernet */ |
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MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_TX_CLK__GPIO_4_5, /* ENET INT */ |
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MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET, |
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MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET, |
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MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET, |
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/* -- Strick 4 -- */ |
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/* EMI */ |
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MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI, |
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MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI, |
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/* -- Strick 5 -- */ |
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/* MMC0 */ |
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MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0, |
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MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0, |
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MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0, |
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MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0, |
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MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0, |
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MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), |
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MX28_PAD_SSP0_SCK__SSP0_SCK | |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), |
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/* SPI2 (for flash) */ |
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MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2, |
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MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2, |
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MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2, |
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MX28_PAD_SSP2_SS0__SSP2_D3 | |
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(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), |
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/* -- Strick 6 -- */ |
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/* I2C */ |
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MX28_PAD_I2C0_SCL__I2C0_SCL, |
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MX28_PAD_I2C0_SDA__I2C0_SDA, |
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/* AUART0 */ |
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MX28_PAD_AUART0_TX__AUART0_TX, |
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MX28_PAD_AUART0_RX__AUART0_RX, |
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/* MEGA interface */ |
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/* Debug UART */ |
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MX28_PAD_PWM0__DUART_RX, |
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MX28_PAD_PWM1__DUART_TX, |
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/* LED */ |
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MX28_PAD_GPMI_D00__GPIO_0_0 | MUX_CONFIG_LED, |
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MX28_PAD_GPMI_D03__GPIO_0_3 | MUX_CONFIG_LED, |
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MX28_PAD_GPMI_D06__GPIO_0_6 | MUX_CONFIG_LED, |
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}; |
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void board_init_ll(void) |
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{ |
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mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); |
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} |
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void mx28_adjust_memory_params(uint32_t *dram_vals) |
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{ |
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dram_vals[0x74 >> 2] = 0x0f02010a; |
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} |
@ -0,0 +1,208 @@ |
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/*
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* SchulerControl GmbH, SC_SPS_1 module config |
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* |
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* Copyright (C) 2012 Marek Vasut <marex@denx.de> |
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* on behalf of DENX Software Engineering GmbH |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __SC_SPS_1_H__ |
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#define __SC_SPS_1_H__ |
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#include <asm/arch/regs-base.h> |
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/*
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* SoC configurations |
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*/ |
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#define CONFIG_MX28 /* i.MX28 SoC */ |
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#define CONFIG_MXS_GPIO /* GPIO control */ |
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#define CONFIG_SYS_HZ 1000 /* Ticks per second */ |
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/*
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* Define SC_SPS_1 machine type by hand until it lands in mach-types |
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*/ |
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#define MACH_TYPE_SC_SPS_1 4172 |
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#define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1 |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_SYS_ICACHE_OFF |
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#define CONFIG_SYS_DCACHE_OFF |
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#define CONFIG_BOARD_EARLY_INIT_F |
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#define CONFIG_ARCH_CPU_INIT |
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#define CONFIG_ARCH_MISC_INIT |
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#define CONFIG_ENV_IS_IN_MMC |
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#define CONFIG_OF_LIBFDT |
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/*
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* SPL |
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*/ |
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#define CONFIG_SPL |
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#define CONFIG_SPL_NO_CPU_SUPPORT_CODE |
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#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28" |
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" |
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#define CONFIG_SPL_LIBCOMMON_SUPPORT |
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#define CONFIG_SPL_LIBGENERIC_SUPPORT |
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#define CONFIG_SPL_GPIO_SUPPORT |
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/*
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* U-Boot Commands |
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*/ |
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#include <config_cmd_default.h> |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_DOS_PARTITION |
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#define CONFIG_CMD_CACHE |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_CMD_EXT2 |
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#define CONFIG_CMD_FAT |
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#define CONFIG_CMD_GPIO |
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#define CONFIG_CMD_MII |
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#define CONFIG_CMD_MMC |
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#define CONFIG_CMD_NET |
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#define CONFIG_CMD_NFS |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_SETEXPR |
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#define CONFIG_CMD_USB |
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/*
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* Memory configurations |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
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#define PHYS_SDRAM_1 0x40000000 /* Base address */ |
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ |
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#define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ |
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#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ |
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ |
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#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ |
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#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
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/* Point initial SP in SRAM so SPL can use it too. */ |
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 |
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#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) |
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#define CONFIG_SYS_INIT_SP_OFFSET \ |
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_ADDR \ |
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
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/*
|
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* We need to sacrifice first 4 bytes of RAM here to avoid triggering some |
||||
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot |
||||
* binary. In case there was more of this mess, 0x100 bytes are skipped. |
||||
*/ |
||||
#define CONFIG_SYS_TEXT_BASE 0x40000100 |
||||
|
||||
/*
|
||||
* U-Boot general configurations |
||||
*/ |
||||
#define CONFIG_SYS_LONGHELP |
||||
#define CONFIG_SYS_PROMPT "=> " |
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ |
||||
#define CONFIG_SYS_PBSIZE \ |
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
/* Print buffer size */ |
||||
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ |
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
||||
/* Boot argument buffer size */ |
||||
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ |
||||
#define CONFIG_AUTO_COMPLETE /* Command auto complete */ |
||||
#define CONFIG_CMDLINE_EDITING /* Command history etc */ |
||||
#define CONFIG_SYS_HUSH_PARSER |
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
||||
|
||||
/*
|
||||
* Serial Driver |
||||
*/ |
||||
#define CONFIG_PL011_SERIAL |
||||
#define CONFIG_PL011_CLOCK 24000000 |
||||
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } |
||||
#define CONFIG_CONS_INDEX 0 |
||||
#define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
||||
|
||||
/*
|
||||
* MMC Driver |
||||
*/ |
||||
#ifdef CONFIG_CMD_MMC |
||||
#define CONFIG_APBH_DMA |
||||
#define CONFIG_MMC |
||||
#define CONFIG_MMC_BOUNCE_BUFFER |
||||
#define CONFIG_GENERIC_MMC |
||||
#define CONFIG_MXS_MMC |
||||
#endif |
||||
#define CONFIG_ENV_SIZE (16 * 1024) |
||||
#ifdef CONFIG_ENV_IS_IN_MMC |
||||
#define CONFIG_ENV_OFFSET (256 * 1024) |
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 |
||||
#else |
||||
#define CONFIG_ENV_IS_NOWHERE |
||||
#endif |
||||
|
||||
/*
|
||||
* Ethernet on SOC (FEC) |
||||
*/ |
||||
#ifdef CONFIG_CMD_NET |
||||
#define CONFIG_ETHPRIME "FEC0" |
||||
#define CONFIG_FEC_MXC |
||||
#define CONFIG_FEC_MXC_MULTI |
||||
#define CONFIG_MII |
||||
#define CONFIG_DISCOVER_PHY |
||||
#define CONFIG_FEC_XCV_TYPE RMII |
||||
#define CONFIG_PHYLIB |
||||
#define CONFIG_PHY_SMSC |
||||
#endif |
||||
|
||||
/*
|
||||
* USB |
||||
*/ |
||||
#ifdef CONFIG_CMD_USB |
||||
#define CONFIG_USB_EHCI |
||||
#define CONFIG_USB_EHCI_MXS |
||||
#define CONFIG_EHCI_MXS_PORT 0 |
||||
#define CONFIG_EHCI_IS_TDI |
||||
#define CONFIG_USB_STORAGE |
||||
#endif |
||||
|
||||
/*
|
||||
* Boot Linux |
||||
*/ |
||||
#define CONFIG_CMDLINE_TAG |
||||
#define CONFIG_SETUP_MEMORY_TAGS |
||||
#define CONFIG_BOOTDELAY 3 |
||||
#define CONFIG_BOOTFILE "uImage" |
||||
#define CONFIG_BOOTARGS "console=ttyAMA0,115200" |
||||
#define CONFIG_BOOTCOMMAND "bootm " |
||||
#define CONFIG_LOADADDR 0x42000000 |
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
||||
|
||||
/*
|
||||
* Extra Environments |
||||
*/ |
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"update_sd_firmware_filename=u-boot.sd\0" \
|
||||
"update_sd_firmware=" /* Update the SD firmware partition */ \
|
||||
"if mmc rescan ; then " \
|
||||
"if tftp ${update_sd_firmware_filename} ; then " \
|
||||
"setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
|
||||
"setexpr fw_sz ${fw_sz} + 1 ; " \
|
||||
"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
|
||||
"fi ; " \
|
||||
"fi\0" |
||||
|
||||
#endif /* __SC_SPS_1_H__ */ |
Loading…
Reference in new issue