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@ -38,7 +38,12 @@ typedef struct { |
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xilinx_post_fn post; |
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} xilinx_spartan2_slave_serial_fns; |
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#if defined(CONFIG_FPGA_SPARTAN2) |
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extern struct xilinx_fpga_op spartan2_op; |
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# define FPGA_SPARTAN2_OPS &spartan2_op |
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#else |
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# define FPGA_SPARTAN2_OPS NULL |
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#endif |
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/* Device Image Sizes
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*********************************************************************/ |
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@ -61,36 +66,47 @@ extern struct xilinx_fpga_op spartan2_op; |
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*********************************************************************/ |
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/* Spartan-II devices */ |
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#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \ |
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{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op } |
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{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS } |
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#endif /* _SPARTAN2_H_ */ |
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