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@ -20,6 +20,17 @@ |
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#ifndef __ARCH_ARM_MACH_MX6_CCM_REGS_H__ |
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#define __ARCH_ARM_MACH_MX6_CCM_REGS_H__ |
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#define CCM_CCGR0 0x020C4068 |
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#define CCM_CCGR1 0x020C406c |
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#define CCM_CCGR2 0x020C4070 |
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#define CCM_CCGR3 0x020C4074 |
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#define CCM_CCGR4 0x020C4078 |
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#define CCM_CCGR5 0x020C407c |
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#define CCM_CCGR6 0x020C4080 |
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#define PMU_MISC2 0x020C8170 |
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#ifndef __ASSEMBLY__ |
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struct mxc_ccm_reg { |
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u32 ccr; /* 0x0000 */ |
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u32 ccdr; |
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@ -105,6 +116,7 @@ struct mxc_ccm_reg { |
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u32 analog_pfd_528_clr; |
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u32 analog_pfd_528_tog; |
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}; |
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#endif |
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/* Define the bits in register CCR */ |
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#define MXC_CCM_CCR_RBC_EN (1 << 27) |
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