The migration of boards from Makefile to boards.cfg was due for v2012.03, but smdk6400 did not follow, and it does not build, so move it to scrapyard. It will still be possible to restore it from the Git history before fixing it. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>master
Benoît Thébaudeau
12 years ago
committed by
Albert ARIBAUD
parent
7d5a5c79ca
commit
52587f1ef8
@ -1,5 +0,0 @@ |
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# |
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# Generated files |
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# |
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/config.tmp |
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@ -1,48 +0,0 @@ |
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#
|
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# (C) Copyright 2000, 2001, 2002
|
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
|
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# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
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#
|
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# See file CREDITS for list of people who contributed to this
|
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS-y := smdk6400.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(SOBJS) $(OBJS) |
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$(call cmd_link_o_target, $(SOBJS) $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -1,30 +0,0 @@ |
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#
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# (C) Copyright 2002
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# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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#
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# (C) Copyright 2008
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# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
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#
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# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
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#
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# see http://www.samsung.com/ for more information on SAMSUNG
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|
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# On SMDK6400 we use the 64 MB SDRAM bank at
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#
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# 0x50000000 to 0x58000000
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#
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# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
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#
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# we load ourselves to 0x57e00000 without MMU
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# with MMU, load address is changed to 0xc7e00000
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#
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# download area is 0x5000c000
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sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp |
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ifndef CONFIG_NAND_SPL |
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CONFIG_SYS_TEXT_BASE = $(RAM_TEXT)
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else |
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CONFIG_SYS_TEXT_BASE = 0
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endif |
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@ -1,323 +0,0 @@ |
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/* |
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* Memory Setup stuff - taken from blob memsetup.S |
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* |
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* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
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* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
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* |
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* Modified for the Samsung SMDK2410 by |
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* (C) Copyright 2002 |
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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* |
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* (C) Copyright 2008 |
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* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of
|
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <config.h> |
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#include <version.h> |
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#include <asm/arch/s3c6400.h> |
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#ifdef CONFIG_SERIAL1 |
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#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET) |
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#elif defined(CONFIG_SERIAL2) |
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#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET) |
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#else |
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#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET) |
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#endif |
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_TEXT_BASE: |
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.word CONFIG_SYS_TEXT_BASE
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.globl lowlevel_init
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lowlevel_init: |
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mov r12, lr |
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/* LED on only #8 */ |
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ldr r0, =ELFIN_GPIO_BASE |
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ldr r1, =0x55540000 |
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str r1, [r0, #GPNCON_OFFSET] |
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ldr r1, =0x55555555 |
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str r1, [r0, #GPNPUD_OFFSET] |
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ldr r1, =0xf000 |
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str r1, [r0, #GPNDAT_OFFSET] |
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/* Disable Watchdog */ |
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ldr r0, =0x7e000000 @0x7e004000
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orr r0, r0, #0x4000 |
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mov r1, #0 |
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str r1, [r0] |
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/* External interrupt pending clear */ |
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ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/ |
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ldr r1, [r0] |
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str r1, [r0] |
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ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000
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ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000
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/* Disable all interrupts (VIC0 and VIC1) */ |
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mvn r3, #0x0 |
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str r3, [r0, #oINTMSK] |
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str r3, [r1, #oINTMSK] |
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/* Set all interrupts as IRQ */ |
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mov r3, #0x0 |
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str r3, [r0, #oINTMOD] |
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str r3, [r1, #oINTMOD] |
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/* Pending Interrupt Clear */ |
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mov r3, #0x0 |
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str r3, [r0, #oVECTADDR] |
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str r3, [r1, #oVECTADDR] |
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/* init system clock */ |
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bl system_clock_init |
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#ifndef CONFIG_NAND_SPL |
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/* for UART */ |
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bl uart_asm_init |
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#endif |
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#ifdef CONFIG_BOOT_NAND |
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/* simple init for NAND */ |
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bl nand_asm_init |
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#endif |
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/* Memory subsystem address 0x7e00f120 */ |
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ldr r0, =ELFIN_MEM_SYS_CFG |
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/* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */ |
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mov r1, #S3C64XX_MEM_SYS_CFG_NAND |
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str r1, [r0] |
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bl mem_ctrl_asm_init |
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/* Wakeup support. Don't know if it's going to be used, untested. */ |
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ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) |
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ldr r1, [r0] |
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bic r1, r1, #0xfffffff7 |
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cmp r1, #0x8 |
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beq wakeup_reset |
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1: |
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mov lr, r12 |
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mov pc, lr |
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wakeup_reset: |
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/* Clear wakeup status register */ |
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ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) |
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ldr r1, [r0] |
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str r1, [r0] |
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/* LED test */ |
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ldr r0, =ELFIN_GPIO_BASE |
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ldr r1, =0x3000 |
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str r1, [r0, #GPNDAT_OFFSET] |
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/* Load return address and jump to kernel */ |
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ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) |
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/* r1 = physical address of s3c6400_cpu_resume function */ |
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ldr r1, [r0] |
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/* Jump to kernel (sleep-s3c6400.S) */ |
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mov pc, r1 |
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nop |
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nop |
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/* |
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* system_clock_init: Initialize core clock and bus clock. |
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* void system_clock_init(void) |
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*/ |
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system_clock_init: |
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ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */ |
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#ifdef CONFIG_SYNC_MODE |
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ldr r1, [r0, #OTHERS_OFFSET] |
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mov r2, #0x40 |
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orr r1, r1, r2 |
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str r1, [r0, #OTHERS_OFFSET] |
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nop |
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nop |
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nop |
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nop |
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nop |
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ldr r2, =0x80 |
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orr r1, r1, r2 |
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str r1, [r0, #OTHERS_OFFSET] |
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check_syncack: |
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ldr r1, [r0, #OTHERS_OFFSET] |
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ldr r2, =0xf00 |
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and r1, r1, r2 |
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cmp r1, #0xf00 |
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bne check_syncack |
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#else /* ASYNC Mode */ |
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nop |
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nop |
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nop |
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nop |
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nop |
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/* |
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* This was unconditional in original Samsung sources, but it doesn't |
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* seem to make much sense on S3C6400. |
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*/ |
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#ifndef CONFIG_S3C6400 |
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ldr r1, [r0, #OTHERS_OFFSET] |
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bic r1, r1, #0xC0 |
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orr r1, r1, #0x40 |
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str r1, [r0, #OTHERS_OFFSET] |
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wait_for_async: |
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ldr r1, [r0, #OTHERS_OFFSET] |
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and r1, r1, #0xf00 |
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cmp r1, #0x0 |
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bne wait_for_async |
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#endif |
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ldr r1, [r0, #OTHERS_OFFSET] |
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bic r1, r1, #0x40 |
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str r1, [r0, #OTHERS_OFFSET] |
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#endif |
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mov r1, #0xff00 |
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orr r1, r1, #0xff |
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str r1, [r0, #APLL_LOCK_OFFSET] |
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str r1, [r0, #MPLL_LOCK_OFFSET] |
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/* Set Clock Divider */ |
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ldr r1, [r0, #CLK_DIV0_OFFSET] |
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bic r1, r1, #0x30000 |
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bic r1, r1, #0xff00 |
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bic r1, r1, #0xff |
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ldr r2, =CLK_DIV_VAL |
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orr r1, r1, r2 |
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str r1, [r0, #CLK_DIV0_OFFSET] |
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ldr r1, =APLL_VAL |
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str r1, [r0, #APLL_CON_OFFSET] |
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ldr r1, =MPLL_VAL |
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str r1, [r0, #MPLL_CON_OFFSET] |
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/* FOUT of EPLL is 96MHz */ |
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ldr r1, =0x200203 |
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str r1, [r0, #EPLL_CON0_OFFSET] |
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ldr r1, =0x0 |
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str r1, [r0, #EPLL_CON1_OFFSET] |
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/* APLL, MPLL, EPLL select to Fout */ |
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ldr r1, [r0, #CLK_SRC_OFFSET] |
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orr r1, r1, #0x7 |
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str r1, [r0, #CLK_SRC_OFFSET] |
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/* wait at least 200us to stablize all clock */ |
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mov r1, #0x10000 |
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1: subs r1, r1, #1 |
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bne 1b |
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|
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/* Synchronization for VIC port */ |
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#if defined(CONFIG_SYNC_MODE) |
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ldr r1, [r0, #OTHERS_OFFSET] |
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orr r1, r1, #0x20 |
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str r1, [r0, #OTHERS_OFFSET] |
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#elif !defined(CONFIG_S3C6400) |
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/* According to 661558um_S3C6400X_rev10.pdf 0x20 is reserved */ |
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ldr r1, [r0, #OTHERS_OFFSET] |
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bic r1, r1, #0x20 |
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str r1, [r0, #OTHERS_OFFSET] |
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#endif |
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mov pc, lr |
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#ifndef CONFIG_NAND_SPL |
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/* |
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* uart_asm_init: Initialize UART's pins |
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*/ |
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uart_asm_init: |
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/* set GPIO to enable UART */ |
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ldr r0, =ELFIN_GPIO_BASE |
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ldr r1, =0x220022 |
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str r1, [r0, #GPACON_OFFSET] |
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mov pc, lr |
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#endif |
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#ifdef CONFIG_BOOT_NAND |
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/* |
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* NAND Interface init for SMDK6400 |
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*/ |
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nand_asm_init: |
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ldr r0, =ELFIN_NAND_BASE |
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ldr r1, [r0, #NFCONF_OFFSET] |
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orr r1, r1, #0x70 |
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orr r1, r1, #0x7700 |
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str r1, [r0, #NFCONF_OFFSET] |
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ldr r1, [r0, #NFCONT_OFFSET] |
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orr r1, r1, #0x07 |
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str r1, [r0, #NFCONT_OFFSET] |
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mov pc, lr |
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#endif |
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#ifdef CONFIG_ENABLE_MMU |
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/* |
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* MMU Table for SMDK6400 |
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*/ |
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|
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/* form a first-level section entry */ |
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.macro FL_SECTION_ENTRY base,ap,d,c,b |
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.word (\base << 20) | (\ap << 10) | \ |
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(\d << 5) | (1<<4) | (\c << 3) | (\b << 2) | (1<<1) |
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.endm |
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.section .mmudata, "a" |
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.align 14
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/* the following alignment creates the mmu table at address 0x4000. */ |
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.globl mmu_table
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mmu_table: |
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.set __base, 0 |
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/* 1:1 mapping for debugging */ |
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.rept 0xA00
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FL_SECTION_ENTRY __base, 3, 0, 0, 0 |
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.set __base, __base + 1 |
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.endr |
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/* access is not allowed. */ |
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.rept 0xC00 - 0xA00 |
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.word 0x00000000
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.endr |
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/* 128MB for SDRAM 0xC0000000 -> 0x50000000 */ |
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.set __base, 0x500 |
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.rept 0xC80 - 0xC00 |
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FL_SECTION_ENTRY __base, 3, 0, 1, 1 |
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.set __base, __base + 1 |
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.endr |
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|
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/* access is not allowed. */ |
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.rept 0x1000 - 0xc80 |
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.word 0x00000000
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.endr |
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#endif |
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@ -1,134 +0,0 @@ |
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/*
|
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* (C) Copyright 2002 |
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> |
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* |
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* (C) Copyright 2008 |
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* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
||||
* project. |
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* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <netdev.h> |
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#include <asm/arch/s3c6400.h> |
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|
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DECLARE_GLOBAL_DATA_PTR; |
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|
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/* ------------------------------------------------------------------------- */ |
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#define CS8900_Tacs 0x0 /* 0clk address set-up */ |
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#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */ |
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#define CS8900_Tacc 0xE /* 14clk access cycle */ |
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#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */ |
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#define CS8900_Tah 0x4 /* 4clk address holding time */ |
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#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */ |
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#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */ |
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|
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static inline void delay(unsigned long loops) |
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{ |
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__asm__ volatile ("1:\n" "subs %0, %1, #1\n" |
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"bne 1b" |
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: "=r" (loops) : "0" (loops)); |
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} |
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|
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/*
|
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* Miscellaneous platform dependent initialisations |
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*/ |
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|
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static void cs8900_pre_init(void) |
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{ |
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SROM_BW_REG &= ~(0xf << 4); |
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SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4); |
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SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) + |
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(CS8900_Tacc << 16) + (CS8900_Tcoh << 12) + |
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(CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC); |
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} |
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|
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int board_init(void) |
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{ |
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cs8900_pre_init(); |
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|
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/* NOR-flash in SROM0 */ |
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|
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/* Enable WAIT */ |
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SROM_BW_REG |= 4 | 8 | 1; |
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|
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
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|
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return 0; |
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} |
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|
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void dram_init_banksize(void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
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} |
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|
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, |
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PHYS_SDRAM_1_SIZE); |
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|
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return 0; |
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} |
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|
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#ifdef CONFIG_DISPLAY_BOARDINFO |
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int checkboard(void) |
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{ |
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printf("Board: SMDK6400\n"); |
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return 0; |
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} |
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#endif |
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|
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#ifdef CONFIG_ENABLE_MMU |
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ulong virt_to_phy_smdk6400(ulong addr) |
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{ |
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if ((0xc0000000 <= addr) && (addr < 0xc8000000)) |
||||
return addr - 0xc0000000 + 0x50000000; |
||||
else |
||||
printf("do not support this address : %08lx\n", addr); |
||||
|
||||
return addr; |
||||
} |
||||
#endif |
||||
|
||||
ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info) |
||||
{ |
||||
if (banknum == 0) { /* non-CFI boot flash */ |
||||
info->portwidth = FLASH_CFI_16BIT; |
||||
info->chipwidth = FLASH_CFI_BY16; |
||||
info->interface = FLASH_CFI_X16; |
||||
return 1; |
||||
} else |
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_CMD_NET |
||||
int board_eth_init(bd_t *bis) |
||||
{ |
||||
int rc = 0; |
||||
#ifdef CONFIG_CS8900 |
||||
rc = cs8900_initialize(0, CONFIG_CS8900_BASE); |
||||
#endif |
||||
return rc; |
||||
} |
||||
#endif |
||||
@ -1,36 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||
* Marius Groeger <mgroeger@sysgo.de> |
||||
* |
||||
* (C) Copyright 2002 |
||||
* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> |
||||
* |
||||
* (C) Copyright 2008 |
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
|
||||
void board_init_f(unsigned long bootflag) |
||||
{ |
||||
relocate_code(CONFIG_SYS_TEXT_BASE); |
||||
} |
||||
@ -1,90 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2002 |
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
||||
* |
||||
* (C) Copyright 2008 |
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
||||
OUTPUT_ARCH(arm) |
||||
ENTRY(_start) |
||||
SECTIONS |
||||
{ |
||||
. = 0x00000000; |
||||
|
||||
. = ALIGN(4); |
||||
.text : |
||||
{ |
||||
arch/arm/cpu/arm1176/start.o (.text) |
||||
*(.text) |
||||
} |
||||
|
||||
. = ALIGN(4); |
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
||||
|
||||
. = ALIGN(4); |
||||
.data : { *(.data) } |
||||
|
||||
. = ALIGN(4); |
||||
.got : { *(.got) } |
||||
|
||||
|
||||
. = align(4); |
||||
.u_boot_list : { |
||||
KEEP(*(SORT(.u_boot_list*))); |
||||
} |
||||
|
||||
. = ALIGN(4); |
||||
|
||||
__image_copy_end = .; |
||||
|
||||
. = align(4); |
||||
.mmudata : { *(.mmudata) } |
||||
|
||||
. = ALIGN(4); |
||||
|
||||
.rel.dyn : { |
||||
__rel_dyn_start = .; |
||||
*(.rel*) |
||||
__rel_dyn_end = .; |
||||
} |
||||
|
||||
.dynsym : { |
||||
__dynsym_start = .; |
||||
*(.dynsym) |
||||
} |
||||
|
||||
_end = .; |
||||
|
||||
.bss __rel_dyn_start (OVERLAY) : { |
||||
__bss_start = .; |
||||
*(.bss) |
||||
. = ALIGN(4); |
||||
__bss_end = .; |
||||
} |
||||
|
||||
/DISCARD/ : { *(.dynstr*) } |
||||
/DISCARD/ : { *(.dynamic*) } |
||||
/DISCARD/ : { *(.plt*) } |
||||
/DISCARD/ : { *(.interp*) } |
||||
/DISCARD/ : { *(.gnu*) } |
||||
} |
||||
@ -1,296 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||
* Marius Groeger <mgroeger@sysgo.de> |
||||
* Gary Jennejohn <garyj@denx.de> |
||||
* David Mueller <d.mueller@elsoft.ch> |
||||
* |
||||
* (C) Copyright 2008 |
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> |
||||
* |
||||
* Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
#define CONFIG_S3C6400 1 /* in a SAMSUNG S3C6400 SoC */ |
||||
#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */ |
||||
#define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */ |
||||
|
||||
#define CONFIG_PERIPORT_REMAP |
||||
#define CONFIG_PERIPORT_BASE 0x70000000 |
||||
#define CONFIG_PERIPORT_SIZE 0x13 |
||||
|
||||
#define CONFIG_SYS_IRAM_BASE 0x0c000000 /* Internal SRAM base address */ |
||||
#define CONFIG_SYS_IRAM_SIZE 0x2000 /* 8 KB of internal SRAM memory */ |
||||
#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE) |
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE) |
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x50000000 |
||||
|
||||
/* input clock of PLL: SMDK6400 has 12MHz input clock */ |
||||
#define CONFIG_SYS_CLK_FREQ 12000000 |
||||
|
||||
#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) |
||||
#define CONFIG_ENABLE_MMU |
||||
#endif |
||||
|
||||
#define CONFIG_SETUP_MEMORY_TAGS |
||||
#define CONFIG_CMDLINE_TAG |
||||
#define CONFIG_INITRD_TAG |
||||
|
||||
/*
|
||||
* Architecture magic and machine type |
||||
*/ |
||||
#define CONFIG_MACH_TYPE 1270 |
||||
|
||||
#define CONFIG_DISPLAY_CPUINFO |
||||
#define CONFIG_DISPLAY_BOARDINFO |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) |
||||
|
||||
/*
|
||||
* Hardware drivers |
||||
*/ |
||||
#define CONFIG_CS8900 /* we have a CS8900 on-board */ |
||||
#define CONFIG_CS8900_BASE 0x18800300 |
||||
#define CONFIG_CS8900_BUS16 /* follow the Linux driver */ |
||||
|
||||
/*
|
||||
* select serial console configuration |
||||
*/ |
||||
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */ |
||||
|
||||
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
||||
|
||||
#define CONFIG_CMDLINE_EDITING |
||||
|
||||
/* allow to overwrite serial and ethaddr */ |
||||
#define CONFIG_ENV_OVERWRITE |
||||
|
||||
#define CONFIG_BAUDRATE 115200 |
||||
|
||||
/***********************************************************
|
||||
* Command definition |
||||
***********************************************************/ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_CACHE |
||||
#define CONFIG_CMD_REGINFO |
||||
#define CONFIG_CMD_LOADS |
||||
#define CONFIG_CMD_LOADB |
||||
#define CONFIG_CMD_SAVEENV |
||||
#define CONFIG_CMD_NAND |
||||
#if defined(CONFIG_BOOT_ONENAND) |
||||
#define CONFIG_CMD_ONENAND |
||||
#endif |
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_ELF |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_EXT2 |
||||
|
||||
#define CONFIG_BOOTDELAY 3 |
||||
|
||||
#define CONFIG_ZERO_BOOTDELAY_CHECK |
||||
|
||||
#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) |
||||
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
||||
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
||||
#endif |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
||||
#define CONFIG_SYS_PROMPT "SMDK6400 # " /* Monitor Command Prompt */ |
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */ |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */ |
||||
|
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/**********************************
|
||||
Support Clock Settings |
||||
********************************** |
||||
Setting SYNC ASYNC |
||||
---------------------------------- |
||||
667_133_66 X O |
||||
533_133_66 O O |
||||
400_133_66 X O |
||||
400_100_50 O O |
||||
**********************************/ |
||||
|
||||
/*#define CONFIG_CLK_667_133_66*/ |
||||
#define CONFIG_CLK_533_133_66 |
||||
/*
|
||||
#define CONFIG_CLK_400_100_50 |
||||
#define CONFIG_CLK_400_133_66 |
||||
#define CONFIG_SYNC_MODE |
||||
*/ |
||||
|
||||
/* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ |
||||
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */ |
||||
|
||||
#define CONFIG_SYS_FLASH_BASE 0x10000000 |
||||
#define CONFIG_SYS_MONITOR_BASE 0x00000000 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization |
||||
*/ |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
/* AM29LV160B has 35 sectors, AM29LV800B - 19 */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 40 |
||||
|
||||
#define CONFIG_AMD_LV800 |
||||
#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */ |
||||
/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */ |
||||
#define CONFIG_FLASH_CFI_DRIVER 1 |
||||
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
||||
#define CONFIG_FLASH_CFI_LEGACY |
||||
#define CONFIG_SYS_FLASH_LEGACY_512Kx16 |
||||
|
||||
/* timeout values are in ticks */ |
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
||||
|
||||
#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ |
||||
|
||||
/*
|
||||
* SMDK6400 board specific data |
||||
*/ |
||||
|
||||
#define CONFIG_IDENT_STRING " for SMDK6400" |
||||
|
||||
/* base address for uboot */ |
||||
#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x07e00000) |
||||
/* total memory available to uboot */ |
||||
#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) |
||||
|
||||
/* Put environment copies after the end of U-Boot owned RAM */ |
||||
#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) |
||||
|
||||
#ifdef CONFIG_ENABLE_MMU |
||||
#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 |
||||
#define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \ |
||||
"bootm 0xc0018000" |
||||
#else |
||||
#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE |
||||
#define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \ |
||||
"bootm 0x50018000" |
||||
#endif |
||||
|
||||
/* NAND U-Boot load and start address */ |
||||
#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000) |
||||
|
||||
#define CONFIG_ENV_OFFSET 0x0040000 |
||||
|
||||
/* NAND configuration */ |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define CONFIG_SYS_NAND_BASE 0x70200010 |
||||
#define CONFIG_SYS_S3C_NAND_HWECC |
||||
|
||||
#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ |
||||
#define CONFIG_SYS_NAND_WP 1 |
||||
#define CONFIG_SYS_NAND_YAFFS_WRITE 1 /* support yaffs write */ |
||||
#define CONFIG_SYS_NAND_BBT_2NDPAGE 1 /* bad-block markers in 1st and 2nd pages */ |
||||
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */ |
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */ |
||||
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */ |
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */ |
||||
|
||||
/* NAND chip page size */ |
||||
#define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
||||
/* NAND chip block size */ |
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
||||
/* NAND chip page per block count */ |
||||
#define CONFIG_SYS_NAND_PAGE_COUNT 64 |
||||
/* Location of the bad-block label */ |
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
||||
/* Extra address cycle for > 128MiB */ |
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE |
||||
|
||||
/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */ |
||||
#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE |
||||
/* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */ |
||||
#define CONFIG_SYS_NAND_ECCBYTES 4 |
||||
/* Size of a single OOB region */ |
||||
#define CONFIG_SYS_NAND_OOBSIZE 64 |
||||
/* ECC byte positions */ |
||||
#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \ |
||||
48, 49, 50, 51, 52, 53, 54, 55, \
|
||||
56, 57, 58, 59, 60, 61, 62, 63} |
||||
|
||||
/* Boot configuration (define only one of next 3) */ |
||||
#define CONFIG_BOOT_NAND |
||||
/* None of these are currently implemented. Left from the original Samsung
|
||||
* version for reference |
||||
#define CONFIG_BOOT_NOR |
||||
#define CONFIG_BOOT_MOVINAND |
||||
#define CONFIG_BOOT_ONENAND |
||||
*/ |
||||
|
||||
#define CONFIG_NAND |
||||
#define CONFIG_NAND_S3C64XX |
||||
/* Unimplemented or unsupported. See comment above.
|
||||
#define CONFIG_ONENAND |
||||
#define CONFIG_MOVINAND |
||||
*/ |
||||
|
||||
/* Settings as above boot configuration */ |
||||
#define CONFIG_ENV_IS_IN_NAND |
||||
#define CONFIG_BOOTARGS "console=ttySAC,115200" |
||||
|
||||
#if !defined(CONFIG_ENABLE_MMU) |
||||
#define CONFIG_CMD_USB 1 |
||||
#define CONFIG_USB_S3C64XX |
||||
#define CONFIG_USB_OHCI_NEW 1 |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000 |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
||||
|
||||
#define CONFIG_USB_STORAGE 1 |
||||
#endif |
||||
#define CONFIG_DOS_PARTITION 1 |
||||
|
||||
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU) |
||||
# error "usb_ohci.c is currently broken with MMU enabled." |
||||
#endif |
||||
|
||||
#endif /* __CONFIG_H */ |
||||
@ -1,117 +0,0 @@ |
||||
#
|
||||
# (C) Copyright 2006-2007
|
||||
# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
CONFIG_NAND_SPL = y
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk |
||||
|
||||
nandobj := $(OBJTREE)/nand_spl/
|
||||
|
||||
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
|
||||
LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
|
||||
$(LDFLAGS_FINAL) -gc-sections
|
||||
AFLAGS += -DCONFIG_NAND_SPL
|
||||
CFLAGS += -DCONFIG_NAND_SPL -ffunction-sections
|
||||
|
||||
SOBJS = start.o cpu_init.o lowlevel_init.o
|
||||
COBJS = nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o nand_base.o
|
||||
|
||||
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
__OBJS := $(SOBJS) $(COBJS)
|
||||
LNDIR := $(nandobj)board/$(BOARDDIR)
|
||||
|
||||
ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
|
||||
|
||||
all: $(obj).depend $(ALL) |
||||
|
||||
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl |
||||
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl |
||||
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds |
||||
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
|
||||
-Map $(nandobj)u-boot-spl.map \
|
||||
-o $(nandobj)u-boot-spl
|
||||
|
||||
$(nandobj)u-boot.lds: $(LDSCRIPT) |
||||
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
|
||||
|
||||
# create symbolic links for common files
|
||||
|
||||
# from cpu directory
|
||||
$(obj)start.S: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/arch/arm/cpu/arm1176/start.S $@
|
||||
|
||||
# from SoC directory
|
||||
$(obj)cpu_init.S: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S $@
|
||||
|
||||
# from board directory
|
||||
$(obj)lowlevel_init.S: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/board/samsung/smdk6400/lowlevel_init.S $@
|
||||
|
||||
# from nand_spl directory
|
||||
$(obj)nand_boot.c: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/nand_spl/nand_boot.c $@
|
||||
|
||||
# from drivers/mtd/nand directory
|
||||
$(obj)nand_ecc.c: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/drivers/mtd/nand/nand_ecc.c $@
|
||||
|
||||
$(obj)s3c64xx.c: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/drivers/mtd/nand/s3c64xx.c $@
|
||||
|
||||
$(obj)smdk6400_nand_spl.c: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/board/samsung/smdk6400/smdk6400_nand_spl.c $@
|
||||
|
||||
$(obj)nand_base.c: |
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/drivers/mtd/nand/nand_base.c $@
|
||||
#########################################################################
|
||||
|
||||
$(obj)%.o: $(obj)%.S |
||||
$(CC) $(AFLAGS) -c -o $@ $<
|
||||
|
||||
$(obj)%.o: $(obj)%.c |
||||
$(CC) $(CFLAGS) -c -o $@ $<
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
||||
@ -1,40 +0,0 @@ |
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
#
|
||||
# Samsung S3C64xx Reference Platform (smdk6400) board
|
||||
|
||||
# CONFIG_SYS_TEXT_BASE for SPL:
|
||||
#
|
||||
# On S3C64xx platforms the SPL is located in SRAM at 0.
|
||||
#
|
||||
# CONFIG_SYS_TEXT_BASE = 0
|
||||
|
||||
include $(TOPDIR)/board/$(BOARDDIR)/config.mk |
||||
|
||||
# PAD_TO used to generate a 4kByte binary needed for the combined image
|
||||
# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 4096
|
||||
PAD_TO := $(shell expr $$[$(CONFIG_SYS_TEXT_BASE) + 4096])
|
||||
|
||||
ifeq ($(debug),1) |
||||
PLATFORM_CPPFLAGS += -DDEBUG
|
||||
endif |
||||
@ -1,82 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2002 |
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
||||
* |
||||
* (C) Copyright 2008 |
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
||||
OUTPUT_ARCH(arm) |
||||
ENTRY(_start) |
||||
SECTIONS |
||||
{ |
||||
. = 0x00000000; |
||||
|
||||
. = ALIGN(4); |
||||
.text : |
||||
{ |
||||
start.o (.text) |
||||
cpu_init.o (.text) |
||||
nand_boot.o (.text) |
||||
|
||||
*(.text) |
||||
} |
||||
|
||||
. = ALIGN(4); |
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
||||
|
||||
. = ALIGN(4); |
||||
.data : { *(.data) } |
||||
|
||||
. = ALIGN(4); |
||||
.got : { *(.got) } |
||||
|
||||
|
||||
. = ALIGN(4); |
||||
.u_boot_list : { |
||||
*(SORT(.u_boot_list*)); |
||||
} |
||||
|
||||
. = ALIGN(4); |
||||
|
||||
__image_copy_end = .; |
||||
|
||||
.rel.dyn : { |
||||
__rel_dyn_start = .; |
||||
*(.rel*) |
||||
__rel_dyn_end = .; |
||||
} |
||||
|
||||
.dynsym : { |
||||
__dynsym_start = .; |
||||
*(.dynsym) |
||||
} |
||||
|
||||
_end = .; |
||||
|
||||
.bss __rel_dyn_start (OVERLAY) : { |
||||
__bss_start = .; |
||||
*(.bss) |
||||
. = ALIGN(4); |
||||
__bss_end = .; |
||||
} |
||||
} |
||||
Loading…
Reference in new issue