As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.
This reverts commit 37434db29b
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Signed-off-by: Tom Rini <trini@konsulko.com>
master
parent
55b2556115
commit
5270df2836
@ -0,0 +1,84 @@ |
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/*
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* Register definitions for the Atmel AT32/AT91 SPI Controller |
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*/ |
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/* Register offsets */ |
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#define ATMEL_SPI_CR 0x0000 |
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#define ATMEL_SPI_MR 0x0004 |
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#define ATMEL_SPI_RDR 0x0008 |
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#define ATMEL_SPI_TDR 0x000c |
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#define ATMEL_SPI_SR 0x0010 |
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#define ATMEL_SPI_IER 0x0014 |
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#define ATMEL_SPI_IDR 0x0018 |
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#define ATMEL_SPI_IMR 0x001c |
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#define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x)) |
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#define ATMEL_SPI_VERSION 0x00fc |
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/* Bits in CR */ |
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#define ATMEL_SPI_CR_SPIEN BIT(0) |
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#define ATMEL_SPI_CR_SPIDIS BIT(1) |
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#define ATMEL_SPI_CR_SWRST BIT(7) |
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#define ATMEL_SPI_CR_LASTXFER BIT(24) |
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/* Bits in MR */ |
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#define ATMEL_SPI_MR_MSTR BIT(0) |
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#define ATMEL_SPI_MR_PS BIT(1) |
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#define ATMEL_SPI_MR_PCSDEC BIT(2) |
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#define ATMEL_SPI_MR_FDIV BIT(3) |
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#define ATMEL_SPI_MR_MODFDIS BIT(4) |
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#define ATMEL_SPI_MR_WDRBT BIT(5) |
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#define ATMEL_SPI_MR_LLB BIT(7) |
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#define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16) |
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#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24) |
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/* Bits in RDR */ |
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#define ATMEL_SPI_RDR_RD(x) (x) |
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#define ATMEL_SPI_RDR_PCS(x) ((x) << 16) |
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/* Bits in TDR */ |
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#define ATMEL_SPI_TDR_TD(x) (x) |
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#define ATMEL_SPI_TDR_PCS(x) ((x) << 16) |
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#define ATMEL_SPI_TDR_LASTXFER BIT(24) |
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/* Bits in SR/IER/IDR/IMR */ |
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#define ATMEL_SPI_SR_RDRF BIT(0) |
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#define ATMEL_SPI_SR_TDRE BIT(1) |
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#define ATMEL_SPI_SR_MODF BIT(2) |
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#define ATMEL_SPI_SR_OVRES BIT(3) |
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#define ATMEL_SPI_SR_ENDRX BIT(4) |
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#define ATMEL_SPI_SR_ENDTX BIT(5) |
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#define ATMEL_SPI_SR_RXBUFF BIT(6) |
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#define ATMEL_SPI_SR_TXBUFE BIT(7) |
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#define ATMEL_SPI_SR_NSSR BIT(8) |
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#define ATMEL_SPI_SR_TXEMPTY BIT(9) |
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#define ATMEL_SPI_SR_SPIENS BIT(16) |
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/* Bits in CSRx */ |
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#define ATMEL_SPI_CSRx_CPOL BIT(0) |
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#define ATMEL_SPI_CSRx_NCPHA BIT(1) |
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#define ATMEL_SPI_CSRx_CSAAT BIT(3) |
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#define ATMEL_SPI_CSRx_BITS(x) ((x) << 4) |
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#define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8) |
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#define ATMEL_SPI_CSRx_SCBR_MAX GENMASK(7, 0) |
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#define ATMEL_SPI_CSRx_DLYBS(x) ((x) << 16) |
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#define ATMEL_SPI_CSRx_DLYBCT(x) ((x) << 24) |
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/* Bits in VERSION */ |
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#define ATMEL_SPI_VERSION_REV(x) ((x) & 0xfff) |
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#define ATMEL_SPI_VERSION_MFN(x) ((x) << 16) |
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/* Constants for CSRx:BITS */ |
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#define ATMEL_SPI_BITS_8 0 |
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#define ATMEL_SPI_BITS_9 1 |
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#define ATMEL_SPI_BITS_10 2 |
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#define ATMEL_SPI_BITS_11 3 |
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#define ATMEL_SPI_BITS_12 4 |
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#define ATMEL_SPI_BITS_13 5 |
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#define ATMEL_SPI_BITS_14 6 |
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#define ATMEL_SPI_BITS_15 7 |
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#define ATMEL_SPI_BITS_16 8 |
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struct atmel_spi_slave { |
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void *regs; |
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u32 mr; |
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}; |
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