powerpc: P4080DS: Remove macro CONFIG_P4080DS

Use CONFIG_TARGET_P4080DS instead.

Signed-off-by: York Sun <york.sun@nxp.com>

board/freescale/common/Makefile

@@ -54,7 +54,7 @@ obj-$(CONFIG_TARGET_MPC8572DS)	+= ics307_clk.o
 obj-$(CONFIG_TARGET_P1022DS)		+= ics307_clk.o
 obj-$(CONFIG_P2020DS)		+= ics307_clk.o
 obj-$(CONFIG_TARGET_P3041DS)		+= ics307_clk.o
-obj-$(CONFIG_P4080DS)		+= ics307_clk.o
+obj-$(CONFIG_TARGET_P4080DS)		+= ics307_clk.o
 obj-$(CONFIG_P5020DS)		+= ics307_clk.o
 obj-$(CONFIG_P5040DS)		+= ics307_clk.o
 obj-$(CONFIG_VSC_CROSSBAR)    += vsc3316_3308.o
@@ -67,7 +67,7 @@ obj-$(CONFIG_LS102XA_STREAM_ID)	+= ls102xa_stream_id.o
 # deal with common files for P-series corenet based devices
 obj-$(CONFIG_TARGET_P2041RDB)	+= p_corenet/
 obj-$(CONFIG_TARGET_P3041DS)	+= p_corenet/
-obj-$(CONFIG_P4080DS)	+= p_corenet/
+obj-$(CONFIG_TARGET_P4080DS)	+= p_corenet/
 obj-$(CONFIG_P5020DS)	+= p_corenet/
 obj-$(CONFIG_P5040DS)	+= p_corenet/
 

board/freescale/corenet_ds/Makefile

@@ -9,10 +9,10 @@
 obj-y	+= corenet_ds.o
 obj-y	+= ddr.o
 obj-$(CONFIG_TARGET_P3041DS)	+= eth_hydra.o
-obj-$(CONFIG_P4080DS)	+= eth_p4080.o
+obj-$(CONFIG_TARGET_P4080DS)	+= eth_p4080.o
 obj-$(CONFIG_P5020DS)	+= eth_hydra.o
 obj-$(CONFIG_P5040DS)	+= eth_superhydra.o
 obj-$(CONFIG_TARGET_P3041DS)	+= p3041ds_ddr.o
-obj-$(CONFIG_P4080DS)	+= p4080ds_ddr.o
+obj-$(CONFIG_TARGET_P4080DS)	+= p4080ds_ddr.o
 obj-$(CONFIG_P5020DS)	+= p5020ds_ddr.o
 obj-$(CONFIG_P5040DS)	+= p5040ds_ddr.o

include/configs/P4080DS.h

@@ -8,8 +8,6 @@
  * P4080 DS board configuration file
  * Also supports P4040 DS
  */
-#define CONFIG_P4080DS
-
 #define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
 
 #define CONFIG_MMC

include/configs/corenet_ds.h

@@ -26,7 +26,7 @@
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg
 #if defined(CONFIG_TARGET_P3041DS)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg
-#elif defined(CONFIG_P4080DS)
+#elif defined(CONFIG_TARGET_P4080DS)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg
 #elif defined(CONFIG_P5020DS)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg
@@ -680,7 +680,7 @@
 
 #define CONFIG_BAUDRATE	115200
 
-#ifdef CONFIG_P4080DS
+#ifdef CONFIG_TARGET_P4080DS
 #define __USB_PHY_TYPE	ulpi
 #else
 #define __USB_PHY_TYPE	utmi

scripts/config_whitelist.txt

@@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR
 CONFIG_OS_ENV_ADDR
 CONFIG_OTHBOOTARGS
 CONFIG_OVERWRITE_ETHADDR_ONCE
-CONFIG_P4080DS
 CONFIG_P5020DS
 CONFIG_P5040DS
 CONFIG_PAGE_CNT_MASK