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arm, da850evm: Use the pinmux configurations defined in the arch tree

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The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the da850evm use these definitions instead of
defining its own.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
master
Christian Riesch 13 years ago committed by Albert ARIBAUD
parent 516fb1c4c0
commit 52b0f877a2
3 changed files with 27 additions and 128 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 153
      board/davinci/da8xxevm/da850evm.c
  2. 1
      include/configs/da850_am18xxevm.h
  3. 1
      include/configs/da850evm.h

153
board/davinci/da8xxevm/da850evm.c
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@ -28,135 +28,14 @@
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
#include <hwconfig.h>
DECLARE_GLOBAL_DATA_PTR;
/* SPI0 pin muxer settings */
static const struct pinmux_config spi1_pins[] = {
{ pinmux(5), 1, 1 },
{ pinmux(5), 1, 2 },
{ pinmux(5), 1, 4 },
{ pinmux(5), 1, 5 }
};
/* UART pin muxer settings */
static const struct pinmux_config uart_pins[] = {
{ pinmux(0), 4, 6 },
{ pinmux(0), 4, 7 },
{ pinmux(4), 2, 4 },
{ pinmux(4), 2, 5 }
};
#ifdef CONFIG_DRIVER_TI_EMAC
static const struct pinmux_config emac_pins[] = {
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
{ pinmux(14), 8, 2 },
{ pinmux(14), 8, 3 },
{ pinmux(14), 8, 4 },
{ pinmux(14), 8, 5 },
{ pinmux(14), 8, 6 },
{ pinmux(14), 8, 7 },
{ pinmux(15), 8, 1 },
#else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */
{ pinmux(2), 8, 1 },
{ pinmux(2), 8, 2 },
{ pinmux(2), 8, 3 },
{ pinmux(2), 8, 4 },
{ pinmux(2), 8, 5 },
{ pinmux(2), 8, 6 },
{ pinmux(2), 8, 7 },
{ pinmux(3), 8, 0 },
{ pinmux(3), 8, 1 },
{ pinmux(3), 8, 2 },
{ pinmux(3), 8, 3 },
{ pinmux(3), 8, 4 },
{ pinmux(3), 8, 5 },
{ pinmux(3), 8, 6 },
{ pinmux(3), 8, 7 },
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
{ pinmux(4), 8, 0 },
{ pinmux(4), 8, 1 }
};
/* I2C pin muxer settings */
static const struct pinmux_config i2c_pins[] = {
{ pinmux(4), 2, 2 },
{ pinmux(4), 2, 3 }
};
#ifdef CONFIG_NAND_DAVINCI
const struct pinmux_config nand_pins[] = {
{ pinmux(7), 1, 1 },
{ pinmux(7), 1, 2 },
{ pinmux(7), 1, 4 },
{ pinmux(7), 1, 5 },
{ pinmux(9), 1, 0 },
{ pinmux(9), 1, 1 },
{ pinmux(9), 1, 2 },
{ pinmux(9), 1, 3 },
{ pinmux(9), 1, 4 },
{ pinmux(9), 1, 5 },
{ pinmux(9), 1, 6 },
{ pinmux(9), 1, 7 },
{ pinmux(12), 1, 5 },
{ pinmux(12), 1, 6 }
};
#elif defined(CONFIG_USE_NOR)
/* NOR pin muxer settings */
const struct pinmux_config nor_pins[] = {
/* GP0[11] is required for NOR to work on Rev 3 EVMs */
{ pinmux(0), 8, 4 }, /* GP0[11] */
{ pinmux(5), 1, 6 },
{ pinmux(6), 1, 6 },
{ pinmux(7), 1, 0 },
{ pinmux(7), 1, 4 },
{ pinmux(7), 1, 5 },
{ pinmux(8), 1, 0 },
{ pinmux(8), 1, 1 },
{ pinmux(8), 1, 2 },
{ pinmux(8), 1, 3 },
{ pinmux(8), 1, 4 },
{ pinmux(8), 1, 5 },
{ pinmux(8), 1, 6 },
{ pinmux(8), 1, 7 },
{ pinmux(9), 1, 0 },
{ pinmux(9), 1, 1 },
{ pinmux(9), 1, 2 },
{ pinmux(9), 1, 3 },
{ pinmux(9), 1, 4 },
{ pinmux(9), 1, 5 },
{ pinmux(9), 1, 6 },
{ pinmux(9), 1, 7 },
{ pinmux(10), 1, 0 },
{ pinmux(10), 1, 1 },
{ pinmux(10), 1, 2 },
{ pinmux(10), 1, 3 },
{ pinmux(10), 1, 4 },
{ pinmux(10), 1, 5 },
{ pinmux(10), 1, 6 },
{ pinmux(10), 1, 7 },
{ pinmux(11), 1, 0 },
{ pinmux(11), 1, 1 },
{ pinmux(11), 1, 2 },
{ pinmux(11), 1, 3 },
{ pinmux(11), 1, 4 },
{ pinmux(11), 1, 5 },
{ pinmux(11), 1, 6 },
{ pinmux(11), 1, 7 },
{ pinmux(12), 1, 0 },
{ pinmux(12), 1, 1 },
{ pinmux(12), 1, 2 },
{ pinmux(12), 1, 3 },
{ pinmux(12), 1, 4 },
{ pinmux(12), 1, 5 },
{ pinmux(12), 1, 6 },
{ pinmux(12), 1, 7 }
};
#endif
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
#define HAS_RMII 1
#else
@ -222,20 +101,38 @@ int misc_init_r(void)
return 0;
}
static const struct pinmux_config gpio_pins[] = {
#ifdef CONFIG_USE_NOR
/* GP0[11] is required for NOR to work on Rev 3 EVMs */
{ pinmux(0), 8, 4 }, /* GP0[11] */
#endif
};
static const struct pinmux_resource pinmuxes[] = {
#ifdef CONFIG_DRIVER_TI_EMAC
PINMUX_ITEM(emac_pins),
PINMUX_ITEM(emac_pins_mdio),
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
PINMUX_ITEM(emac_pins_rmii),
#else
PINMUX_ITEM(emac_pins_mii),
#endif
#endif
#ifdef CONFIG_SPI_FLASH
PINMUX_ITEM(spi1_pins),
PINMUX_ITEM(spi1_pins_base),
PINMUX_ITEM(spi1_pins_scs0),
#endif
PINMUX_ITEM(uart_pins),
PINMUX_ITEM(i2c_pins),
PINMUX_ITEM(uart2_pins_txrx),
PINMUX_ITEM(uart2_pins_rtscts),
PINMUX_ITEM(i2c0_pins),
#ifdef CONFIG_NAND_DAVINCI
PINMUX_ITEM(nand_pins),
PINMUX_ITEM(emifa_pins_cs3),
PINMUX_ITEM(emifa_pins_cs4),
PINMUX_ITEM(emifa_pins_nand),
#elif defined(CONFIG_USE_NOR)
PINMUX_ITEM(nor_pins),
PINMUX_ITEM(emifa_pins_cs2),
PINMUX_ITEM(emifa_pins_nor),
#endif
PINMUX_ITEM(gpio_pins),
};
static const struct lpsc_resource lpsc[] = {

1
include/configs/da850_am18xxevm.h
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@ -36,6 +36,7 @@
#define CONFIG_MACH_DAVINCI_DA850_EVM
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
#define CONFIG_SOC_DA850 /* TI DA850 SoC */
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE

1
include/configs/da850evm.h
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@ -36,6 +36,7 @@
#define CONFIG_MACH_DAVINCI_DA850_EVM
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
#define CONFIG_SOC_DA850 /* TI DA850 SoC */
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE

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