x86: baytrail: Add 2nd eMMC controller to the PCI probe list

With this addition, the eMMC device available on the congatec and DFI
BayTrail SoM is detected correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

arch/x86/cpu/baytrail/valleyview.c

@@ -12,8 +12,9 @@
 #include <asm/post.h>
 
 static struct pci_device_id mmc_supported[] = {
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
 	{},
 };
 

include/pci_ids.h

@@ -2599,13 +2599,14 @@
 #define PCI_DEVICE_ID_INTEL_I960	0x0960
 #define PCI_DEVICE_ID_INTEL_I960RM	0x0962
 #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB	0x0c60
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO	0x0f15
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD	0x0f16
+#define PCI_DEVICE_ID_INTEL_BYT_SDIO		0x0f15
+#define PCI_DEVICE_ID_INTEL_BYT_SD		0x0f16
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC	0x0f1c
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE	0x0f20
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE_ALT	0x0f21
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA	0x0f22
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT	0x0f23
+#define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
 #define PCI_DEVICE_ID_INTEL_82541ER	0x1078
 #define PCI_DEVICE_ID_INTEL_82541GI_LF	0x107c
 #define PCI_DEVICE_ID_INTEL_82542	0x1000