This patch adds a SPI driver for the Marvell Kirkwood SoC's. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>master
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/*
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* (C) Copyright 2009 |
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* Marvell Semiconductor <www.marvell.com> |
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
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* |
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* Derived from drivers/spi/mpc8xxx_spi.c |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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* MA 02110-1301 USA |
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*/ |
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#include <common.h> |
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#include <malloc.h> |
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#include <spi.h> |
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#include <asm/arch/kirkwood.h> |
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#include <asm/arch/spi.h> |
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#include <asm/arch/mpp.h> |
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static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; |
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, |
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unsigned int max_hz, unsigned int mode) |
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{ |
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struct spi_slave *slave; |
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u32 data; |
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u32 kwspi_mpp_config[] = { |
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MPP0_GPIO, |
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MPP7_SPI_SCn, |
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0 |
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}; |
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if (!spi_cs_is_valid(bus, cs)) |
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return NULL; |
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slave = malloc(sizeof(struct spi_slave)); |
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if (!slave) |
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return NULL; |
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slave->bus = bus; |
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slave->cs = cs; |
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writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl); |
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/* calculate spi clock prescaller using max_hz */ |
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data = ((CONFIG_SYS_TCLK / 2) / max_hz) & KWSPI_CLKPRESCL_MASK; |
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data |= 0x10; |
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/* program spi clock prescaller using max_hz */ |
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writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); |
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debug("data = 0x%08x \n", data); |
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writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); |
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writel(KWSPI_IRQMASK, spireg->irq_mask); |
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/* program mpp registers to select SPI_CSn */ |
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if (cs) { |
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kwspi_mpp_config[0] = MPP0_GPIO; |
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kwspi_mpp_config[1] = MPP7_SPI_SCn; |
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} else { |
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kwspi_mpp_config[0] = MPP0_SPI_SCn; |
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kwspi_mpp_config[1] = MPP7_GPO; |
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} |
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kirkwood_mpp_conf(kwspi_mpp_config); |
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return slave; |
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} |
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void spi_free_slave(struct spi_slave *slave) |
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{ |
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free(slave); |
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} |
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int spi_claim_bus(struct spi_slave *slave) |
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{ |
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return 0; |
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} |
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void spi_release_bus(struct spi_slave *slave) |
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{ |
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} |
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#ifndef CONFIG_SPI_CS_IS_VALID |
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/*
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* you can define this function board specific |
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* define above CONFIG in board specific config file and |
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* provide the function in board specific src file |
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*/ |
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int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
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{ |
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return (bus == 0 && (cs == 0 || cs == 1)); |
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} |
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#endif |
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void spi_cs_activate(struct spi_slave *slave) |
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{ |
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writel(readl(&spireg->ctrl) | KWSPI_IRQUNMASK, &spireg->ctrl); |
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} |
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void spi_cs_deactivate(struct spi_slave *slave) |
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{ |
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writel(readl(&spireg->ctrl) & KWSPI_IRQMASK, &spireg->ctrl); |
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} |
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
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void *din, unsigned long flags) |
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{ |
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unsigned int tmpdout, tmpdin; |
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int tm, isread = 0; |
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debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", |
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slave->bus, slave->cs, dout, din, bitlen); |
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if (flags & SPI_XFER_BEGIN) |
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spi_cs_activate(slave); |
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/*
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* handle data in 8-bit chunks |
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* TBD: 2byte xfer mode to be enabled |
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*/ |
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writel(((readl(&spireg->cfg) & ~KWSPI_XFERLEN_MASK) | |
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KWSPI_XFERLEN_1BYTE), &spireg->cfg); |
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while (bitlen > 4) { |
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debug("loopstart bitlen %d\n", bitlen); |
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tmpdout = 0; |
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/* Shift data so it's msb-justified */ |
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if (dout) |
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tmpdout = *(u32 *) dout & 0x0ff; |
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writel(~KWSPI_SMEMRDIRQ, &spireg->irq_cause); |
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writel(tmpdout, &spireg->dout); /* Write the data out */ |
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debug("*** spi_xfer: ... %08x written, bitlen %d\n", |
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tmpdout, bitlen); |
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/*
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* Wait for SPI transmit to get out |
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* or time out (1 second = 1000 ms) |
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* The NE event must be read and cleared first |
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*/ |
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for (tm = 0, isread = 0; tm < KWSPI_TIMEOUT; ++tm) { |
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if (readl(&spireg->irq_cause) & KWSPI_SMEMRDIRQ) { |
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isread = 1; |
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tmpdin = readl(&spireg->din); |
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debug |
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("spi_xfer: din %08x..%08x read\n", |
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din, tmpdin); |
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if (din) { |
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*((u8 *) din) = (u8) tmpdin; |
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din += 1; |
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} |
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if (dout) |
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dout += 1; |
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bitlen -= 8; |
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} |
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if (isread) |
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break; |
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} |
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if (tm >= KWSPI_TIMEOUT) |
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printf("*** spi_xfer: Time out during SPI transfer\n"); |
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debug("loopend bitlen %d\n", bitlen); |
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} |
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if (flags & SPI_XFER_END) |
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spi_cs_deactivate(slave); |
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return 0; |
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} |
@ -0,0 +1,56 @@ |
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/*
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* (C) Copyright 2009 |
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* Marvell Semiconductor <www.marvell.com> |
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
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* |
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* Derived from drivers/spi/mpc8xxx_spi.c |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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* MA 02110-1301 USA |
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*/ |
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#ifndef __KW_SPI_H__ |
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#define __KW_SPI_H__ |
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/* SPI Registers on kirkwood SOC */ |
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struct kwspi_registers { |
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u32 ctrl; /* 0x10600 */ |
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u32 cfg; /* 0x10604 */ |
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u32 dout; /* 0x10608 */ |
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u32 din; /* 0x1060c */ |
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u32 irq_cause; /* 0x10610 */ |
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u32 irq_mask; /* 0x10614 */ |
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}; |
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#define KWSPI_CLKPRESCL_MASK 0x1f |
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#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */ |
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#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ |
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#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ |
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#define KWSPI_IRQMASK 0 /* mask SPI interrupt */ |
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#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ |
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#define KWSPI_XFERLEN_1BYTE 0 |
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#define KWSPI_XFERLEN_2BYTE (1 << 5) |
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#define KWSPI_XFERLEN_MASK (1 << 5) |
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#define KWSPI_ADRLEN_1BYTE 0 |
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#define KWSPI_ADRLEN_2BYTE 1 << 8 |
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#define KWSPI_ADRLEN_3BYTE 2 << 8 |
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#define KWSPI_ADRLEN_4BYTE 3 << 8 |
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#define KWSPI_ADRLEN_MASK 3 << 8 |
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#define KWSPI_TIMEOUT 10000 |
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#endif /* __KW_SPI_H__ */ |
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