zynqmp: - Show reset reason - Remove emulation platform - Update pmufw version - Simplify mmc bootmode - Remove dc2 useless configuration file - Cleanup mini config - Defconfig syncup - zcu100, zcu104 and zcu111 dts fixes xilinx: - Use live-tree functions in some drivers - Add support for Avnet Minized and Antminer S9 fpga: - Add secure bitstream loading support mmc: - Add hs200 mode support usb xhci: - Header fix -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlsRRy4ACgkQykllyylKDCEovgCdGWsr4XFQfDZxCEMmsg2vyJF2 0egAnj6Td1k6yTzQPDXwCtExZJfS/vgl =QxUz -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2018.07 second pull zynqmp: - Show reset reason - Remove emulation platform - Update pmufw version - Simplify mmc bootmode - Remove dc2 useless configuration file - Cleanup mini config - Defconfig syncup - zcu100, zcu104 and zcu111 dts fixes xilinx: - Use live-tree functions in some drivers - Add support for Avnet Minized and Antminer S9 fpga: - Add secure bitstream loading support mmc: - Add hs200 mode support usb xhci: - Header fixlime2-spi
commit
582d97b6d3
@ -0,0 +1,78 @@ |
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// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Bitmain Antminer S9 board DTS |
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* |
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* Copyright (C) 2018 Michal Simek |
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* Copyright (C) 2018 VanguardiaSur |
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*/ |
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/dts-v1/; |
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#include "zynq-7000.dtsi" |
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|
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/ { |
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model = "Bitmain Antminer S9 Board"; |
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compatible = "bitmain,antminer-s9", "xlnx,zynq-7000"; |
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|
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aliases { |
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ethernet0 = &gem0; |
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serial0 = &uart1; |
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mmc0 = &sdhci0; |
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gpio0 = &gpio0; |
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}; |
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|
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memory@0 { |
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device_type = "memory"; |
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reg = <0x0 0x40000000>; |
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}; |
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|
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reserved-memory { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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|
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bootcount@efffff0 { |
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reg = <0xefffff0 0x10>; |
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no-map; |
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}; |
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|
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fpga_space@f000000 { |
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reg = <0xf000000 0x1000000>; |
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no-map; |
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}; |
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}; |
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|
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chosen { |
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bootargs = "earlycon"; |
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stdout-path = "serial0:115200n8"; |
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}; |
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}; |
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|
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&clkc { |
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ps-clk-frequency = <33333333>; |
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}; |
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|
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&gem0 { |
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status = "okay"; |
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phy-mode = "rgmii-id"; |
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phy-handle = <ðernet_phy>; |
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|
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/* 0362/5e62 */ |
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ethernet_phy: ethernet-phy@1 { |
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reg = <1>; |
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}; |
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}; |
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|
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&sdhci0 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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disable-wp; |
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}; |
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|
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&uart1 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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|
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&watchdog0 { |
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reset-on-timeout; |
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timeout-sec = <200>; |
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}; |
@ -0,0 +1,106 @@ |
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// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* dts file for Avnet MiniZed board |
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* |
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* (C) Copyright 2017 - 2018, Xilinx, Inc. |
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* |
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* Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
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*/ |
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|
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/dts-v1/; |
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#include "zynq-7000.dtsi" |
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|
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/ { |
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model = "Avnet Zynq MiniZed Development Board"; |
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compatible = "avnet,minized", "xlnx,zynq-7000"; |
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|
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aliases { |
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serial0 = &uart1; |
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serial1 = &uart0; |
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spi0 = &qspi; |
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mmc0 = &sdhci0; |
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}; |
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|
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memory@0 { |
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device_type = "memory"; |
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reg = <0x0 0x20000000>; |
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}; |
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|
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chosen { |
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bootargs = ""; |
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stdout-path = "serial0:115200n8"; |
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}; |
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|
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usb_phy0: phy0 { |
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compatible = "usb-nop-xceiv"; |
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#phy-cells = <0>; |
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}; |
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}; |
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|
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&qspi { |
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status = "okay"; |
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is-dual = <0>; |
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num-cs = <1>; |
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flash@0 { |
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compatible = "micron,m25p128"; |
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reg = <0x0>; |
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spi-tx-bus-width = <4>; |
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spi-rx-bus-width = <4>; |
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spi-max-frequency = <50000000>; |
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partitions { |
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compatible = "fixed-partitions"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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partition@0 { |
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label = "boot"; |
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reg = <0x0 0xff0000>; |
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}; |
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|
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partition@270000 { |
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label = "kernel"; |
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reg = <0x270000 0xd80000>; |
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}; |
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|
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partition@ff0000 { |
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label = "bootenv"; |
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reg = <0xff0000 0x10000>; |
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}; |
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|
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partition@1000000 { |
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label = "spare"; |
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reg = <0x1000000 0x0>; |
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}; |
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}; |
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}; |
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}; |
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|
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&uart0 { |
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status = "okay"; |
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}; |
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|
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&uart1 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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|
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&usb0 { |
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status = "okay"; |
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dr_mode = "host"; |
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usb-phy = <&usb_phy0>; |
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usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */ |
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}; |
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|
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&sdhci1 { |
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status = "okay"; |
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non-removable; |
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bus-width = <4>; |
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max-frequency = <12000000>; |
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|
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#address-cells = <1>; |
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#size-cells = <0>; |
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mmccard: mmccard@0 { |
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compatible = "mmc-card"; |
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reg = <0>; |
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broken-hpi; |
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}; |
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}; |
@ -0,0 +1,6 @@ |
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Bitmain Antminer S9 |
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M: Michal Simek <monstr@monstr.eu> |
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S: Maintained |
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F: board/bitmain/antminer_s9 |
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F: include/configs/bitmain_antminer_s9.h |
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F: configs/bitmain_antminer_s9_defconfig |
@ -0,0 +1,8 @@ |
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# SPDX-License-Identifier: GPL-2.0
|
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|
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obj-y := board.o
|
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|
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# Remove quotes
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hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
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|
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obj-$(CONFIG_SPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o
|
@ -0,0 +1,280 @@ |
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// SPDX-License-Identifier: GPL-2.0
|
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/*
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* (C) Copyright 2018 Michal Simek |
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*/ |
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|
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#include <asm/arch/ps7_init_gpl.h> |
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|
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static unsigned long ps7_pll_init_data_3_0[] = { |
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EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), |
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EMIT_MASKWRITE(0xf8000110, 0x003ffff0, 0x000fa220), |
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EMIT_MASKWRITE(0xf8000100, 0x0007f000, 0x00028000), |
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EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000010), |
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EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000001), |
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EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000000), |
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EMIT_MASKPOLL(0xf800010c, 0x00000001), |
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EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000000), |
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EMIT_MASKWRITE(0xf8000120, 0x1f003f30, 0x1f000200), |
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EMIT_MASKWRITE(0xf8000114, 0x003ffff0, 0x0012c220), |
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EMIT_MASKWRITE(0xf8000104, 0x0007f000, 0x00020000), |
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EMIT_MASKWRITE(0xf8000104, 0x00000010, 0x00000010), |
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EMIT_MASKWRITE(0xf8000104, 0x00000001, 0x000000), |
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EMIT_MASKWRITE(0xf8000104, 0x00000001, 0x00000000), |
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EMIT_MASKPOLL(0xf800010c, 0x00000002), |
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EMIT_MASKWRITE(0xf8000104, 0x00000010, 0x00000000), |
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EMIT_MASKWRITE(0xf8000124, 0xfff00003, 0x0c200003), |
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EMIT_MASKWRITE(0xf8000118, 0x003ffff0, 0x001452c0), |
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EMIT_MASKWRITE(0xf8000108, 0x0007f000, 0x0001e000), |
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EMIT_MASKWRITE(0xf8000108, 0x00000010, 0x00000010), |
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EMIT_MASKWRITE(0xf8000108, 0x00000001, 0x00000001), |
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EMIT_MASKWRITE(0xf8000108, 0x00000001, 0x00000000), |
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EMIT_MASKPOLL(0xf800010c, 0x00000004), |
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EMIT_MASKWRITE(0xf8000108, 0x00000010, 0x00000000), |
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EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), |
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EMIT_EXIT(), |
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}; |
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|
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static unsigned long ps7_clock_init_data_3_0[] = { |
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EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), |
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EMIT_MASKWRITE(0xf8000128, 0x03f03f01, 0x00302301), |
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EMIT_MASKWRITE(0xf8000138, 0x00000011, 0x00000001), |
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EMIT_MASKWRITE(0xf8000140, 0x03f03f71, 0x00100801), |
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EMIT_MASKWRITE(0xf8000148, 0x00003f31, 0x00000a01), |
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EMIT_MASKWRITE(0xf8000150, 0x00003f33, 0x00002801), |
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EMIT_MASKWRITE(0xf8000154, 0x00003f33, 0x00001402), |
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EMIT_MASKWRITE(0xf8000168, 0x00003f31, 0x00000501), |
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EMIT_MASKWRITE(0xf8000170, 0x03f03f30, 0x00101400), |
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EMIT_MASKWRITE(0xf8000180, 0x03f03f30, 0x00100a00), |
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EMIT_MASKWRITE(0xf8000190, 0x03f03f30, 0x00101e00), |
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EMIT_MASKWRITE(0xf80001a0, 0x03f03f30, 0x00101400), |
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EMIT_MASKWRITE(0xf80001c4, 0x00000001, 0x00000001), |
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EMIT_MASKWRITE(0xf800012c, 0x01ffcccd, 0x016c044d), |
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EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), |
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EMIT_EXIT(), |
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}; |
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|
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static unsigned long ps7_ddr_init_data_3_0[] = { |
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EMIT_MASKWRITE(0xf8006000, 0x0001ffff, 0x00000080), |
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EMIT_MASKWRITE(0xf8006004, 0x0007ffff, 0x00001081), |
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EMIT_MASKWRITE(0xf8006008, 0x03ffffff, 0x03c0780f), |
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EMIT_MASKWRITE(0xf800600c, 0x03ffffff, 0x02001001), |
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EMIT_MASKWRITE(0xf8006010, 0x03ffffff, 0x00014001), |
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EMIT_MASKWRITE(0xf8006014, 0x001fffff, 0x0004281b), |
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EMIT_MASKWRITE(0xf8006018, 0xf7ffffff, 0x44e458d1), |
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EMIT_MASKWRITE(0xf800601c, 0xffffffff, 0xb2023584), |
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EMIT_MASKWRITE(0xf8006020, 0x7fdffffc, 0x2b08b2d0), |
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EMIT_MASKWRITE(0xf8006024, 0x0fffffc3, 0x00000000), |
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EMIT_MASKWRITE(0xf8006028, 0x00003fff, 0x00002007), |
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EMIT_MASKWRITE(0xf800602c, 0xffffffff, 0x00000000), |
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EMIT_MASKWRITE(0xf8006030, 0xffffffff, 0x00040970), |
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EMIT_MASKWRITE(0xf8006034, 0x13ff3fff, 0x000116d4), |
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EMIT_MASKWRITE(0xf8006038, 0x00000003, 0x00000000), |
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EMIT_MASKWRITE(0xf800603c, 0x000fffff, 0x00000777), |
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EMIT_MASKWRITE(0xf8006040, 0xffffffff, 0xfff00000), |
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EMIT_MASKWRITE(0xf8006044, 0x0fffffff, 0x0f666666), |
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EMIT_MASKWRITE(0xf8006048, 0x0003f03f, 0x0003c008), |
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EMIT_MASKWRITE(0xf8006050, 0xff0f8fff, 0x77010800), |
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EMIT_MASKWRITE(0xf8006058, 0x00010000, 0x00000000), |
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EMIT_MASKWRITE(0xf800605c, 0x0000ffff, 0x00005003), |
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EMIT_MASKWRITE(0xf8006060, 0x000017ff, 0x0000003e), |
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EMIT_MASKWRITE(0xf8006064, 0x00021fe0, 0x00020000), |
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EMIT_MASKWRITE(0xf8006068, 0x03ffffff, 0x00284545), |
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EMIT_MASKWRITE(0xf800606c, 0x0000ffff, 0x00001610), |
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EMIT_MASKWRITE(0xf8006078, 0x03ffffff, 0x00466111), |
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EMIT_MASKWRITE(0xf800607c, 0x000fffff, 0x00032222), |
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EMIT_MASKWRITE(0xf80060a4, 0xffffffff, 0x10200802), |
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EMIT_MASKWRITE(0xf80060a8, 0x0fffffff, 0x0690cb73), |
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EMIT_MASKWRITE(0xf80060ac, 0x000001ff, 0x000001fe), |
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EMIT_MASKWRITE(0xf80060b0, 0x1fffffff, 0x1cffffff), |
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EMIT_MASKWRITE(0xf80060b4, 0x00000200, 0x00000200), |
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EMIT_MASKWRITE(0xf80060b8, 0x01ffffff, 0x0020006a), |
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EMIT_MASKWRITE(0xf80060c4, 0x00000003, 0x00000003), |
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EMIT_MASKWRITE(0xf80060c4, 0x00000003, 0x00000000), |
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EMIT_MASKWRITE(0xf80060c8, 0x000000ff, 0x00000000), |
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EMIT_MASKWRITE(0xf80060dc, 0x00000001, 0x00000000), |
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EMIT_MASKWRITE(0xf80060f0, 0x0000ffff, 0x00000000), |
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EMIT_MASKWRITE(0xf80060f4, 0x0000000f, 0x00000008), |
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EMIT_MASKWRITE(0xf8006114, 0x000000ff, 0x00000000), |
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EMIT_MASKWRITE(0xf8006118, 0x7fffffcf, 0x40000001), |
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EMIT_MASKWRITE(0xf800611c, 0x7fffffcf, 0x40000001), |
||||
EMIT_MASKWRITE(0xf8006120, 0x7fffffcf, 0x40000001), |
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EMIT_MASKWRITE(0xf8006124, 0x7fffffcf, 0x40000001), |
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EMIT_MASKWRITE(0xf800612c, 0x000fffff, 0x0002c000), |
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EMIT_MASKWRITE(0xf8006130, 0x000fffff, 0x0002c400), |
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EMIT_MASKWRITE(0xf8006134, 0x000fffff, 0x0002f003), |
||||
EMIT_MASKWRITE(0xf8006138, 0x000fffff, 0x0002ec03), |
||||
EMIT_MASKWRITE(0xf8006140, 0x000fffff, 0x00000035), |
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EMIT_MASKWRITE(0xf8006144, 0x000fffff, 0x00000035), |
||||
EMIT_MASKWRITE(0xf8006148, 0x000fffff, 0x00000035), |
||||
EMIT_MASKWRITE(0xf800614c, 0x000fffff, 0x00000035), |
||||
EMIT_MASKWRITE(0xf8006154, 0x000fffff, 0x00000077), |
||||
EMIT_MASKWRITE(0xf8006158, 0x000fffff, 0x00000077), |
||||
EMIT_MASKWRITE(0xf800615c, 0x000fffff, 0x00000083), |
||||
EMIT_MASKWRITE(0xf8006160, 0x000fffff, 0x00000083), |
||||
EMIT_MASKWRITE(0xf8006168, 0x001fffff, 0x00000105), |
||||
EMIT_MASKWRITE(0xf800616c, 0x001fffff, 0x00000106), |
||||
EMIT_MASKWRITE(0xf8006170, 0x001fffff, 0x00000111), |
||||
EMIT_MASKWRITE(0xf8006174, 0x001fffff, 0x00000110), |
||||
EMIT_MASKWRITE(0xf800617c, 0x000fffff, 0x000000b7), |
||||
EMIT_MASKWRITE(0xf8006180, 0x000fffff, 0x000000b7), |
||||
EMIT_MASKWRITE(0xf8006184, 0x000fffff, 0x000000c3), |
||||
EMIT_MASKWRITE(0xf8006188, 0x000fffff, 0x000000c3), |
||||
EMIT_MASKWRITE(0xf8006190, 0x6ffffefe, 0x00040080), |
||||
EMIT_MASKWRITE(0xf8006194, 0x000fffff, 0x0001fd01), |
||||
EMIT_MASKWRITE(0xf8006204, 0xffffffff, 0x00000000), |
||||
EMIT_MASKWRITE(0xf8006208, 0x000703ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf800620c, 0x000703ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf8006210, 0x000703ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf8006214, 0x000703ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf8006218, 0x000f03ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf800621c, 0x000f03ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf8006220, 0x000f03ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf8006224, 0x000f03ff, 0x000003ff), |
||||
EMIT_MASKWRITE(0xf80062a8, 0x00000ff5, 0x00000000), |
||||
EMIT_MASKWRITE(0xf80062ac, 0xffffffff, 0x00000000), |
||||
EMIT_MASKWRITE(0xf80062b0, 0x003fffff, 0x00005125), |
||||
EMIT_MASKWRITE(0xf80062b4, 0x0003ffff, 0x000012a8), |
||||
EMIT_MASKPOLL(0xf8000b74, 0x00002000), |
||||
EMIT_MASKWRITE(0xf8006000, 0x0001ffff, 0x00000081), |
||||
EMIT_MASKPOLL(0xf8006054, 0x00000007), |
||||
EMIT_EXIT(), |
||||
}; |
||||
|
||||
static unsigned long ps7_mio_init_data_3_0[] = { |
||||
EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), |
||||
EMIT_MASKWRITE(0xf8000b40, 0x00000fff, 0x00000600), |
||||
EMIT_MASKWRITE(0xf8000b44, 0x00000fff, 0x00000600), |
||||
EMIT_MASKWRITE(0xf8000b48, 0x00000fff, 0x00000672), |
||||
EMIT_MASKWRITE(0xf8000b4c, 0x00000fff, 0x00000672), |
||||
EMIT_MASKWRITE(0xf8000b50, 0x00000fff, 0x00000674), |
||||
EMIT_MASKWRITE(0xf8000b54, 0x00000fff, 0x00000674), |
||||
EMIT_MASKWRITE(0xf8000b58, 0x00000fff, 0x00000600), |
||||
EMIT_MASKWRITE(0xf8000b5c, 0xffffffff, 0x0018c068), |
||||
EMIT_MASKWRITE(0xf8000b60, 0xffffffff, 0x00f98068), |
||||
EMIT_MASKWRITE(0xf8000b64, 0xffffffff, 0x00f98068), |
||||
EMIT_MASKWRITE(0xf8000b68, 0xffffffff, 0x00f98068), |
||||
EMIT_MASKWRITE(0xf8000b6c, 0x00007fff, 0x00000205), |
||||
EMIT_MASKWRITE(0xf8000b70, 0x00000001, 0x00000001), |
||||
EMIT_MASKWRITE(0xf8000b70, 0x00000021, 0x00000020), |
||||
EMIT_MASKWRITE(0xf8000b70, 0x07feffff, 0x00000823), |
||||
EMIT_MASKWRITE(0xf8000700, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000704, 0x00003fff, 0x00000600), |
||||
EMIT_MASKWRITE(0xf8000708, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf800070c, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000710, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000714, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000718, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf800071c, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000720, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000724, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000728, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf800072c, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000730, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000734, 0x00003fff, 0x00000610), |
||||
EMIT_MASKWRITE(0xf8000738, 0x00003fff, 0x00000611), |
||||
EMIT_MASKWRITE(0xf800073c, 0x00003fff, 0x00000600), |
||||
EMIT_MASKWRITE(0xf8000740, 0x00003fff, 0x00000202), |
||||
EMIT_MASKWRITE(0xf8000744, 0x00003fff, 0x00000202), |
||||
EMIT_MASKWRITE(0xf8000748, 0x00003fff, 0x00000202), |
||||
EMIT_MASKWRITE(0xf800074c, 0x00003fff, 0x00000202), |
||||
EMIT_MASKWRITE(0xf8000750, 0x00003fff, 0x00000202), |
||||
EMIT_MASKWRITE(0xf8000754, 0x00003fff, 0x00000202), |
||||
EMIT_MASKWRITE(0xf8000758, 0x00003fff, 0x00000203), |
||||
EMIT_MASKWRITE(0xf800075c, 0x00003fff, 0x00000203), |
||||
EMIT_MASKWRITE(0xf8000760, 0x00003fff, 0x00000203), |
||||
EMIT_MASKWRITE(0xf8000764, 0x00003fff, 0x00000203), |
||||
EMIT_MASKWRITE(0xf8000768, 0x00003fff, 0x00000203), |
||||
EMIT_MASKWRITE(0xf800076c, 0x00003fff, 0x00000203), |
||||
EMIT_MASKWRITE(0xf8000770, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000774, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000778, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf800077c, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000780, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000784, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000788, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf800078c, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000790, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000794, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf8000798, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf800079c, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf80007a0, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007a4, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007a8, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007ac, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007b0, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007b4, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007b8, 0x00003f01, 0x00000201), |
||||
EMIT_MASKWRITE(0xf80007bc, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf80007c0, 0x00003fff, 0x000002e0), |
||||
EMIT_MASKWRITE(0xf80007c4, 0x00003fff, 0x000002e1), |
||||
EMIT_MASKWRITE(0xf80007c8, 0x00003f01, 0x00000201), |
||||
EMIT_MASKWRITE(0xf80007cc, 0x00003fff, 0x00000200), |
||||
EMIT_MASKWRITE(0xf80007d0, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf80007d4, 0x00003fff, 0x00000280), |
||||
EMIT_MASKWRITE(0xf8000830, 0x003f003f, 0x002e0032), |
||||
EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), |
||||
EMIT_EXIT(), |
||||
}; |
||||
|
||||
static unsigned long ps7_peripherals_init_data_3_0[] = { |
||||
EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), |
||||
EMIT_MASKWRITE(0xf8000b48, 0x00000180, 0x00000180), |
||||
EMIT_MASKWRITE(0xf8000b4c, 0x00000180, 0x00000180), |
||||
EMIT_MASKWRITE(0xf8000b50, 0x00000180, 0x00000180), |
||||
EMIT_MASKWRITE(0xf8000b54, 0x00000180, 0x00000180), |
||||
EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), |
||||
EMIT_MASKWRITE(0xe0001034, 0x000000ff, 0x00000006), |
||||
EMIT_MASKWRITE(0xe0001018, 0x0000ffff, 0x0000003e), |
||||
EMIT_MASKWRITE(0xe0001000, 0x000001ff, 0x00000017), |
||||
EMIT_MASKWRITE(0xe0001004, 0x000003ff, 0x00000020), |
||||
EMIT_MASKWRITE(0xe000d000, 0x00080000, 0x00080000), |
||||
EMIT_MASKWRITE(0xf8007000, 0x20000000, 0x00000000), |
||||
EMIT_MASKWRITE(0xe000e014, 0x00ffffff, 0x00449144), |
||||
EMIT_MASKWRITE(0xe000e018, 0x00000003, 0x00000000), |
||||
EMIT_MASKWRITE(0xe000e010, 0x03e00000, 0x02400000), |
||||
EMIT_MASKDELAY(0xf8f00200, 0x00000001), |
||||
EMIT_MASKDELAY(0xf8f00200, 0x00000001), |
||||
EMIT_MASKDELAY(0xf8f00200, 0x00000001), |
||||
EMIT_MASKDELAY(0xf8f00200, 0x00000001), |
||||
EMIT_MASKDELAY(0xf8f00200, 0x00000001), |
||||
EMIT_MASKDELAY(0xf8f00200, 0x00000001), |
||||
EMIT_EXIT(), |
||||
}; |
||||
|
||||
static unsigned long ps7_post_config_3_0[] = { |
||||
EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), |
||||
EMIT_MASKWRITE(0xf8000900, 0x0000000f, 0x0000000f), |
||||
EMIT_MASKWRITE(0xf8000240, 0xffffffff, 0x00000000), |
||||
EMIT_MASKWRITE(0xf8008000, 0x00000001, 0x00000001), |
||||
EMIT_MASKWRITE(0xf8008014, 0x00000001, 0x00000001), |
||||
EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), |
||||
EMIT_EXIT(), |
||||
}; |
||||
|
||||
int ps7_init(void) |
||||
{ |
||||
int ret; |
||||
|
||||
ret = ps7_config(ps7_mio_init_data_3_0); |
||||
if (ret != PS7_INIT_SUCCESS) |
||||
return ret; |
||||
ret = ps7_config(ps7_pll_init_data_3_0); |
||||
if (ret != PS7_INIT_SUCCESS) |
||||
return ret; |
||||
ret = ps7_config(ps7_clock_init_data_3_0); |
||||
if (ret != PS7_INIT_SUCCESS) |
||||
return ret; |
||||
ret = ps7_config(ps7_ddr_init_data_3_0); |
||||
if (ret != PS7_INIT_SUCCESS) |
||||
return ret; |
||||
ret = ps7_config(ps7_peripherals_init_data_3_0); |
||||
if (ret != PS7_INIT_SUCCESS) |
||||
return ret; |
||||
|
||||
return PS7_INIT_SUCCESS; |
||||
} |
||||
|
||||
int ps7_post_config(void) |
||||
{ |
||||
return ps7_config(ps7_post_config_3_0); |
||||
} |
@ -0,0 +1,2 @@ |
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include "../../xilinx/zynq/board.c" |
@ -0,0 +1,66 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_SYS_VENDOR="bitmain" |
||||
CONFIG_SYS_BOARD="antminer_s9" |
||||
CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" |
||||
CONFIG_ARCH_ZYNQ=y |
||||
CONFIG_SYS_TEXT_BASE=0x4000000 |
||||
CONFIG_SPL=y |
||||
CONFIG_SPL_STACK_R_ADDR=0x200000 |
||||
CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" |
||||
CONFIG_DEBUG_UART=y |
||||
CONFIG_FIT=y |
||||
CONFIG_FIT_SIGNATURE=y |
||||
CONFIG_FIT_VERBOSE=y |
||||
CONFIG_BOOTDELAY=3 |
||||
# CONFIG_DISPLAY_CPUINFO is not set |
||||
CONFIG_SPL_STACK_R=y |
||||
CONFIG_HUSH_PARSER=y |
||||
CONFIG_SYS_PROMPT="antminer> " |
||||
CONFIG_CMD_BOOTZ=y |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_DM is not set |
||||
# CONFIG_CMD_FLASH is not set |
||||
CONFIG_CMD_FPGA_LOADBP=y |
||||
CONFIG_CMD_FPGA_LOADFS=y |
||||
CONFIG_CMD_FPGA_LOADMK=y |
||||
CONFIG_CMD_FPGA_LOADP=y |
||||
CONFIG_CMD_GPIO=y |
||||
CONFIG_CMD_MMC=y |
||||
CONFIG_CMD_NAND_LOCK_UNLOCK=y |
||||
CONFIG_CMD_PART=y |
||||
# CONFIG_CMD_SETEXPR is not set |
||||
CONFIG_CMD_DHCP=y |
||||
# CONFIG_CMD_NFS is not set |
||||
CONFIG_CMD_MII=y |
||||
CONFIG_CMD_PING=y |
||||
CONFIG_CMD_PXE=y |
||||
CONFIG_CMD_CACHE=y |
||||
CONFIG_CMD_EXT2=y |
||||
CONFIG_CMD_EXT4=y |
||||
CONFIG_CMD_EXT4_WRITE=y |
||||
CONFIG_CMD_FAT=y |
||||
CONFIG_CMD_FS_GENERIC=y |
||||
CONFIG_OF_EMBED=y |
||||
CONFIG_ENV_IS_IN_NAND=y |
||||
CONFIG_NET_RANDOM_ETHADDR=y |
||||
CONFIG_SPL_DM_SEQ_ALIAS=y |
||||
CONFIG_BOOTCOUNT_LIMIT=y |
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 |
||||
CONFIG_FPGA_XILINX=y |
||||
CONFIG_FPGA_ZYNQPL=y |
||||
CONFIG_DM_GPIO=y |
||||
CONFIG_MMC_SDHCI=y |
||||
CONFIG_MMC_SDHCI_ZYNQ=y |
||||
CONFIG_NAND=y |
||||
CONFIG_NAND_ZYNQ=y |
||||
CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y |
||||
CONFIG_ZYNQ_GEM=y |
||||
CONFIG_DEBUG_UART_ZYNQ=y |
||||
CONFIG_DEBUG_UART_BASE=0xe0001000 |
||||
CONFIG_DEBUG_UART_CLOCK=50000000 |
||||
CONFIG_DEBUG_UART_ANNOUNCE=y |
||||
CONFIG_ZYNQ_SERIAL=y |
||||
# CONFIG_WATCHDOG is not set |
||||
CONFIG_WDT=y |
||||
CONFIG_WDT_CDNS=y |
||||
# CONFIG_EFI_LOADER is not set |
@ -0,0 +1,66 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_ZYNQ=y |
||||
CONFIG_SYS_TEXT_BASE=0x4000000 |
||||
CONFIG_SPL=y |
||||
CONFIG_SPL_STACK_R_ADDR=0x200000 |
||||
CONFIG_DEFAULT_DEVICE_TREE="zynq-minized" |
||||
CONFIG_DEBUG_UART=y |
||||
CONFIG_DISTRO_DEFAULTS=y |
||||
CONFIG_FIT=y |
||||
CONFIG_FIT_SIGNATURE=y |
||||
CONFIG_FIT_VERBOSE=y |
||||
CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" |
||||
CONFIG_SPL_STACK_R=y |
||||
CONFIG_SPL_OS_BOOT=y |
||||
CONFIG_SYS_PROMPT="Zynq> " |
||||
CONFIG_CMD_THOR_DOWNLOAD=y |
||||
CONFIG_CMD_DFU=y |
||||
# CONFIG_CMD_FLASH is not set |
||||
CONFIG_CMD_FPGA_LOADBP=y |
||||
CONFIG_CMD_FPGA_LOADFS=y |
||||
CONFIG_CMD_FPGA_LOADMK=y |
||||
CONFIG_CMD_FPGA_LOADP=y |
||||
CONFIG_CMD_GPIO=y |
||||
CONFIG_CMD_MMC=y |
||||
CONFIG_CMD_SF=y |
||||
CONFIG_CMD_USB=y |
||||
# CONFIG_CMD_SETEXPR is not set |
||||
CONFIG_CMD_TFTPPUT=y |
||||
CONFIG_CMD_CACHE=y |
||||
CONFIG_CMD_EXT4_WRITE=y |
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y |
||||
CONFIG_NET_RANDOM_ETHADDR=y |
||||
CONFIG_SPL_DM_SEQ_ALIAS=y |
||||
CONFIG_DFU_MMC=y |
||||
CONFIG_DFU_RAM=y |
||||
CONFIG_FPGA_XILINX=y |
||||
CONFIG_FPGA_ZYNQPL=y |
||||
CONFIG_DM_GPIO=y |
||||
CONFIG_MMC_SDHCI=y |
||||
CONFIG_MMC_SDHCI_ZYNQ=y |
||||
CONFIG_SPI_FLASH=y |
||||
CONFIG_SPI_FLASH_BAR=y |
||||
CONFIG_SPI_FLASH_SPANSION=y |
||||
CONFIG_SPI_FLASH_STMICRO=y |
||||
CONFIG_SPI_FLASH_WINBOND=y |
||||
CONFIG_PHY_MARVELL=y |
||||
CONFIG_PHY_REALTEK=y |
||||
CONFIG_PHY_XILINX=y |
||||
CONFIG_ZYNQ_GEM=y |
||||
CONFIG_DEBUG_UART_ZYNQ=y |
||||
CONFIG_DEBUG_UART_BASE=0xe0001000 |
||||
CONFIG_DEBUG_UART_CLOCK=50000000 |
||||
CONFIG_ZYNQ_SERIAL=y |
||||
CONFIG_ZYNQ_QSPI=y |
||||
CONFIG_USB=y |
||||
CONFIG_USB_EHCI_HCD=y |
||||
CONFIG_USB_ULPI_VIEWPORT=y |
||||
CONFIG_USB_ULPI=y |
||||
CONFIG_USB_STORAGE=y |
||||
CONFIG_USB_GADGET=y |
||||
CONFIG_USB_GADGET_MANUFACTURER="Xilinx" |
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x03fd |
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 |
||||
CONFIG_CI_UDC=y |
||||
CONFIG_USB_GADGET_DOWNLOAD=y |
||||
CONFIG_USB_FUNCTION_THOR=y |
@ -0,0 +1,30 @@ |
||||
/* SPDX-License-Identifier: GPL-2.0 */ |
||||
/*
|
||||
* (C) Copyright 2018 Michal Simek <monstr@monstr.eu> |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_BITMAIN_ANTMINER_S9_H |
||||
#define __CONFIG_BITMAIN_ANTMINER_S9_H |
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000 |
||||
#define CONFIG_SYS_SDRAM_SIZE 0x40000000 |
||||
|
||||
#define CONFIG_ENV_SIZE 0x20000 |
||||
#define CONFIG_ENV_OFFSET 0x300000 |
||||
|
||||
#define CONFIG_BOOTP_SERVERIP |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"autoload=no\0" \
|
||||
"pxefile_addr_r=0x2000000\0" \
|
||||
"scriptaddr=0x3000000\0" \
|
||||
"kernel_addr_r=0x2000000\0" \
|
||||
"fdt_high=0xefff000\0" \
|
||||
"initrd_high=0xefff000\0" \
|
||||
"devnum=0\0" \
|
||||
"wdstop=mw f8005000 ABC000\0" \
|
||||
BOOTENV |
||||
|
||||
#include <configs/zynq-common.h> |
||||
|
||||
#endif /* __CONFIG_BITMAIN_ANTMINER_S9_H */ |
@ -1,14 +0,0 @@ |
||||
/* SPDX-License-Identifier: GPL-2.0+ */ |
||||
/*
|
||||
* Configuration for Xilinx ZynqMP zc1751 XM016 DC2 |
||||
* |
||||
* (C) Copyright 2015 Xilinx, Inc. |
||||
* Michal Simek <michal.simek@xilinx.com> |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H |
||||
#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H |
||||
|
||||
#include <configs/xilinx_zynqmp.h> |
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */ |
Loading…
Reference in new issue