From 584dc4095ed2e5d70146c5cb220fac18645798d1 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 3 Jul 2017 13:41:36 +0200 Subject: [PATCH] zynq: Add Z-Turn board The Z-Turn board is a low cost development board based on the Xilinx Zynq SoC. While it's powerful and quite versatile, it so far lacked upstream support. This patch adds basic support for the Z-Turn. It does however for now miss enablement for MIO51 reset which means that USB and ethernet don't work. For that either FSBL or SPL need to be adjusted. The SPL part will follow later. Signed-off-by: Alexander Graf Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-zturn-myir.dts | 161 +++++++++++++++++++++++++++++++++++++++ configs/zynq_z_turn_defconfig | 59 ++++++++++++++ 3 files changed, 221 insertions(+) create mode 100644 arch/arm/dts/zynq-zturn-myir.dts create mode 100644 configs/zynq_z_turn_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 132fa69..e4d118d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -132,6 +132,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-topic-miami.dtb \ zynq-topic-miamilite.dtb \ zynq-topic-miamiplus.dtb \ + zynq-zturn-myir.dtb \ zynq-zc770-xm010.dtb \ zynq-zc770-xm011.dtb \ zynq-zc770-xm012.dtb \ diff --git a/arch/arm/dts/zynq-zturn-myir.dts b/arch/arm/dts/zynq-zturn-myir.dts new file mode 100644 index 0000000..a5ecfcc --- /dev/null +++ b/arch/arm/dts/zynq-zturn-myir.dts @@ -0,0 +1,161 @@ +/* + * Copyright (C) 2015 Andrea Merello + * Copyright (C) 2017 Alexander Graf + * + * Based on zynq-zed.dts which is: + * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2012 National Instruments Corp. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "Zynq Z-Turn MYIR Board"; + compatible = "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart1; + serial1 = &uart0; + spi0 = &qspi; + mmc0 = &sdhci0; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + led_r { + label = "led_r"; + gpios = <&gpio0 0x72 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led_g { + label = "led_g"; + gpios = <&gpio0 0x73 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led_b { + label = "led_b"; + gpios = <&gpio0 0x74 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + usr_led1 { + label = "usr_led1"; + gpios = <&gpio0 0x0 0x1>; + default-state = "off"; + linux,default-trigger = "none"; + }; + + usr_led2 { + label = "usr_led2"; + gpios = <&gpio0 0x9 0x1>; + default-state = "off"; + linux,default-trigger = "none"; + }; + }; + + gpio-beep { + compatible = "gpio-beeper"; + label = "pl-beep"; + gpios = <&gpio0 0x75 0x0>; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <0x1>; + #size-cells = <0x0>; + autorepeat; + K1 { + label = "K1"; + gpios = <&gpio0 0x32 0x1>; + linux,code = <0x66>; + gpio-key,wakeup; + autorepeat; + }; + }; +}; + +&clkc { + ps-clk-frequency = <33333333>; + fclk-enable = <0xf>; +}; + +&qspi { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@0 { + reg = <0x0>; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +&can0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + stlm75@49 { + status = "okay"; + compatible = "lm75"; + reg = <0x49>; + }; + + adxl345@53 { + compatible = "adi,adxl34x", "adxl34x"; + reg = <0x53>; + interrupt-parent = <&intc>; + interrupts = <0x0 0x1e 0x4>; + }; +}; diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig new file mode 100644 index 0000000..b550912 --- /dev/null +++ b/configs/zynq_z_turn_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn-myir" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_ENV_IS_NOWHERE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL=y +CONFIG_SPL_OS_BOOT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Zynq> " +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03FD +CONFIG_G_DNL_PRODUCT_NUM=0x0300