The Sunchip CX-A99 is a board used in some media players. It features: An Allwinner A80 ARM SoC (4 * Cortex-A7 + 4 * Cortex-A15 cores) 2 GiB or 4 GiB DDR3 DRAM AXP808 PMIC 16 GB or 32 GB eMMC SDIO Wifi/Bluetooth/FM module SD card slot 1 USB 3.0 connector 2 USB 2.0 connectors SATA connector UART connector (internally) for serial console Ethernet connector (10/100/1000 Mbit/s) HDMI connector Composite video and analog audio connector S/PDIF connector IR remote control receiver This patch adds a defconfig for the board. The DRAM settings are as found in the vendor sys_config.fex file. It has a preliminary device tree for use until a device tree is accepted upstream, after which it can be replaced by the upstream version. Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk> [squash commits, and edited new meanful commit message] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>master
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/* |
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* sun9i-a80-cx-a99.dts - Device Tree file for the Sunchip CX-A99 board. |
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* |
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* Copyright (C) 2017 Rask Ingemann Lambertsen <rask@formelder.dk> |
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* |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following |
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* conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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|
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/* |
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* The Sunchip CX-A99 board is found in several similar Android media |
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* players, such as: |
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* |
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* Instabox Fantasy A8 (no external antenna) |
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* Jesurun CS-Q8 (ships with larger remote control) |
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* Jesurun Maxone |
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* Rikomagic (RKM) MK80/MK80LE |
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* Tronsmart Draco AW80 Meta/Telos |
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* |
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* See the Sunchip CX-A99 page on the Linux-sunxi wiki for more information. |
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*/ |
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|
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/dts-v1/; |
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#include "sun9i-a80.dtsi" |
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|
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#include <dt-bindings/gpio/gpio.h> |
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|
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/ { |
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model = "Sunchip CX-A99"; |
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compatible = "sunchip,cx-a99", "allwinner,sun9i-a80"; |
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|
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aliases { |
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serial0 = &uart0; |
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}; |
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|
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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|
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leds { |
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compatible = "gpio-leds"; |
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|
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blue { |
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gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */ |
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label = "cx-a99:blue:status"; |
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}; |
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|
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red { |
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gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ |
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label = "cx-a99:red:status"; |
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}; |
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}; |
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|
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powerseq_wifi: powerseq-wifi { |
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compatible = "mmc-pwrseq-simple"; |
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clocks = <&ac100_rtc 1>; |
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clock-names = "ext_clock"; |
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reset-gpios = <&r_pio 1 0 GPIO_ACTIVE_LOW>; /* PM0 */ |
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post-power-on-delay-ms = <1>; /* Minimum 2 cycles. */ |
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}; |
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|
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/* USB 2.0 connector closest to the 12 V power connector. */ |
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reg_usb1_vbus: regulator-usb1-vbus { |
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compatible = "regulator-fixed"; |
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regulator-name = "usb1-vbus"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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gpio = <&r_pio 0 7 /* no flag support */ 0>; /* PL7 */ |
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enable-active-high; |
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}; |
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|
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/* USB 2.0 connector next to the SD card slot. */ |
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reg_usb3_vbus: regulator-usb3-vbus { |
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compatible = "regulator-fixed"; |
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regulator-name = "usb3-vbus"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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gpio = <&r_pio 0 8 /* no flag support */ 0>; /* PL8 */ |
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enable-active-high; |
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}; |
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|
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/* |
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* OZ80120 voltage regulator for the four Cortex-A15 CPU cores. |
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* Although the regulator can output 750 - 1200 mV, the permissible |
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* range for the CPU cores is only 800 - 1100 mV. |
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*/ |
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reg_vdd_cpub: regulator-vdd-cpub { |
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compatible = "regulator-gpio"; |
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|
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regulator-always-on; |
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regulator-min-microvolt = < 800000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-name = "vdd-cpub"; |
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|
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/* Note: GPIO flags are not supported here . */ |
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enable-gpio = <&r_pio 0 2 /* flags n/a */ 0>; /* PL2 */ |
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enable-active-high; |
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gpios = <&r_pio 0 3 /* no flag support */ 0>, /* PL3 */ |
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<&r_pio 0 4 /* no flag support */ 0>, /* PL4 */ |
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<&r_pio 0 5 /* no flag support */ 0>; /* PL5 */ |
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gpios-states = <1 0 0>; |
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states = < 750000 0x7 |
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800000 0x3 |
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850000 0x5 |
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900000 0x1 |
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950000 0x6 |
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1000000 0x2 |
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1100000 0x4 |
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1200000 0x0>; |
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}; |
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}; |
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|
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&ehci0 { |
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status = "okay"; |
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}; |
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|
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&ehci2 { |
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status = "okay"; |
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}; |
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|
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/* |
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* SD card slot. Although the GPIO pin for card detection is listed as capable |
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* of generating interrupts in the "A80 User Manual", this doesn't work for |
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* some unknown reason, so poll the GPIO for card detection. This is also what |
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* the vendor sys_config.fex file specifies. |
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*/ |
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&mmc0 { |
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bus-width = <4>; |
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cd-gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; /* PH17 */ |
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broken-cd; /* Poll. */ |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc0_pins>; |
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vmmc-supply = <®_dcdce>; |
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status = "okay"; |
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}; |
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|
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/* Ampak AP6335 IEEE 802.11 a/b/g/n/ac Wifi. */ |
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&mmc1 { |
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bus-width = <4>; |
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non-removable; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc1_pins>; |
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vmmc-supply = <®_cldo3>; /* See cldo2,cldo3 note. */ |
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vqmmc-supply = <®_aldo2>; |
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mmc-pwrseq = <&powerseq_wifi>; |
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status = "okay"; |
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}; |
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|
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/* On-board eMMC card. */ |
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&mmc2 { |
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bus-width = <8>; |
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non-removable; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc2_8bit_pins>; |
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vmmc-supply = <®_dcdce>; |
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status = "okay"; |
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}; |
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&osc32k { |
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clocks = <&ac100_rtc 0>; |
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}; |
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&r_ir { |
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status = "okay"; |
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}; |
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&r_rsb { |
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status = "okay"; |
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ac100: codec@e89 { |
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compatible = "x-powers,ac100"; |
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reg = <0xe89>; |
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ac100_codec: codec { |
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compatible = "x-powers,ac100-codec"; |
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interrupt-parent = <&r_pio>; |
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interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */ |
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#clock-cells = <0>; |
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clock-output-names = "4M_adda"; |
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}; |
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ac100_rtc: rtc { |
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compatible = "x-powers,ac100-rtc"; |
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interrupt-parent = <&nmi_intc>; |
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
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clocks = <&ac100_codec>; |
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#clock-cells = <1>; |
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clock-output-names = "cko1_rtc", |
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"cko2_rtc", |
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"cko3_rtc"; |
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}; |
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}; |
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pmic@745 { |
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compatible = "x-powers,axp808", "x-powers,axp806"; |
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x-powers,master-mode; |
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reg = <0x745>; |
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interrupt-parent = <&nmi_intc>; |
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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swin-supply = <®_dcdce>; |
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regulators { |
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reg_aldo1: aldo1 { |
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regulator-boot-on; |
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regulator-min-microvolt = <3000000>; |
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regulator-max-microvolt = <3000000>; |
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regulator-name = "vcc-3v0"; |
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}; |
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/* Supplies pin groups G and M. */ |
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reg_aldo2: aldo2 { |
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regulator-boot-on; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <3600000>; |
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regulator-name = "vddio-wifi-codec"; |
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}; |
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reg_aldo3: aldo3 { |
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regulator-boot-on; |
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regulator-min-microvolt = <2500000>; |
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regulator-max-microvolt = <2500000>; |
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regulator-name = "vddio-gmac"; |
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}; |
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reg_bldo1: bldo1 { |
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regulator-always-on; /* Hang if disabled */ |
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regulator-min-microvolt = <1700000>; |
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regulator-max-microvolt = <1900000>; |
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regulator-name = "vdd18-dll-vcc18-pll"; |
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}; |
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reg_bldo2: bldo2 { |
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regulator-always-on; /* Hang if disabled */ |
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regulator-min-microvolt = < 800000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-name = "vdd-cpus"; |
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}; |
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reg_bldo3: bldo3 { |
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regulator-min-microvolt = <1100000>; |
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regulator-max-microvolt = <1300000>; |
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regulator-name = "vcc12-hsic"; |
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}; |
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reg_bldo4: bldo4 { |
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regulator-boot-on; |
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regulator-min-microvolt = < 800000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-name = "vdd09-hdmi"; |
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}; |
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/* Supplies PLx pins which control some regulators. */ |
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reg_cldo1: cldo1 { |
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regulator-always-on; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-name = "vcc-pl-led"; |
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}; |
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/* |
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* cldo2 and cldo3 are connected in parallel. |
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* There is currently no way to express that. |
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* For now, use regulator-always-on on cldo2 and lock |
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* the voltage on both to 3.3 V. |
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*/ |
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reg_cldo2: cldo2 { |
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regulator-always-on; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-name = "vbat2-wifi+bt"; |
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}; |
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reg_cldo3: cldo3 { |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-name = "vbat1-wifi+bt"; |
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}; |
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reg_dcdca: dcdca { |
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regulator-always-on; |
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regulator-min-microvolt = < 800000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-name = "vdd-cpua"; |
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}; |
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reg_dcdcb: dcdcb { |
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regulator-always-on; |
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regulator-min-microvolt = <1450000>; |
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regulator-max-microvolt = <1550000>; |
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regulator-name = "vcc-dram"; |
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}; |
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reg_dcdcc: dcdcc { |
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regulator-min-microvolt = < 800000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-name = "vdd-gpu"; |
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}; |
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reg_dcdcd: dcdcd { |
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regulator-always-on; /* Hang if disabled. */ |
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regulator-min-microvolt = < 800000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-name = "vdd-sys"; |
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}; |
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/* Supplies pin groups B-F and H. */ |
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reg_dcdce: dcdce { |
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regulator-always-on; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-name = "vcc-io-mmc-spdif"; |
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}; |
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reg_sw: sw { |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-name = "vcc-gmac-codec"; |
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}; |
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}; |
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}; |
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}; |
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/* |
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* 5-pin connector opposite of the SD card slot: |
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* 1 = GND (pointed to by small triangle), 2 = GND, 3 = 3.3 V, 4 = RX, 5 = TX. |
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*/ |
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&uart0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&uart0_pins_a>; |
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status = "okay"; |
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}; |
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&usbphy1 { |
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phy-supply = <®_usb1_vbus>; |
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status = "okay"; |
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}; |
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&usbphy3 { |
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phy-supply = <®_usb3_vbus>; |
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status = "okay"; |
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}; |
@ -0,0 +1,22 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_SUNXI=y |
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CONFIG_MACH_SUN9I=y |
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CONFIG_DRAM_CLK=600 |
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CONFIG_DRAM_ZQ=3881915 |
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CONFIG_DRAM_ODT_EN=y |
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CONFIG_MMC0_CD_PIN="PH17" |
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2 |
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CONFIG_USB0_VBUS_PIN="PH15" |
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CONFIG_USB0_VBUS_DET="" |
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CONFIG_USB0_ID_DET="" |
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CONFIG_USB1_VBUS_PIN="PL7" |
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CONFIG_USB3_VBUS_PIN="PL8" |
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CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" |
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
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CONFIG_SPL=y |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_FLASH is not set |
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# CONFIG_CMD_FPGA is not set |
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# CONFIG_SPL_DOS_PARTITION is not set |
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# CONFIG_SPL_ISO_PARTITION is not set |
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# CONFIG_SPL_EFI_PARTITION is not set |
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Reference in new issue