Mike Frysinger
16 years ago
parent
8b219cf07c
commit
59e4be945b
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/u-boot.lds |
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#
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# U-boot - Makefile
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS-y := $(BOARD).o gpio.o gpio_cfi_flash.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS-y))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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$(obj)u-boot.lds: u-boot.lds.S |
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$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,79 @@ |
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/*
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* U-boot - main board file |
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* |
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* Copyright (c) 2005-2009 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <net.h> |
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#include <netdev.h> |
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#include <asm/blackfin.h> |
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#include <asm/net.h> |
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#include <asm/mach-common/bits/otp.h> |
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#include "gpio_cfi_flash.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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int checkboard(void) |
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{ |
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printf("Board: Bluetechnix CM-BF527 board\n"); |
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printf(" Support: http://www.bluetechnix.at/\n"); |
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return 0; |
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} |
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phys_size_t initdram(int board_type) |
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{ |
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; |
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; |
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return gd->bd->bi_memsize; |
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} |
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#ifdef CONFIG_BFIN_MAC |
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static void board_init_enetaddr(uchar *mac_addr) |
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{ |
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bool valid_mac = false; |
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/* the MAC is stored in OTP memory page 0xDF */ |
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uint32_t ret; |
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uint64_t otp_mac; |
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ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); |
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if (!(ret & OTP_MASTER_ERROR)) { |
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uchar *otp_mac_p = (uchar *)&otp_mac; |
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for (ret = 0; ret < 6; ++ret) |
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mac_addr[ret] = otp_mac_p[5 - ret]; |
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if (is_valid_ether_addr(mac_addr)) |
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valid_mac = true; |
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} |
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if (!valid_mac) { |
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puts("Warning: Generating 'random' MAC address\n"); |
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bfin_gen_rand_mac(mac_addr); |
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} |
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eth_setenv_enetaddr("ethaddr", mac_addr); |
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} |
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int board_eth_init(bd_t *bis) |
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{ |
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return bfin_EMAC_initialize(bis); |
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} |
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#endif |
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int misc_init_r(void) |
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{ |
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#ifdef CONFIG_BFIN_MAC |
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uchar enetaddr[6]; |
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if (!eth_getenv_enetaddr("ethaddr", enetaddr)) |
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board_init_enetaddr(enetaddr); |
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#endif |
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gpio_cfi_flash_init(); |
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return 0; |
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} |
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@ -0,0 +1,32 @@ |
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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# This is not actually used for Blackfin boards so do not change it
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#TEXT_BASE = do-not-use-me
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LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
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# Set some default LDR flags based on boot mode.
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LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
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@ -0,0 +1,74 @@ |
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/*
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* Control GPIO pins on the fly |
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* |
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* Copyright (c) 2008 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <asm/blackfin.h> |
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int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
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{ |
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if (argc != 3) { |
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show_usage: |
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printf("Usage:\n%s\n", cmdtp->usage); |
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return 1; |
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} |
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/* parse the behavior */ |
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ulong port_cmd = 0; |
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switch (argv[1][0]) { |
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case 'i': break; |
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case 's': port_cmd = (PORTFIO_SET - PORTFIO); break; |
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case 'c': port_cmd = (PORTFIO_CLEAR - PORTFIO); break; |
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case 't': port_cmd = (PORTFIO_TOGGLE - PORTFIO); break; |
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default: goto show_usage; |
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} |
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/* parse the pin with format: [p]<fgh><#> */ |
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const char *str_pin = argv[2]; |
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/* grab the [p]<fgh> portion */ |
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ulong port_base; |
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if (*str_pin == 'p') ++str_pin; |
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switch (*str_pin) { |
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case 'f': port_base = PORTFIO; break; |
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case 'g': port_base = PORTGIO; break; |
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case 'h': port_base = PORTHIO; break; |
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default: goto show_usage; |
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} |
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/* grab the <#> portion */ |
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ulong pin = simple_strtoul(str_pin+1, NULL, 10); |
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ulong pin_mask = (1 << pin); |
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if (pin > 15) |
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goto show_usage; |
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/* finally, let's do it: set direction and exec command */ |
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switch (*str_pin) { |
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case 'f': bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~pin_mask); break; |
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case 'g': bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~pin_mask); break; |
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case 'h': bfin_write_PORTH_FER(bfin_read_PORTH_FER() & ~pin_mask); break; |
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} |
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ulong port_dir = port_base + (PORTFIO_DIR - PORTFIO); |
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if (argv[1][0] == 'i') |
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bfin_write16(port_dir, bfin_read16(port_dir) & ~pin_mask); |
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else { |
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bfin_write16(port_dir, bfin_read16(port_dir) | pin_mask); |
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bfin_write16(port_base + port_cmd, pin_mask); |
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} |
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printf("gpio: pin %li on port %c has been %c\n", pin, *str_pin, argv[1][0]); |
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return 0; |
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} |
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U_BOOT_CMD(gpio, 3, 0, do_gpio, |
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"gpio - set/clear/toggle gpio output pins\n", |
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"<s|c|t> <port><pin>\n" |
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" - set/clear/toggle the specified pin\n"); |
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@ -0,0 +1,63 @@ |
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/*
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* gpio_cfi_flash.c - GPIO-assisted Flash Chip Support |
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* |
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* Copyright (c) 2009 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <asm/blackfin.h> |
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#include <asm/io.h> |
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#include "gpio_cfi_flash.h" |
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#define GPIO_PIN_1 PH9 |
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#define GPIO_MASK_1 (1 << 21) |
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#define GPIO_PIN_2 PG11 |
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#define GPIO_MASK_2 (1 << 22) |
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#define GPIO_MASK (GPIO_MASK_1 | GPIO_MASK_2) |
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void *gpio_cfi_flash_swizzle(void *vaddr) |
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{ |
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unsigned long addr = (unsigned long)vaddr; |
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if (addr & GPIO_MASK_1) |
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bfin_write_PORTHIO_SET(GPIO_PIN_1); |
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else |
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bfin_write_PORTHIO_CLEAR(GPIO_PIN_1); |
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#ifdef GPIO_MASK_2 |
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if (addr & GPIO_MASK_2) |
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bfin_write_PORTGIO_SET(GPIO_PIN_2); |
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else |
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bfin_write_PORTGIO_CLEAR(GPIO_PIN_2); |
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#endif |
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SSYNC(); |
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return (void *)(addr & ~GPIO_MASK); |
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} |
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#define __raw_writeq(value, addr) *(volatile u64 *)addr = value |
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#define __raw_readq(addr) *(volatile u64 *)addr |
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#define MAKE_FLASH(size, sfx) \ |
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void flash_write##size(u##size value, void *addr) \
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{ \
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__raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
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} \
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u##size flash_read##size(void *addr) \
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{ \
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return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
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} |
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MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ |
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MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ |
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MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ |
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MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ |
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void gpio_cfi_flash_init(void) |
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{ |
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bfin_write_PORTHIO_DIR(bfin_read_PORTHIO_DIR() | GPIO_PIN_1); |
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bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | GPIO_PIN_2); |
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gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE); |
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} |
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@ -0,0 +1,10 @@ |
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/*
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* gpio_cfi_flash.c - GPIO-assisted Flash Chip Support |
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* |
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* Copyright (c) 2009 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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void *gpio_cfi_flash_swizzle(void *vaddr); |
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void gpio_cfi_flash_init(void); |
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@ -0,0 +1,124 @@ |
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/* |
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* U-boot - u-boot.lds.S |
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* |
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* Copyright (c) 2005-2008 Analog Device Inc. |
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* |
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* (C) Copyright 2000-2004 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of
|
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <config.h> |
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#include <asm/blackfin.h> |
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#undef ALIGN |
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#undef ENTRY |
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#undef bfin |
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/* If we don't actually load anything into L1 data, this will avoid |
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* a syntax error. If we do actually load something into L1 data, |
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* we'll get a linker memory load error (which is what we'd want). |
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* This is here in the first place so we can quickly test building |
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* for different CPU's which may lack non-cache L1 data. |
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*/ |
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#ifndef L1_DATA_B_SRAM |
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# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE |
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# define L1_DATA_B_SRAM_SIZE 0 |
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#endif |
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OUTPUT_ARCH(bfin) |
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MEMORY |
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{ |
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ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN |
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l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE |
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l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE |
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} |
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ENTRY(_start) |
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SECTIONS |
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{ |
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.text : |
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{ |
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cpu/blackfin/start.o (.text .text.*) |
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__initcode_start = .;
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cpu/blackfin/initcode.o (.text .text.*) |
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__initcode_end = .;
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*(.text .text.*) |
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} >ram |
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.rodata : |
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{ |
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. = ALIGN(4);
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*(.rodata .rodata.*) |
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*(.rodata1) |
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*(.eh_frame) |
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. = ALIGN(4);
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} >ram |
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.data : |
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{ |
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. = ALIGN(256);
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*(.data .data.*) |
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*(.data1) |
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*(.sdata) |
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*(.sdata2) |
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*(.dynamic) |
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CONSTRUCTORS |
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} >ram |
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.u_boot_cmd : |
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{ |
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___u_boot_cmd_start = .;
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*(.u_boot_cmd) |
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___u_boot_cmd_end = .;
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} >ram |
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.text_l1 : |
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{ |
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. = ALIGN(4);
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__stext_l1 = .;
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*(.l1.text) |
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. = ALIGN(4);
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__etext_l1 = .;
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} >l1_code AT>ram |
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__stext_l1_lma = LOADADDR(.text_l1);
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.data_l1 : |
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{ |
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. = ALIGN(4);
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__sdata_l1 = .;
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*(.l1.data) |
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*(.l1.bss) |
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. = ALIGN(4);
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__edata_l1 = .;
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} >l1_data AT>ram |
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__sdata_l1_lma = LOADADDR(.data_l1);
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.bss : |
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{ |
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. = ALIGN(4);
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__bss_start = .;
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*(.sbss) *(.scommon) |
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*(.dynbss) |
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*(.bss .bss.*) |
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*(COMMON) |
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__bss_end = .;
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} >ram |
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} |
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@ -0,0 +1,137 @@ |
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/*
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* U-boot - Configuration file for CM-BF527 board |
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*/ |
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#ifndef __CONFIG_CM_BF527_H__ |
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#define __CONFIG_CM_BF527_H__ |
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#include <asm/blackfin-config-pre.h> |
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/*
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* Processor Settings |
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*/ |
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#define CONFIG_BFIN_CPU bf527-0.0 |
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA |
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/*
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* Clock Settings |
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* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
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* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
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*/ |
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/* CONFIG_CLKIN_HZ is any value in Hz */ |
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#define CONFIG_CLKIN_HZ 25000000 |
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/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
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/* 1 = CLKIN / 2 */ |
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#define CONFIG_CLKIN_HALF 0 |
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/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
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/* 1 = bypass PLL */ |
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#define CONFIG_PLL_BYPASS 0 |
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
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/* Values can range from 0-63 (where 0 means 64) */ |
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#define CONFIG_VCO_MULT 21 |
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/* CCLK_DIV controls the core clock divider */ |
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/* Values can be 1, 2, 4, or 8 ONLY */ |
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#define CONFIG_CCLK_DIV 1 |
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/* SCLK_DIV controls the system clock divider */ |
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/* Values can range from 1-15 */ |
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#define CONFIG_SCLK_DIV 4 |
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|
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|
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/*
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* Memory Settings |
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*/ |
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#define CONFIG_MEM_ADD_WDTH 9 |
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#define CONFIG_MEM_SIZE 32 |
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#define CONFIG_EBIU_SDRRC_VAL 0x3f8 |
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#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd |
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|
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#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) |
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#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) |
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#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) |
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|
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
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|
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|
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/*
|
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* NAND Settings |
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* (can't be used sametime as ethernet) |
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*/ |
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/* #define CONFIG_BFIN_NFC */ |
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#ifdef CONFIG_BFIN_NFC |
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#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 |
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#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define NAND_MAX_CHIPS 1 |
||||
#define CONFIG_CMD_NAND |
||||
#endif |
||||
|
||||
|
||||
/*
|
||||
* Network Settings |
||||
*/ |
||||
#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ |
||||
!defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) |
||||
#define ADI_CMDS_NETWORK 1 |
||||
#define CONFIG_BFIN_MAC |
||||
#define CONFIG_RMII |
||||
#define CONFIG_NETCONSOLE 1 |
||||
#define CONFIG_NET_MULTI 1 |
||||
#endif |
||||
#define CONFIG_HOSTNAME cm-bf527 |
||||
/* Uncomment next line to use fixed MAC address */ |
||||
/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ |
||||
|
||||
|
||||
/*
|
||||
* Flash Settings |
||||
*/ |
||||
#define CONFIG_FLASH_CFI_DRIVER |
||||
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS |
||||
#define CONFIG_SYS_FLASH_BASE 0x20000000 |
||||
#define CONFIG_SYS_FLASH_CFI |
||||
#define CONFIG_SYS_FLASH_PROTECTION |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 64 |
||||
|
||||
|
||||
/*
|
||||
* Env Storage Settings |
||||
*/ |
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
#define CONFIG_ENV_ADDR 0x20008000 |
||||
#define CONFIG_ENV_OFFSET 0x8000 |
||||
#define CONFIG_ENV_SIZE 0x8000 |
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 |
||||
#define ENV_IS_EMBEDDED_CUSTOM |
||||
|
||||
|
||||
/*
|
||||
* I2C Settings |
||||
*/ |
||||
#define CONFIG_BFIN_TWI_I2C 1 |
||||
#define CONFIG_HARD_I2C 1 |
||||
#define CONFIG_SYS_I2C_SPEED 50000 |
||||
#define CONFIG_SYS_I2C_SLAVE 0 |
||||
|
||||
|
||||
/*
|
||||
* Misc Settings |
||||
*/ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_MISC_INIT_R |
||||
#define CONFIG_RTC_BFIN |
||||
#define CONFIG_UART_CONSOLE 0 |
||||
|
||||
|
||||
/*
|
||||
* Pull in common ADI header for remaining command/environment setup |
||||
*/ |
||||
#include <configs/bfin_adi_common.h> |
||||
|
||||
#include <asm/blackfin-config-post.h> |
||||
|
||||
#endif |
||||
Loading…
Reference in new issue