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@ -205,99 +205,113 @@ |
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clock-frequency = <1fca055>; |
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interrupt-parent = <40000>; |
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interrupts = <18 2>; |
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interrupt-map-mask = <f800 0 0 f>; |
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interrupt-map-mask = <f800 0 0 7>; |
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interrupt-map = < |
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/* IDSEL 0x11 */ |
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8800 0 0 1 40000 3 0 |
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8800 0 0 2 40000 4 0 |
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8800 0 0 3 40000 5 0 |
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8800 0 0 4 40000 6 0 |
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8800 0 0 1 4d0 3 2 |
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8800 0 0 2 4d0 4 2 |
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8800 0 0 3 4d0 5 2 |
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8800 0 0 4 4d0 6 2 |
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/* IDSEL 0x12 */ |
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9000 0 0 1 40000 4 0 |
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9000 0 0 2 40000 5 0 |
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9000 0 0 3 40000 6 0 |
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9000 0 0 4 40000 3 0 |
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9000 0 0 1 4d0 4 2 |
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9000 0 0 2 4d0 5 2 |
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9000 0 0 3 4d0 6 2 |
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9000 0 0 4 4d0 3 2 |
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/* IDSEL 0x13 */ |
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9800 0 0 1 40000 0 0 |
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9800 0 0 2 40000 0 0 |
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9800 0 0 3 40000 0 0 |
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9800 0 0 4 40000 0 0 |
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9800 0 0 1 4d0 0 0 |
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9800 0 0 2 4d0 0 0 |
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9800 0 0 3 4d0 0 0 |
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9800 0 0 4 4d0 0 0 |
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/* IDSEL 0x14 */ |
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a000 0 0 1 40000 0 0 |
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a000 0 0 2 40000 0 0 |
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a000 0 0 3 40000 0 0 |
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a000 0 0 4 40000 0 0 |
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a000 0 0 1 4d0 0 0 |
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a000 0 0 2 4d0 0 0 |
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a000 0 0 3 4d0 0 0 |
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a000 0 0 4 4d0 0 0 |
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/* IDSEL 0x15 */ |
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a800 0 0 1 40000 0 0 |
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a800 0 0 2 40000 0 0 |
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a800 0 0 3 40000 0 0 |
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a800 0 0 4 40000 0 0 |
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a800 0 0 1 4d0 0 0 |
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a800 0 0 2 4d0 0 0 |
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a800 0 0 3 4d0 0 0 |
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a800 0 0 4 4d0 0 0 |
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/* IDSEL 0x16 */ |
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b000 0 0 1 40000 0 0 |
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b000 0 0 2 40000 0 0 |
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b000 0 0 3 40000 0 0 |
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b000 0 0 4 40000 0 0 |
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b000 0 0 1 4d0 0 0 |
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b000 0 0 2 4d0 0 0 |
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b000 0 0 3 4d0 0 0 |
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b000 0 0 4 4d0 0 0 |
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/* IDSEL 0x17 */ |
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b800 0 0 1 40000 0 0 |
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b800 0 0 2 40000 0 0 |
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b800 0 0 3 40000 0 0 |
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b800 0 0 4 40000 0 0 |
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b800 0 0 1 4d0 0 0 |
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b800 0 0 2 4d0 0 0 |
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b800 0 0 3 4d0 0 0 |
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b800 0 0 4 4d0 0 0 |
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/* IDSEL 0x18 */ |
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c000 0 0 1 40000 0 0 |
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c000 0 0 2 40000 0 0 |
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c000 0 0 3 40000 0 0 |
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c000 0 0 4 40000 0 0 |
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c000 0 0 1 4d0 0 0 |
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c000 0 0 2 4d0 0 0 |
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c000 0 0 3 4d0 0 0 |
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c000 0 0 4 4d0 0 0 |
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/* IDSEL 0x19 */ |
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c800 0 0 1 40000 0 0 |
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c800 0 0 2 40000 0 0 |
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c800 0 0 3 40000 0 0 |
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c800 0 0 4 40000 0 0 |
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c800 0 0 1 4d0 0 0 |
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c800 0 0 2 4d0 0 0 |
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c800 0 0 3 4d0 0 0 |
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c800 0 0 4 4d0 0 0 |
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/* IDSEL 0x1a */ |
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d000 0 0 1 40000 6 0 |
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d000 0 0 2 40000 3 0 |
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d000 0 0 3 40000 4 0 |
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d000 0 0 4 40000 5 0 |
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d000 0 0 1 4d0 6 2 |
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d000 0 0 2 4d0 3 2 |
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d000 0 0 3 4d0 4 2 |
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d000 0 0 4 4d0 5 2 |
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/* IDSEL 0x1b */ |
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d800 0 0 1 40000 5 0 |
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d800 0 0 2 40000 0 0 |
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d800 0 0 3 40000 0 0 |
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d800 0 0 4 40000 0 0 |
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d800 0 0 1 4d0 5 2 |
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d800 0 0 2 4d0 0 0 |
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d800 0 0 3 4d0 0 0 |
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d800 0 0 4 4d0 0 0 |
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/* IDSEL 0x1c */ |
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e000 0 0 1 40000 9 0 |
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e000 0 0 2 40000 a 0 |
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e000 0 0 3 40000 c 0 |
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e000 0 0 4 40000 7 0 |
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e000 0 0 1 4d0 9 2 |
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e000 0 0 2 4d0 a 2 |
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e000 0 0 3 4d0 c 2 |
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e000 0 0 4 4d0 7 2 |
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/* IDSEL 0x1d */ |
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e800 0 0 1 40000 9 0 |
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e800 0 0 2 40000 a 0 |
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e800 0 0 3 40000 b 0 |
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e800 0 0 4 40000 0 0 |
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e800 0 0 1 4d0 9 2 |
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e800 0 0 2 4d0 a 2 |
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e800 0 0 3 4d0 b 2 |
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e800 0 0 4 4d0 0 0 |
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/* IDSEL 0x1e */ |
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f000 0 0 1 40000 c 0 |
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f000 0 0 2 40000 0 0 |
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f000 0 0 3 40000 0 0 |
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f000 0 0 4 40000 0 0 |
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f000 0 0 1 4d0 c 2 |
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f000 0 0 2 4d0 0 0 |
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f000 0 0 3 4d0 0 0 |
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f000 0 0 4 4d0 0 0 |
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/* IDSEL 0x1f */ |
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f800 0 0 1 40000 6 0 |
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f800 0 0 2 40000 0 0 |
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f800 0 0 3 40000 0 0 |
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f800 0 0 4 40000 0 0 |
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f800 0 0 1 4d0 6 2 |
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f800 0 0 2 4d0 0 0 |
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f800 0 0 3 4d0 0 0 |
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f800 0 0 4 4d0 0 0 |
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>; |
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i8259@4d0 { |
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linux,phandle = <4d0>; |
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clock-frequency = <0>; |
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interrupt-controller; |
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device_type = "interrupt-controller"; |
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#address-cells = <0>; |
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#interrupt-cells = <2>; |
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built-in; |
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compatible = "chrp,iic"; |
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big-endian; |
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interrupts = <49 2>; |
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interrupt-parent = <40000>; |
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}; |
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}; |
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pic@40000 { |
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linux,phandle = <40000>; |
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