Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

arm: am437x: cm-t43: split board file

Browse Source 
Simplify the board file by splitting it to spl portion and u-boot portion.
Some unnecessary includes were identified and removed. No functional changes.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
master
Nikita Kiryanov 9 years ago committed by Tom Rini
parent 4067a6c8d3
commit 5dc5a8cac7
3 changed files with 150 additions and 140 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 6
      board/compulab/cm_t43/Makefile
  2. 144
      board/compulab/cm_t43/cm_t43.c
  3. 140
      board/compulab/cm_t43/spl.c

6
board/compulab/cm_t43/Makefile
Unescape View File

@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o mux.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o mux.o
else
obj-y += cm_t43.o mux.o
endif

144
board/compulab/cm_t43/cm_t43.c
Unescape View File

@ -0,0 +1,144 @@
/*
* Copyright (C) 2015 Compulab, Ltd.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
#include <asm/gpio.h>
#include <asm/arch/sys_proto.h>
#include <asm/emif.h>
#include <power/pmic.h>
#include <power/tps65218.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
/* setup board specific PMIC */
int power_init_board(void)
{
struct pmic *p;
power_tps65218_init(I2C_PMIC);
p = pmic_get("TPS65218_PMIC");
if (p && !pmic_probe(p))
puts("PMIC: TPS65218\n");
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
set_i2c_pin_mux();
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
i2c_probe(TPS65218_CHIP_PM);
return 0;
}
#ifdef CONFIG_DRIVER_TI_CPSW
static void cpsw_control(int enabled)
{
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RGMII,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_addr = 1,
.phy_if = PHY_INTERFACE_MODE_RGMII,
},
};
static struct cpsw_platform_data cpsw_data = {
.mdio_base = CPSW_MDIO_BASE,
.cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
.slaves = 2,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0xd00,
.ale_entries = 1024,
.host_port_reg_ofs = 0x108,
.hw_stats_reg_ofs = 0x900,
.bd_ram_ofs = 0x2000,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_2,
};
#define GPIO_PHY1_RST 170
#define GPIO_PHY2_RST 168
int board_phy_config(struct phy_device *phydev)
{
unsigned short val;
/* introduce tx clock delay */
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
val |= 0x0100;
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
if (phydev->drv->config)
return phydev->drv->config(phydev);
return 0;
}
static void board_phy_init(void)
{
set_mdio_pin_mux();
writel(0x40003, 0x44e10a74); /* Mux pin as clkout2 */
writel(0x10006, 0x44df4108); /* Select EXTDEV as clock source */
writel(0x4, 0x44df2e60); /* Set EXTDEV as MNbypass */
/* For revision A */
writel(0x2000009, 0x44df2e6c);
writel(0x38a, 0x44df2e70);
mdelay(10);
gpio_request(GPIO_PHY1_RST, "phy1_rst");
gpio_request(GPIO_PHY2_RST, "phy2_rst");
gpio_direction_output(GPIO_PHY1_RST, 0);
gpio_direction_output(GPIO_PHY2_RST, 0);
mdelay(2);
gpio_set_value(GPIO_PHY1_RST, 1);
gpio_set_value(GPIO_PHY2_RST, 1);
mdelay(2);
}
int board_eth_init(bd_t *bis)
{
int rv;
set_rgmii_pin_mux();
writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel);
board_phy_init();
rv = cpsw_register(&cpsw_data);
if (rv < 0)
printf("Error %d registering CPSW switch\n", rv);
return rv;
}
#endif

140
board/compulab/cm_t43/board.c → board/compulab/cm_t43/spl.c
Unescape View File

@ -1,31 +1,17 @@
/*
* Copyright (C) 2015 Compulab, Ltd.
* Copyright (C) 2016 Compulab, Ltd.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
#include <spl.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
#include <asm/arch/ddr_defs.h>
#include <asm/errno.h>
#include <asm/gpio.h>
#include <asm/emif.h>
#include <power/pmic.h>
#include <power/tps65218.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
const struct dpll_params dpll_mpu = { 800, 24, 1, -1, -1, -1, -1 };
const struct dpll_params dpll_core = { 1000, 24, -1, -1, 10, 8, 4 };
const struct dpll_params dpll_per = { 960, 24, 5, -1, -1, -1, -1 };
@ -145,128 +131,4 @@ void sdram_init(void)
hang();
}
#endif
/* setup board specific PMIC */
int power_init_board(void)
{
struct pmic *p;
power_tps65218_init(I2C_PMIC);
p = pmic_get("TPS65218_PMIC");
if (p && !pmic_probe(p))
puts("PMIC: TPS65218\n");
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
set_i2c_pin_mux();
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
i2c_probe(TPS65218_CHIP_PM);
return 0;
}
#ifdef CONFIG_DRIVER_TI_CPSW
static void cpsw_control(int enabled)
{
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RGMII,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_addr = 1,
.phy_if = PHY_INTERFACE_MODE_RGMII,
},
};
static struct cpsw_platform_data cpsw_data = {
.mdio_base = CPSW_MDIO_BASE,
.cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
.slaves = 2,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0xd00,
.ale_entries = 1024,
.host_port_reg_ofs = 0x108,
.hw_stats_reg_ofs = 0x900,
.bd_ram_ofs = 0x2000,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_2,
};
#define GPIO_PHY1_RST 170
#define GPIO_PHY2_RST 168
int board_phy_config(struct phy_device *phydev)
{
unsigned short val;
/* introduce tx clock delay */
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
val |= 0x0100;
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
if (phydev->drv->config)
return phydev->drv->config(phydev);
return 0;
}
static void board_phy_init(void)
{
set_mdio_pin_mux();
writel(0x40003, 0x44e10a74); /* Mux pin as clkout2 */
writel(0x10006, 0x44df4108); /* Select EXTDEV as clock source */
writel(0x4, 0x44df2e60); /* Set EXTDEV as MNbypass */
/* For revision A */
writel(0x2000009, 0x44df2e6c);
writel(0x38a, 0x44df2e70);
mdelay(10);
gpio_request(GPIO_PHY1_RST, "phy1_rst");
gpio_request(GPIO_PHY2_RST, "phy2_rst");
gpio_direction_output(GPIO_PHY1_RST, 0);
gpio_direction_output(GPIO_PHY2_RST, 0);
mdelay(2);
gpio_set_value(GPIO_PHY1_RST, 1);
gpio_set_value(GPIO_PHY2_RST, 1);
mdelay(2);
}
int board_eth_init(bd_t *bis)
{
int rv;
set_rgmii_pin_mux();
writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel);
board_phy_init();
rv = cpsw_register(&cpsw_data);
if (rv < 0)
printf("Error %d registering CPSW switch\n", rv);
return rv;
}
#endif
Write Preview
Loading…
Cancel
Save