This patch adds support for the leopard board which is based on the DM355 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>master
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#
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# (C) Copyright 2000, 2001, 2002
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := $(BOARD).o
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SOBJS :=
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# This is for $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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# Linux Kernel is expected to be at 8000'8000, entry 8000'8000
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# (mem base + reserved)
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#
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#Provide at least 16MB spacing between us and the Linux Kernel image
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TEXT_BASE = 0x81080000
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/*
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* Copyright (C) 2009 Texas Instruments Incorporated |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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#include <common.h> |
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#include <nand.h> |
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#include <asm/io.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/gpio_defs.h> |
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#include "../common/misc.h" |
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#include <net.h> |
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#include <netdev.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init(void) |
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{ |
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struct davinci_gpio *gpio01_base = |
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(struct davinci_gpio *)DAVINCI_GPIO_BANK01; |
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struct davinci_gpio *gpio23_base = |
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(struct davinci_gpio *)DAVINCI_GPIO_BANK23; |
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struct davinci_gpio *gpio67_base = |
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(struct davinci_gpio *)DAVINCI_GPIO_BANK67; |
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gd->bd->bi_arch_number = MACH_TYPE_DM355_LEOPARD; |
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
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/* GIO 9 & 10 are used for IO */ |
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writel((readl(PINMUX3) & 0XF8FFFFFF), PINMUX3); |
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/* Interrupt set GIO 9 */ |
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writel((readl(DAVINCI_GPIO_BINTEN) | 0x1), DAVINCI_GPIO_BINTEN); |
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/* set GIO 9 input */ |
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writel((readl(&gpio01_base->dir) | (1 << 9)), &gpio01_base->dir); |
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/* Both edge trigger GIO 9 */ |
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writel((readl(&gpio01_base->set_rising) | (1 << 9)), |
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&gpio01_base->set_rising); |
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writel((readl(&gpio01_base->dir) & ~(1 << 5)), &gpio01_base->dir); |
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/* output low */ |
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writel((readl(&gpio01_base->set_data) & ~(1 << 5)), |
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&gpio01_base->set_data); |
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/* set GIO 10 output */ |
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writel((readl(&gpio01_base->dir) & ~(1 << 10)), &gpio01_base->dir); |
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/* output high */ |
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writel((readl(&gpio01_base->set_data) | (1 << 10)), |
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&gpio01_base->set_data); |
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/* set GIO 32 output */ |
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writel((readl(&gpio23_base->dir) & ~(1 << 0)), &gpio23_base->dir); |
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/* output High */ |
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writel((readl(&gpio23_base->set_data) | (1 << 0)), |
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&gpio23_base->set_data); |
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/* Enable UART1 MUX Lines */ |
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writel((readl(PINMUX0) & ~3), PINMUX0); |
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writel((readl(&gpio67_base->dir) & ~(1 << 6)), &gpio67_base->dir); |
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writel((readl(&gpio67_base->set_data) | (1 << 6)), |
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&gpio67_base->set_data); |
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return 0; |
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} |
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#ifdef CONFIG_DRIVER_DM9000 |
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int board_eth_init(bd_t *bis) |
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{ |
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return dm9000_initialize(bis); |
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} |
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#endif |
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#ifdef CONFIG_NAND_DAVINCI |
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int board_nand_init(struct nand_chip *nand) |
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{ |
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davinci_nand_init(nand); |
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return 0; |
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} |
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#endif |
@ -0,0 +1,162 @@ |
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/*
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* Copyright (C) 2009 Texas Instruments Incorporated |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#define DAVINCI_DM355LEOPARD |
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ |
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#define CONFIG_SKIP_RELOCATE_UBOOT |
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#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ |
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#define CONFIG_SYS_CONSOLE_INFO_QUIET |
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#define CONFIG_DISPLAY_CPUINFO |
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/* SoC Configuration */ |
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#define CONFIG_ARM926EJS /* arm926ejs CPU */ |
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#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
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#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ |
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#define CONFIG_SYS_HZ 1000 |
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#define CONFIG_SOC_DM355 /* DM355 based board */ |
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/* Memory Info */ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM_1 0x80000000 |
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#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */ |
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/* Serial Driver info: UART0 for console */ |
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#define CONFIG_SYS_NS16550 |
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#define CONFIG_SYS_NS16550_SERIAL |
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#define CONFIG_SYS_NS16550_REG_SIZE -4 |
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#define CONFIG_SYS_NS16550_COM1 0x01c20000 |
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK |
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
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#define CONFIG_CONS_INDEX 1 |
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#define CONFIG_BAUDRATE 115200 |
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/* Ethernet: external DM9000 */ |
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#define CONFIG_DRIVER_DM9000 1 |
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#define CONFIG_DM9000_BASE 0x04000000 |
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#define DM9000_IO CONFIG_DM9000_BASE |
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#define DM9000_DATA (CONFIG_DM9000_BASE + 16) |
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#define CONFIG_NET_MULTI |
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/* I2C */ |
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#define CONFIG_HARD_I2C |
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#define CONFIG_DRIVER_DAVINCI_I2C |
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#define CONFIG_SYS_I2C_SPEED 400000 |
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#define CONFIG_SYS_I2C_SLAVE 0x10 |
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/* NAND */ |
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#define CONFIG_NAND_DAVINCI |
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#define CONFIG_SYS_NAND_USE_FLASH_BBT |
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#define CONFIG_SYS_NAND_HW_ECC |
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#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
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#define CONFIG_SYS_NAND_MAX_CHIPS 1 |
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/* U-Boot command configuration */ |
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#include <config_cmd_default.h> |
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#undef CONFIG_CMD_BDI |
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#undef CONFIG_CMD_FLASH |
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#undef CONFIG_CMD_FPGA |
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#undef CONFIG_CMD_SETGETDCR |
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#define CONFIG_CMD_ASKENV |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_CMD_I2C |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_SAVES |
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#ifdef CONFIG_NAND_DAVINCI |
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#define CONFIG_CMD_MTDPARTS |
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#define CONFIG_MTD_PARTITIONS |
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#define CONFIG_MTD_DEVICE |
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#define CONFIG_CMD_NAND |
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#define CONFIG_CMD_UBI |
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#define CONFIG_RBTREE |
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#endif |
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#define CONFIG_CRC32_VERIFY |
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#define CONFIG_MX_CYCLIC |
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/* U-Boot general configuration */ |
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#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ |
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#define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
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#define CONFIG_SYS_PROMPT "DM355 LEOPARD # " |
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
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#define CONFIG_SYS_PBSIZE /* Print buffer size */ \ |
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
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#define CONFIG_SYS_HUSH_PARSER |
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
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#define CONFIG_SYS_LONGHELP |
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#ifdef CONFIG_NAND_DAVINCI |
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#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ |
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#define CONFIG_ENV_IS_IN_NAND |
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#define CONFIG_ENV_OFFSET 0x3C0000 |
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#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ |
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#undef CONFIG_ENV_IS_IN_FLASH |
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#define CONFIG_ENV_OVERWRITE |
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#endif |
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#define CONFIG_BOOTDELAY 3 |
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#define CONFIG_BOOTCOMMAND "dhcp;bootm" |
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#define CONFIG_BOOTARGS \ |
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"console=ttyS0,115200n8 " \
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"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" |
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#define CONFIG_CMDLINE_EDITING |
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#define CONFIG_VERSION_VARIABLE |
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#define CONFIG_TIMESTAMP |
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#define CONFIG_NET_RETRY_COUNT 10 |
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/* U-Boot memory configuration */ |
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#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ |
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#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ |
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ |
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#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ |
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#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ |
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/* Linux interfacing */ |
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#define CONFIG_CMDLINE_TAG |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ |
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#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ |
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#define MTDIDS_DEFAULT "nand0=davinci_nand.0" |
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#ifdef CONFIG_SYS_NAND_LARGEPAGE |
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#define PART_BOOT "2m(bootloader)ro," |
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#else |
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/* Assume 16K erase blocks; allow a few bad ones. */ |
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#define PART_BOOT "512k(bootloader)ro," |
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#endif |
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#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ |
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#define PART_REST "-(filesystem)" |
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#define MTDPARTS_DEFAULT \ |
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"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST |
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#endif /* __CONFIG_H */ |
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