When a VBT is given to an FSP that supports graphics initialization, the FSP will produce a graphics info HOB that contains all necessary information for the linear frame buffer of the integrated graphics device. This adds a DM video driver for it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>master
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/*
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* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <vbe.h> |
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#include <video.h> |
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#include <asm/fsp/fsp_support.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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struct pixel { |
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u8 pos; |
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u8 size; |
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}; |
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static const struct fsp_framebuffer { |
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struct pixel red; |
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struct pixel green; |
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struct pixel blue; |
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struct pixel rsvd; |
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} fsp_framebuffer_format_map[] = { |
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[pixel_rgbx_8bpc] = { {0, 8}, {8, 8}, {16, 8}, {24, 8} }, |
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[pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} }, |
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}; |
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static int save_vesa_mode(struct vesa_mode_info *vesa) |
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{ |
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const struct hob_graphics_info *ginfo; |
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const struct fsp_framebuffer *fbinfo; |
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ginfo = fsp_get_graphics_info(gd->arch.hob_list, NULL); |
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/*
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* If there is no graphics info structure, bail out and keep |
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* running on the serial console. |
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*/ |
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if (!ginfo) { |
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debug("FSP graphics hand-off block not found\n"); |
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return -ENXIO; |
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} |
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vesa->x_resolution = ginfo->width; |
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vesa->y_resolution = ginfo->height; |
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vesa->bits_per_pixel = 32; |
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vesa->bytes_per_scanline = ginfo->pixels_per_scanline * 4; |
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vesa->phys_base_ptr = ginfo->fb_base; |
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if (ginfo->pixel_format >= pixel_bitmask) { |
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debug("FSP set unknown framebuffer format: %d\n", |
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ginfo->pixel_format); |
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return -EINVAL; |
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} |
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fbinfo = &fsp_framebuffer_format_map[ginfo->pixel_format]; |
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vesa->red_mask_size = fbinfo->red.size; |
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vesa->red_mask_pos = fbinfo->red.pos; |
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vesa->green_mask_size = fbinfo->green.size; |
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vesa->green_mask_pos = fbinfo->green.pos; |
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vesa->blue_mask_size = fbinfo->blue.size; |
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vesa->blue_mask_pos = fbinfo->blue.pos; |
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vesa->reserved_mask_size = fbinfo->rsvd.size; |
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vesa->reserved_mask_pos = fbinfo->rsvd.pos; |
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return 0; |
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} |
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static int fsp_video_probe(struct udevice *dev) |
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{ |
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struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); |
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struct video_priv *uc_priv = dev_get_uclass_priv(dev); |
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struct vesa_mode_info *vesa = &mode_info.vesa; |
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int ret; |
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printf("Video: "); |
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/* Initialize vesa_mode_info structure */ |
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ret = save_vesa_mode(vesa); |
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if (ret) |
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goto err; |
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/*
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* The framebuffer base address in the FSP graphics info HOB reflects |
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* the value assigned by the FSP. After PCI enumeration the framebuffer |
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* base address may be relocated. Let's get the updated one from device. |
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* |
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* For IGD, it seems to be always on BAR2. |
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*/ |
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vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2); |
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ret = vbe_setup_video_priv(vesa, uc_priv, plat); |
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if (ret) |
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goto err; |
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printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, |
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vesa->bits_per_pixel); |
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return 0; |
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err: |
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printf("No video mode configured in FSP!\n"); |
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return ret; |
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} |
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static const struct udevice_id fsp_video_ids[] = { |
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{ .compatible = "fsp-fb" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(fsp_video) = { |
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.name = "fsp_video", |
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.id = UCLASS_VIDEO, |
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.of_match = fsp_video_ids, |
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.probe = fsp_video_probe, |
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}; |
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static struct pci_device_id fsp_video_supported[] = { |
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{ PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, 0xffff00) }, |
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{ }, |
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}; |
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U_BOOT_PCI_DEVICE(fsp_video, fsp_video_supported); |
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