arm: socfpga: de0_nano: Remove Micrel PHY configuration

The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

board/terasic/de0-nano-soc/socfpga.c

@@ -6,10 +6,6 @@
 
 #include <common.h>
 
-#include <micrel.h>
-#include <netdev.h>
-#include <phy.h>
-
 DECLARE_GLOBAL_DATA_PTR;
 
 void s_init(void) {}
@@ -24,49 +20,3 @@ int board_init(void)
 
 	return 0;
 }
-
-/*
- * PHY configuration
- */
-#ifdef CONFIG_PHY_MICREL_KSZ9031
-int board_phy_config(struct phy_device *phydev)
-{
-	int ret;
-	/*
-	 * These skew settings for the KSZ9021 ethernet phy is required for ethernet
-	 * to work reliably on most flavors of cyclone5 boards.
-	 */
-	ret = ksz9031_phy_extended_write(phydev, 0x2,
-					 MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
-					 MII_KSZ9031_MOD_DATA_NO_POST_INC,
-					 0x70);
-	if (ret)
-		return ret;
-
-	ret = ksz9031_phy_extended_write(phydev, 0x2,
-					 MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
-					 MII_KSZ9031_MOD_DATA_NO_POST_INC,
-					 0x7777);
-	if (ret)
-		return ret;
-
-	ret = ksz9031_phy_extended_write(phydev, 0x2,
-					 MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
-					 MII_KSZ9031_MOD_DATA_NO_POST_INC,
-					 0);
-	if (ret)
-		return ret;
-
-	ret = ksz9031_phy_extended_write(phydev, 0x2,
-					 MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
-					 MII_KSZ9031_MOD_DATA_NO_POST_INC,
-					 0x03FC);
-	if (ret)
-		return ret;
-
-	if (phydev->drv->config)
-		return phydev->drv->config(phydev);
-
-	return 0;
-}
-#endif

include/configs/socfpga_de0_nano_soc.h

@@ -47,11 +47,8 @@
 
 /* Ethernet on SoC (EMAC) */
 #if defined(CONFIG_CMD_NET)
-
-/* PHY */
 #define CONFIG_PHY_MICREL
 #define CONFIG_PHY_MICREL_KSZ9031
-
 #endif
 
 #define CONFIG_ENV_IS_IN_MMC