mx6: use CONFIG_MX6 instead of CONFIG_MX6Q

Use CONFIG_MX6 when the particular processor
variant isn't important.

Reserve the use of CONFIG_MX6Q to
specifically test for quad cores variant.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
master
Troy Kisky 12 years ago committed by Stefano Babic
parent 20332a066a
commit 5ea6d7c8fc
  1. 6
      drivers/gpio/mxc_gpio.c
  2. 2
      drivers/video/ipu_regs.h
  3. 1
      include/configs/mx6qarm2.h
  4. 1
      include/configs/mx6qsabre_common.h
  5. 1
      include/configs/mx6qsabrelite.h

@ -42,14 +42,14 @@ static unsigned long gpio_ports[] = {
[1] = GPIO2_BASE_ADDR,
[2] = GPIO3_BASE_ADDR,
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
defined(CONFIG_MX53) || defined(CONFIG_MX6)
[3] = GPIO4_BASE_ADDR,
#endif
#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
[4] = GPIO5_BASE_ADDR,
[5] = GPIO6_BASE_ADDR,
#endif
#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
[6] = GPIO7_BASE_ADDR,
#endif
};

@ -55,7 +55,7 @@
#define IPU_TPM_REG_BASE 0x01060000
#define IPU_DC_TMPL_REG_BASE 0x01080000
#define IPU_ISP_TBPR_REG_BASE 0x010C0000
#elif defined(CONFIG_MX6Q)
#elif defined(CONFIG_MX6)
#define IPU_CPMEM_REG_BASE 0x00100000
#define IPU_LUT_REG_BASE 0x00120000
#define IPU_SRM_REG_BASE 0x00140000

@ -22,6 +22,7 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MX6
#define CONFIG_MX6Q
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

@ -17,6 +17,7 @@
#ifndef __MX6QSABRE_COMMON_CONFIG_H
#define __MX6QSABRE_COMMON_CONFIG_H
#define CONFIG_MX6
#define CONFIG_MX6Q
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

@ -22,6 +22,7 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MX6
#define CONFIG_MX6Q
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

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