omap3: Fix SPI registers on am33xx and am43xx

When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.

v2: Fixed commit subject line to correct cpu

Signed-off-by: Martin Hejnfelt <mh@newtec.dk>
master
Martin Hejnfelt 8 years ago committed by Tom Rini
parent c1420f8b2b
commit 5f89a15e16
  1. 23
      drivers/spi/omap3_spi.c

@ -35,6 +35,12 @@ DECLARE_GLOBAL_DATA_PTR;
#define OMAP3_MCSPI4_BASE 0x480BA000
#endif
#define OMAP4_MCSPI_REG_OFFSET 0x100
struct omap2_mcspi_platform_config {
unsigned int regs_offset;
};
/* per-register bitmasks */
#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
@ -623,7 +629,10 @@ static int omap3_spi_probe(struct udevice *dev)
const void *blob = gd->fdt_blob;
int node = dev->of_offset;
priv->regs = (struct mcspi *)dev_get_addr(dev);
struct omap2_mcspi_platform_config* data =
(struct omap2_mcspi_platform_config*)dev_get_driver_data(dev);
priv->regs = (struct mcspi *)(dev_get_addr(dev) + data->regs_offset);
priv->pin_dir = fdtdec_get_uint(blob, node, "ti,pindir-d0-out-d1-in",
MCSPI_PINDIR_D0_IN_D1_OUT);
priv->wordlen = SPI_DEFAULT_WORDLEN;
@ -662,9 +671,17 @@ static const struct dm_spi_ops omap3_spi_ops = {
*/
};
static struct omap2_mcspi_platform_config omap2_pdata = {
.regs_offset = 0,
};
static struct omap2_mcspi_platform_config omap4_pdata = {
.regs_offset = OMAP4_MCSPI_REG_OFFSET,
};
static const struct udevice_id omap3_spi_ids[] = {
{ .compatible = "ti,omap2-mcspi" },
{ .compatible = "ti,omap4-mcspi" },
{ .compatible = "ti,omap2-mcspi", .data = (ulong)&omap2_pdata },
{ .compatible = "ti,omap4-mcspi", .data = (ulong)&omap4_pdata },
{ }
};

Loading…
Cancel
Save