Heiko Schocher
18 years ago
committed by
Wolfgang Denk
parent
6341d9d723
commit
5fb2b2342e
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/*
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* (C) Copyright 2007 |
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* Heiko Schocher, DENX Software Engineering, hs@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* High Level Configuration Options |
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* (easy to change) |
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*/ |
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#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
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#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ |
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#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ |
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#define CONFIG_MUNICES 1 /* ... on MUNICes board */ |
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#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ |
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
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#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
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#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
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/*
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* Command line configuration. |
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*/ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_ASKENV |
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#define CONFIG_CMD_ELF |
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#define CONFIG_CMD_IMMAP |
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#define CONFIG_CMD_NET |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_REGINFO |
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
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# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
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#endif |
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/*
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* Serial console configuration |
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*/ |
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#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
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#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
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#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ |
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
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#undef CONFIG_BOOTARGS |
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#define CONFIG_PREBOOT "echo;" \ |
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"echo Type \"run net_nfs\" to load Kernel over TFTP and to mount root filesystem over NFS;" \
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"echo" |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$(serverip):$(rootpath)\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs $(bootargs) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
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":$(hostname):$(netdev):off panic=5\0" \
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"flash_nfs=run nfsargs addip;" \
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"bootm $(kernel_addr)\0" \
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"flash_self=run ramargs addip;" \
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"bootm $(kernel_addr) $(ramdisk_addr)\0" \
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"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
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"rootpath=/opt/eldk/ppc_6xx\0" \
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"bootfile=/tftpboot/munices/u-boot.bin\0" \
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"update=tftpboot 200000 ${bootfile};protect off fff00000 fff3ffff;" \
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"erase fff00000 fff3ffff; cp.b 200000 FFF00000 ${filesize}\0" \
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"" |
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#define CONFIG_BOOTCOMMAND "run net_nfs" |
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/*
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* IPB Bus clocking configuration. |
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*/ |
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#define CFG_IPBSPEED_133 /* define for 133MHz speed */ |
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#if defined(CFG_IPBSPEED_133) |
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/*
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* PCI Bus clocking configuration |
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* |
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* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if |
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* CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't |
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* been tested with a IPB Bus Clock of 66 MHz. |
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*/ |
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#define CFG_PCISPEED_66 /* define for 66MHz speed */ |
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#else |
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#undef CFG_PCISPEED_66 /* for 33MHz speed */ |
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#endif |
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/*
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* Memory map |
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*/ |
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#define CFG_MBAR 0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config */ |
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#define CFG_SDRAM_BASE 0x00000000 |
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/* Use SRAM until RAM will be available */ |
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#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM |
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#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ |
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
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#define CFG_MONITOR_BASE TEXT_BASE |
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#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) |
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# define CFG_RAMBOOT 1 |
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#endif |
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#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ |
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#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
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/*
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* Flash configuration |
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*/ |
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#define CFG_FLASH_BASE 0xFF000000 |
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */ |
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */ |
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//#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } |
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#define CFG_FLASH_EMPTY_INFO |
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#define CFG_FLASH_SIZE 0x01000000 /* 16 MByte */ |
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#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ |
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#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */ |
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#define CFG_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */ |
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/*
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* Chip selects configuration |
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*/ |
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/* Boot Chipselect */ |
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#define CFG_BOOTCS_START CFG_FLASH_BASE |
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#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE |
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#define CFG_BOOTCS_CFG 0x00047800 |
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/*
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* Environment settings |
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*/ |
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#define CFG_ENV_IS_IN_FLASH 1 |
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#define CFG_ENV_OFFSET 0x40000 |
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#define CFG_ENV_ADDR (TEXT_BASE + CFG_ENV_OFFSET) |
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#define CFG_ENV_SECT_SIZE 0x20000 |
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#define CFG_ENV_SIZE 0x4000 |
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#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SECT_SIZE) |
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#define CFG_ENV_ADDR_REDUND (TEXT_BASE + CFG_ENV_OFFSET_REDUND) |
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
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#define CONFIG_ENV_OVERWRITE 1 |
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/*
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* Ethernet configuration |
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*/ |
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#define CONFIG_MPC5xxx_FEC 1 |
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#define CONFIG_PHY_ADDR 0x01 |
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#define CONFIG_MII 1 |
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/*
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* GPIO configuration |
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*/ |
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#define CFG_GPS_PORT_CONFIG 0x00058044 /* PSC1=UART, PSC2=UART ; Ether=100MBit with MD |
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no PCI */ |
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/*
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* Miscellaneous configurable options |
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*/ |
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#define CFG_LONGHELP /* undef to save memory */ |
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
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#define CFG_MAXARGS 16 /* max number of command args */ |
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
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#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ |
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#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
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#define CFG_LOAD_ADDR 0x200000 /* default load address */ |
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
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#define CONFIG_DISPLAY_BOARDINFO 1 |
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#define CONFIG_CMDLINE_EDITING 1 |
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/*
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* Various low-level settings |
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*/ |
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#define CFG_HID0_INIT HID0_ICE | HID0_ICFI |
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#define CFG_HID0_FINAL HID0_ICE |
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#define CFG_CS_BURST 0x00000000 |
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#define CFG_CS_DEADCYCLE 0x33333333 |
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#define CFG_RESET_ADDRESS 0xff000000 |
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/* pass open firmware flat tree */ |
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#define CONFIG_OF_LIBFDT 1 |
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#define CONFIG_OF_BOARD_SETUP 1 |
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#define OF_CPU "PowerPC,5200@0" |
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#define OF_TBCLK (bd->bi_busfreq / 4) |
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#define OF_SOC "soc5200@f0000000" |
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#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" |
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#endif /* __CONFIG_H */ |
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