Xilinx Kconfig changes for v2018.03

- Moving some macros to Kconfig -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlqYIDYACgkQykllyylKDCGX3QCffsdnNpH+uOFZKhxX1bfBz83w 3Y4An1SyCmi/Tco0MaYVgjoJW2O/P5Bm =Zgr8 -----END PGP SIGNATURE----- Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze Xilinx Kconfig changes for v2018.03 - Moving some macros to Kconfig # gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21 # gpg: Good signature from "Michal Simek <monstr@monstr.eu>" # gpg: aka "Michal Simek (Xilinx) <michals@xilinx.com>" # gpg: aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
7 years ago · 6256b02db3
parent 3990c9d627 3ccc207a30
commit 6256b02db3
28 changed files with 97 additions and 35 deletions
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@ -96,6 +96,9 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
 	  Overwrite bootmode selected via boot mode pins to tell SPL what should
 	  be the next boot device.

+config ZYNQ_SDHCI_MAX_FREQ
+	default 200000000
+
 config SPL_ZYNQMP_ALT_BOOTMODE
 	hex
 	default 0x0 if JTAG_MODE
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@ -63,4 +63,7 @@ config BOOT_INIT_FILE
 	  Add register writes to boot.bin format (max 256 pairs).
 	  Expect a table of register-value pairs, e.g. "0x12345678 0x4321"

+config ZYNQ_SDHCI_MAX_FREQ
+	default 52000000
+
 endif
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@ -46,6 +46,7 @@ CONFIG_BOOTP_BOOTPATH=y
 CONFIG_BOOTP_GATEWAY=y
 CONFIG_BOOTP_HOSTNAME=y
 CONFIG_SPL_DM=y
+CONFIG_XILINX_GPIO=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@ -35,6 +35,9 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_PHY_MARVELL=y
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@ -32,6 +32,9 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@ -32,6 +32,9 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@ -30,6 +30,9 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_ZYNQ_SDHCI_MAX_FREQ=52000000
 CONFIG_ZYNQMP_USB=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
 CONFIG_DEBUG_UART=y
@ -61,6 +62,7 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
 CONFIG_NAND=y
 CONFIG_NAND_ARASAN=y
 CONFIG_SPI_FLASH=y
--- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
@ -53,7 +53,11 @@ CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_MISC=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@ -53,7 +53,11 @@ CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_MISC=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@ -53,7 +53,11 @@ CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_MISC=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@ -41,6 +41,8 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@ -41,6 +41,8 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@ -40,6 +40,10 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@ -183,6 +183,11 @@ config SANDBOX_GPIO_COUNT
 	  of 'anonymous' GPIOs that do not belong to any device or bank.
 	  Select a suitable value depending on your needs.

+config XILINX_GPIO
+	bool "Xilinx GPIO driver"
+	help
+	  This config enable the Xilinx GPIO driver for Microblaze.
+
 config CMD_TCA642X
 	bool "tca642x - Command to access tca642x state"
 	help
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@ -268,6 +268,38 @@ config SYS_I2C_BUS_MAX
 	help
 	  Define the maximum number of available I2C buses.

+config SYS_I2C_ZYNQ
+	bool "Xilinx I2C driver"
+	depends on ARCH_ZYNQMP || ARCH_ZYNQ
+	help
+	  Support for Xilinx I2C controller.
+
+config SYS_I2C_ZYNQ_SLAVE
+	hex "Set slave addr"
+	depends on SYS_I2C_ZYNQ
+	default 0
+	help
+	  Set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr.
+
+config SYS_I2C_ZYNQ_SPEED
+	int "Set I2C speed"
+	depends on SYS_I2C_ZYNQ
+	default 100000
+	help
+	  Set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting.
+
+config ZYNQ_I2C0
+	bool "Xilinx I2C0 controller"
+	depends on SYS_I2C_ZYNQ
+	help
+	  Enable Xilinx I2C0 controller.
+
+config ZYNQ_I2C1
+	bool "Xilinx I2C1 controller"
+	depends on SYS_I2C_ZYNQ
+	help
+	  Enable Xilinx I2C1 controller.
+
 config SYS_I2C_IHS
        bool "gdsys IHS I2C driver"
        depends on DM_I2C
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@ -214,6 +214,12 @@ config SPL_I2C_EEPROM
 	  This option is an SPL-variant of the I2C_EEPROM option.
 	  See the help of I2C_EEPROM for details.

+config ZYNQ_GEM_I2C_MAC_OFFSET
+	hex "Set the I2C MAC offset"
+	default 0x0
+	help
+	  Set the MAC offset for i2C.
+
 if I2C_EEPROM

 config SYS_I2C_EEPROM_ADDR
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@ -481,6 +481,19 @@ config MMC_SDHCI_ZYNQ
 	help
 	  Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform

+config ZYNQ_SDHCI_MAX_FREQ
+	int "Set the maximum frequency of the controller"
+	depends on MMC_SDHCI_ZYNQ
+	help
+	  Set the maximum frequency of the controller.
+
+config ZYNQ_SDHCI_MIN_FREQ
+	int "Set the minimum frequency of the controller"
+	depends on MMC_SDHCI_ZYNQ
+	default 0
+	help
+	  Set the minimum frequency of the controller.
+
 config MMC_SUNXI
 	bool "Allwinner sunxi SD/MMC Host Controller support"
 	depends on ARCH_SUNXI && !UART0_PORT_F
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@ -16,10 +16,6 @@

 DECLARE_GLOBAL_DATA_PTR;

-#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
-# define CONFIG_ZYNQ_SDHCI_MIN_FREQ	0
-#endif
-
 struct arasan_sdhci_plat {
 	struct mmc_config cfg;
 	struct mmc mmc;
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@ -41,7 +41,6 @@

 /* gpio */
 #ifdef XILINX_GPIO_BASEADDR
-# define CONFIG_XILINX_GPIO
 # define CONFIG_SYS_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
 #endif

--- a/include/configs/syzygy_hub.h
+++ b/include/configs/syzygy_hub.h
@ -11,10 +11,8 @@
 #ifndef __CONFIG_SYZYGY_HUB_H
 #define __CONFIG_SYZYGY_HUB_H

-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR    0x57
-#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA

 #define CONFIG_EXTRA_ENV_SETTINGS       \
 	"fit_image=fit.itb\0"		\
--- a/include/configs/topic_miami.h
+++ b/include/configs/topic_miami.h
@ -10,8 +10,6 @@
 #ifndef __CONFIG_TOPIC_MIAMI_H
 #define __CONFIG_TOPIC_MIAMI_H

-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1

 /* Speed up boot time by ignoring the environment which we never used */

--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@ -56,9 +56,6 @@

 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
 # define CONFIG_SUPPORT_EMMC_BOOT
-# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
-#  define CONFIG_ZYNQ_SDHCI_MAX_FREQ	200000000
-# endif
 #endif

 #ifdef CONFIG_NAND_ARASAN
@ -126,8 +123,6 @@
 /* I2C */
 #if defined(CONFIG_SYS_I2C_ZYNQ)
 # define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
 #endif

 /* EEPROM */
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@ -13,8 +13,6 @@
 #ifndef __CONFIG_ZYNQMP_EP_H
 #define __CONFIG_ZYNQMP_EP_H

-#define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
-#define CONFIG_ZYNQ_SDHCI_MIN_FREQ	(CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
 #define CONFIG_ZYNQ_EEPROM
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
 				 ZYNQMP_USB1_XHCI_BASEADDR}
--- a/include/configs/xilinx_zynqmp_zcu102.h
+++ b/include/configs/xilinx_zynqmp_zcu102.h
@ -11,8 +11,6 @@
 #define __CONFIG_ZYNQMP_ZCU102_H

 #define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_MAX_HOPS		1
 #define CONFIG_SYS_NUM_I2C_BUSES	18
 #define CONFIG_SYS_I2C_BUSES	{ \
@ -36,7 +34,6 @@
 				{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
 				}

-#define CONFIG_SYS_I2C_ZYNQ
 #define CONFIG_PCA953X

 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
@ -44,7 +41,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
 #define CONFIG_ZYNQ_EEPROM_BUS		5
 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR	0x54
-#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET	0x20

 #include <configs/xilinx_zynqmp.h>

--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@ -73,11 +73,6 @@
 #define CONFIG_MTD_DEVICE
 #endif

-/* MMC */
-#if defined(CONFIG_MMC_SDHCI_ZYNQ)
-# define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
-#endif
-
 #ifdef CONFIG_USB_EHCI_ZYNQ
 # define CONFIG_EHCI_IS_TDI

@ -117,15 +112,9 @@
 # define DFU_ALT_INFO
 #endif

-#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
-#define CONFIG_SYS_I2C_ZYNQ
-#endif
-
 /* I2C */
 #if defined(CONFIG_SYS_I2C_ZYNQ)
 # define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
 #endif

 /* EEPROM */
--- a/include/configs/zynq_zc70x.h
+++ b/include/configs/zynq_zc70x.h
@ -10,7 +10,6 @@
 #ifndef __CONFIG_ZYNQ_ZC70X_H
 #define __CONFIG_ZYNQ_ZC70X_H

-#define CONFIG_ZYNQ_I2C0
 #define CONFIG_ZYNQ_EEPROM

 #include <configs/zynq-common.h>
--- a/include/configs/zynq_zybo.h
+++ b/include/configs/zynq_zybo.h
@ -11,11 +11,8 @@
 #ifndef __CONFIG_ZYNQ_ZYBO_H
 #define __CONFIG_ZYNQ_ZYBO_H

-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR	0x50
-#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET	0xFA
 #define CONFIG_DISPLAY
 #define CONFIG_I2C_EDID