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@ -382,3 +382,81 @@ void qedma3_stop(u32 base, struct edma3_channel_config *cfg) |
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/* Clear the channel map */ |
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__raw_writel(0, base + EDMA3_QCHMAP(cfg->chnum)); |
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} |
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void edma3_transfer(unsigned long edma3_base_addr, unsigned int |
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edma_slot_num, void *dst, void *src, size_t len) |
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{ |
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struct edma3_slot_config slot; |
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struct edma3_channel_config edma_channel; |
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int b_cnt_value = 1; |
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int rem_bytes = 0; |
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int a_cnt_value = len; |
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unsigned int addr = (unsigned int) (dst); |
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unsigned int max_acnt = 0x7FFFU; |
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if (len > max_acnt) { |
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b_cnt_value = (len / max_acnt); |
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rem_bytes = (len % max_acnt); |
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a_cnt_value = max_acnt; |
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} |
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slot.opt = 0; |
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slot.src = ((unsigned int) src); |
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slot.acnt = a_cnt_value; |
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slot.bcnt = b_cnt_value; |
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slot.ccnt = 1; |
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slot.src_bidx = a_cnt_value; |
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slot.dst_bidx = a_cnt_value; |
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slot.src_cidx = 0; |
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slot.dst_cidx = 0; |
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slot.link = EDMA3_PARSET_NULL_LINK; |
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slot.bcntrld = 0; |
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slot.opt = EDMA3_SLOPT_TRANS_COMP_INT_ENB | |
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EDMA3_SLOPT_COMP_CODE(0) | |
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EDMA3_SLOPT_STATIC | EDMA3_SLOPT_AB_SYNC; |
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edma3_slot_configure(edma3_base_addr, edma_slot_num, &slot); |
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edma_channel.slot = edma_slot_num; |
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edma_channel.chnum = 0; |
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edma_channel.complete_code = 0; |
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/* set event trigger to dst update */ |
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edma_channel.trigger_slot_word = EDMA3_TWORD(dst); |
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qedma3_start(edma3_base_addr, &edma_channel); |
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edma3_set_dest_addr(edma3_base_addr, edma_channel.slot, addr); |
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while (edma3_check_for_transfer(edma3_base_addr, &edma_channel)) |
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; |
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qedma3_stop(edma3_base_addr, &edma_channel); |
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if (rem_bytes != 0) { |
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slot.opt = 0; |
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slot.src = |
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(b_cnt_value * max_acnt) + ((unsigned int) src); |
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slot.acnt = rem_bytes; |
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slot.bcnt = 1; |
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slot.ccnt = 1; |
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slot.src_bidx = rem_bytes; |
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slot.dst_bidx = rem_bytes; |
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slot.src_cidx = 0; |
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slot.dst_cidx = 0; |
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slot.link = EDMA3_PARSET_NULL_LINK; |
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slot.bcntrld = 0; |
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slot.opt = EDMA3_SLOPT_TRANS_COMP_INT_ENB | |
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EDMA3_SLOPT_COMP_CODE(0) | |
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EDMA3_SLOPT_STATIC | EDMA3_SLOPT_AB_SYNC; |
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edma3_slot_configure(edma3_base_addr, edma_slot_num, &slot); |
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edma_channel.slot = edma_slot_num; |
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edma_channel.chnum = 0; |
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edma_channel.complete_code = 0; |
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/* set event trigger to dst update */ |
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edma_channel.trigger_slot_word = EDMA3_TWORD(dst); |
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qedma3_start(edma3_base_addr, &edma_channel); |
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edma3_set_dest_addr(edma3_base_addr, edma_channel.slot, addr + |
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(max_acnt * b_cnt_value)); |
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while (edma3_check_for_transfer(edma3_base_addr, &edma_channel)) |
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; |
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qedma3_stop(edma3_base_addr, &edma_channel); |
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} |
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} |
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