ppc: Move lbc_clk and cpu to arch_global_data

Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>

arch/powerpc/cpu/mpc85xx/cpu.c

@@ -104,7 +104,7 @@ int checkcpu (void)
 		puts("CPU:   ");
 	}
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 	puts(cpu->name);
 	if (IS_E_PROCESSOR(svr))

arch/powerpc/cpu/mpc85xx/fdt.c

@@ -637,9 +637,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 		"bus-frequency", bd->bi_busfreq, 1);
 
 	do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
-		"bus-frequency", gd->lbc_clk, 1);
+		"bus-frequency", gd->arch.lbc_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,elbc",
-		"bus-frequency", gd->lbc_clk, 1);
+		"bus-frequency", gd->arch.lbc_clk, 1);
 #ifdef CONFIG_QE
 	ft_qe_setup(blob);
 	ft_fixup_qe_snum(blob);

arch/powerpc/cpu/mpc85xx/speed.c

@@ -391,7 +391,7 @@ int get_clocks (void)
 	gd->cpu_clk = sys_info.freqProcessor[0];
 	gd->bus_clk = sys_info.freqSystemBus;
 	gd->mem_clk = sys_info.freqDDRBus;
-	gd->lbc_clk = sys_info.freqLocalBus;
+	gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 #ifdef CONFIG_QE
 	gd->qe_clk = sys_info.freqQE;

arch/powerpc/cpu/mpc86xx/cpu.c

@@ -67,7 +67,7 @@ checkcpu(void)
 	}
 	puts("CPU:   ");
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 	puts(cpu->name);
 

arch/powerpc/cpu/mpc86xx/fdt.c

@@ -34,10 +34,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 #if defined(CONFIG_MPC8641)
 	do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
-			       "bus-frequency", gd->lbc_clk, 1);
+			       "bus-frequency", gd->arch.lbc_clk, 1);
 #endif
 	do_fixup_by_compat_u32(blob, "fsl,elbc",
-			       "bus-frequency", gd->lbc_clk, 1);
+			       "bus-frequency", gd->arch.lbc_clk, 1);
 
 	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 

arch/powerpc/cpu/mpc86xx/speed.c

@@ -120,7 +120,7 @@ int get_clocks(void)
 	get_sys_info(&sys_info);
 	gd->cpu_clk = sys_info.freqProcessor;
 	gd->bus_clk = sys_info.freqSystemBus;
-	gd->lbc_clk = sys_info.freqLocalBus;
+	gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 	/*
 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,

arch/powerpc/cpu/mpc8xxx/cpu.c

@@ -148,7 +148,7 @@ struct cpu_type *identify_cpu(u32 ver)
 u32 cpu_mask(void)
 {
 	ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 
 	/* better to query feature reporting register than just assume 1 */
 	if (cpu == &cpu_type_unknown)
@@ -166,7 +166,7 @@ u32 cpu_mask(void)
  */
 int cpu_numcores(void)
 {
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 
 	/*
 	 * Report # of cores in terms of the cpu_mask if we haven't
@@ -196,7 +196,7 @@ int probecpu (void)
 	svr = get_svr();
 	ver = SVR_SOC_VER(svr);
 
-	gd->cpu = identify_cpu(ver);
+	gd->arch.cpu = identify_cpu(ver);
 
 	return 0;
 }
@@ -204,7 +204,7 @@ int probecpu (void)
 /* Once in memory, compute mask & # cores once and save them off */
 int fixup_cpu(void)
 {
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 
 	if (cpu->num_cores == 0) {
 		cpu->mask = cpu_mask();

arch/powerpc/include/asm/global_data.h

@@ -76,6 +76,10 @@ struct arch_global_data {
 	u32 mem_sec_clk;
 # endif /* CONFIG_MPC8360 */
 #endif
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+	u32 lbc_clk;
+	void *cpu;
+#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
 };
 
 /*
@@ -98,10 +102,6 @@ typedef	struct	global_data {
 #if defined(CONFIG_FSL_ESDHC)
 	u32 sdhc_clk;
 #endif
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
-	u32 lbc_clk;
-	void *cpu;
-#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 	u32 i2c1_clk;
 	u32 i2c2_clk;

arch/powerpc/lib/board.c

@@ -649,10 +649,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
 
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 	/*
-	 * The gd->cpu pointer is set to an address in flash before relocation.
-	 * We need to update it to point to the same CPU entry in RAM.
+	 * The gd->arch.cpu pointer is set to an address in flash before
+	 * relocation.  We need to update it to point to the same CPU entry
+	 * in RAM.
 	 */
-	gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+	gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
 
 	/*
 	 * If we didn't know the cpu mask & # cores, we can save them of

board/freescale/b4860qds/b4860qds.c

@@ -50,7 +50,7 @@ int checkboard(void)
 {
 	char buf[64];
 	u8 sw;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 	unsigned int i;
 	static const char *const freq[] = {"100", "125", "156.25", "161.13",

board/freescale/bsc9131rdb/bsc9131rdb.c

@@ -59,7 +59,7 @@ int checkboard(void)
 {
 	struct cpu_type *cpu;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf("Board: %sRDB\n", cpu->name);
 
 	return 0;

board/freescale/bsc9132qds/bsc9132qds.c

@@ -184,7 +184,7 @@ int checkboard(void)
 	struct cpu_type *cpu;
 	u8 sw;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf("Board: %sQDS\n", cpu->name);
 
 	printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x,\n",

board/freescale/corenet_ds/corenet_ds.c

@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int checkboard (void)
 {
 	u8 sw;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 	unsigned int i;
 	static const char * const freq[] = {"100", "125", "156.25", "212.5" };

board/freescale/p1010rdb/ddr.c

@@ -99,7 +99,7 @@ unsigned long get_sdram_size(void)
 	struct cpu_type *cpu;
 	phys_size_t ddr_size;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1014 and it's derivatives support max 16it DDR width */
 	if (cpu->soc_ver == SVR_P1014)
 		ddr_size = (CONFIG_SYS_DRAM_SIZE / 2);
@@ -144,7 +144,7 @@ phys_size_t fixed_sdram(void)
 		panic("Unsupported DDR data rate %s MT/s data rate\n",
 					strmhz(buf, ddr_freq));
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1014 and it's derivatives support max 16bit DDR width */
 	if (cpu->soc_ver == SVR_P1014) {
 		ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;
@@ -237,7 +237,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 	popts->trwt_override = 1;
 	popts->trwt = 0;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1014 and it's derivatives support max 16it DDR width */
 	if (cpu->soc_ver == SVR_P1014)
 		popts->data_bus_width = DDR_DATA_BUS_WIDTH_16;

board/freescale/p1010rdb/p1010rdb.c

@@ -164,7 +164,7 @@ int checkboard(void)
 {
 	struct cpu_type *cpu;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf("Board: %sRDB\n", cpu->name);
 
 	return 0;
@@ -178,7 +178,7 @@ int board_eth_init(bd_t *bis)
 	struct cpu_type *cpu;
 	int num = 0;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 #ifdef CONFIG_TSEC1
 	SET_STD_TSEC_INFO(tsec_info[num], 1);
@@ -283,7 +283,7 @@ void ft_board_setup(void *blob, bd_t *bd)
 	phys_size_t size;
 	struct cpu_type *cpu;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 	ft_cpu_setup(blob, bd);
 

board/freescale/p1_p2_rdb/ddr.c

@@ -202,7 +202,7 @@ phys_size_t fixed_sdram (void)
 	struct cpu_type *cpu;
 	ulong ddr_freq, ddr_freq_mhz;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1020 and it's derivatives support max 32bit DDR width */
 	if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) {
 		ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);

board/freescale/p1_p2_rdb/p1_p2_rdb.c

@@ -108,7 +108,7 @@ int checkboard (void)
 	else
 		panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
 
 	setbits_be32(&pgpio->gpdir, GPIO_DIR);

board/freescale/p2041rdb/p2041rdb.c

@@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int checkboard(void)
 {
 	u8 sw;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 	unsigned int i;
 

board/freescale/t4qds/t4qds.c

@@ -58,7 +58,7 @@ int checkboard(void)
 {
 	char buf[64];
 	u8 sw;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 	unsigned int i;