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x86: kconfig: Imply ENABLE_MRC_CACHE in the platform Kconfig

Browse Source 
Platform knows whether MRC cache is implemented, but using it can
be a choice of a specific board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
master
Bin Meng 8 years ago
parent 5d89b37f71
commit 67f99f970f
17 changed files with 5 additions and 12 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 1
      arch/x86/cpu/baytrail/Kconfig
  2. 1
      arch/x86/cpu/broadwell/Kconfig
  3. 1
      arch/x86/cpu/ivybridge/Kconfig
  4. 1
      arch/x86/cpu/quark/Kconfig
  5. 1
      configs/bayleybay_defconfig
  6. 1
      configs/chromebook_link64_defconfig
  7. 1
      configs/chromebook_link_defconfig
  8. 1
      configs/chromebook_samus_defconfig
  9. 1
      configs/chromebox_panther_defconfig
  10. 1
      configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
  11. 1
      configs/conga-qeval20-qa3-e3845_defconfig
  12. 1
      configs/cougarcanyon2_defconfig
  13. 1
      configs/dfi-bt700-q7x-151_defconfig
  14. 1
      configs/galileo_defconfig
  15. 1
      configs/minnowmax_defconfig
  16. 1
      configs/som-db5800-som-6867_defconfig
  17. 1
      configs/theadorable-x86-dfi-bt700_defconfig

1
arch/x86/cpu/baytrail/Kconfig
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@ -10,6 +10,7 @@ config INTEL_BAYTRAIL
select ARCH_MISC_INIT if !EFI
imply ENV_IS_IN_SPI_FLASH
imply HAVE_INTEL_ME if !EFI
imply ENABLE_MRC_CACHE
if INTEL_BAYTRAIL
config INTERNAL_UART

1
arch/x86/cpu/broadwell/Kconfig
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@ -8,6 +8,7 @@ config INTEL_BROADWELL
select CACHE_MRC_BIN
select ARCH_EARLY_INIT_R
imply HAVE_INTEL_ME
imply ENABLE_MRC_CACHE
if INTEL_BROADWELL

1
arch/x86/cpu/ivybridge/Kconfig
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@ -9,6 +9,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
select CACHE_MRC_BIN if HAVE_MRC
imply HAVE_INTEL_ME
imply ENABLE_MRC_CACHE
if NORTHBRIDGE_INTEL_IVYBRIDGE

1
arch/x86/cpu/quark/Kconfig
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@ -9,6 +9,7 @@ config INTEL_QUARK
select HAVE_RMU
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT
imply ENABLE_MRC_CACHE
if INTEL_QUARK

1
configs/bayleybay_defconfig
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@ -3,7 +3,6 @@ CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="bayleybay"
CONFIG_TARGET_BAYLEYBAY=y
CONFIG_INTERNAL_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_VGA_BIOS_ADDR=0xfffa0000

1
configs/chromebook_link64_defconfig
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@ -11,7 +11,6 @@ CONFIG_VENDOR_GOOGLE=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
CONFIG_TARGET_CHROMEBOOK_LINK64=y
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/chromebook_link_defconfig
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@ -4,7 +4,6 @@ CONFIG_VENDOR_GOOGLE=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
CONFIG_TARGET_CHROMEBOOK_LINK=y
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/chromebook_samus_defconfig
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@ -4,7 +4,6 @@ CONFIG_VENDOR_GOOGLE=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
CONFIG_TARGET_CHROMEBOOK_SAMUS=y
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_HAVE_REFCODE=y
CONFIG_SMP=y

1
configs/chromebox_panther_defconfig
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@ -2,7 +2,6 @@ CONFIG_X86=y
CONFIG_VENDOR_GOOGLE=y
CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther"
CONFIG_TARGET_CHROMEBOX_PANTHER=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_FIT=y

1
configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
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@ -4,7 +4,6 @@ CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
CONFIG_INTERNAL_UART=y
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y

1
configs/conga-qeval20-qa3-e3845_defconfig
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@ -3,7 +3,6 @@ CONFIG_VENDOR_CONGATEC=y
CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y

1
configs/cougarcanyon2_defconfig
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@ -2,6 +2,7 @@ CONFIG_X86=y
CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
CONFIG_TARGET_COUGARCANYON2=y
# CONFIG_ENABLE_MRC_CACHE is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y

1
configs/dfi-bt700-q7x-151_defconfig
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@ -3,7 +3,6 @@ CONFIG_VENDOR_DFI=y
CONFIG_DEFAULT_DEVICE_TREE="dfi-bt700-q7x-151"
CONFIG_TARGET_DFI_BT700=y
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y

1
configs/galileo_defconfig
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@ -2,7 +2,6 @@ CONFIG_X86=y
CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="galileo"
CONFIG_TARGET_GALILEO=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_ACPI_TABLE=y

1
configs/minnowmax_defconfig
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@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="minnowmax"
CONFIG_TARGET_MINNOWMAX=y
CONFIG_INTERNAL_UART=y
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y

1
configs/som-db5800-som-6867_defconfig
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@ -3,7 +3,6 @@ CONFIG_VENDOR_ADVANTECH=y
CONFIG_TARGET_SOM_DB5800_SOM_6867=y
CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867"
CONFIG_DEBUG_UART=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y

1
configs/theadorable-x86-dfi-bt700_defconfig
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@ -2,7 +2,6 @@ CONFIG_X86=y
CONFIG_VENDOR_DFI=y
CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700"
CONFIG_TARGET_DFI_BT700=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_VGA_BIOS_ADDR=0xfffa0000

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