ppc4xx: Improve DLVision-10G PLL setup

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
master
Dirk Eibach 14 years ago committed by Stefan Roese
parent d3da722552
commit 6853cc4b94
  1. 55
      board/gdsys/common/osd.c

@ -30,7 +30,12 @@
#define CH7301_I2C_ADDR 0x75
#define ICS8N3QV01_I2C_ADDR 0x6E
#define ICS8N3QV01_FREF 114285
#define ICS8N3QV01_FREF 114285000
#define ICS8N3QV01_FREF_LL 114285000LL
#define ICS8N3QV01_F_DEFAULT_0 156250000LL
#define ICS8N3QV01_F_DEFAULT_1 125000000LL
#define ICS8N3QV01_F_DEFAULT_2 100000000LL
#define ICS8N3QV01_F_DEFAULT_3 25175000LL
#define SIL1178_MASTER_I2C_ADDRESS 0x38
#define SIL1178_SLAVE_I2C_ADDRESS 0x39
@ -150,6 +155,41 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout)
#endif
#ifdef CONFIG_SYS_ICS8N3QV01
static unsigned int ics8n3qv01_get_fout_calc(unsigned screen, unsigned index)
{
unsigned long long n;
unsigned long long mint;
unsigned long long mfrac;
u8 reg_a, reg_b, reg_c, reg_d, reg_f;
unsigned long long fout_calc;
if (index > 3)
return 0;
reg_a = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0 + index);
reg_b = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 4 + index);
reg_c = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 8 + index);
reg_d = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 12 + index);
reg_f = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 20 + index);
mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20);
mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1)
| (reg_d >> 7);
n = reg_d & 0x7f;
fout_calc = (mint * ICS8N3QV01_FREF_LL
+ mfrac * ICS8N3QV01_FREF_LL / 262144LL
+ ICS8N3QV01_FREF_LL / 524288LL
+ n / 2)
/ n
* 1000000
/ (1000000 - 100);
return fout_calc;
}
static void ics8n3qv01_calc_parameters(unsigned int fout,
unsigned int *_mint, unsigned int *_mfrac,
unsigned int *_n)
@ -160,7 +200,7 @@ static void ics8n3qv01_calc_parameters(unsigned int fout,
unsigned int mint;
unsigned long long mfrac;
n = 2550000000U / fout;
n = (2215000000U + fout / 2) / fout;
if ((n & 1) && (n > 5))
n -= 1;
@ -184,9 +224,18 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout)
unsigned int n;
unsigned int mint;
unsigned int mfrac;
unsigned int fout_calc;
unsigned long long fout_prog;
long long off_ppm;
u8 reg0, reg4, reg8, reg12, reg18, reg20;
ics8n3qv01_calc_parameters(fout, &mint, &mfrac, &n);
fout_calc = ics8n3qv01_get_fout_calc(screen, 1);
off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000
/ ICS8N3QV01_F_DEFAULT_1;
printf(" PLL is off by %lld ppm\n", off_ppm);
fout_prog = (unsigned long long)fout * (unsigned long long)fout_calc
/ ICS8N3QV01_F_DEFAULT_1;
ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n);
reg0 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0) & 0xc0;
reg0 |= (mint & 0x1f) << 1;

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