This is an i.MX25 base board with only NAND so it uses nand_spl to boot. Signed-off-by: John Rigby <jcrigby@gmail.com> Tune configuration, add support for (redundant) environment in NAND. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>master
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#
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# (C) Copyright 2009 DENX Software Engineering
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# Author: John Rigby <jcrigby@gmail.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := tx25.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,5 @@ |
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ifdef CONFIG_NAND_SPL |
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TEXT_BASE = 0x81ec0000
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else |
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TEXT_BASE = 0x81f00000
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endif |
@ -0,0 +1,131 @@ |
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/* |
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* (C) Copyright 2009 DENX Software Engineering |
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* Author: John Rigby <jrigby@gmail.com>
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* |
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* Based on U-Boot and RedBoot sources for several different i.mx |
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* platforms. |
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* |
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of
|
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <asm/macro.h> |
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.macro init_aips
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write32 0x43f00000, 0x77777777 |
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write32 0x43f00004, 0x77777777 |
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write32 0x43f00000, 0x77777777 |
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write32 0x53f00004, 0x77777777 |
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.endm |
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.macro init_max
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write32 0x43f04000, 0x43210 |
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write32 0x43f04100, 0x43210 |
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write32 0x43f04200, 0x43210 |
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write32 0x43f04300, 0x43210 |
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write32 0x43f04400, 0x43210 |
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write32 0x43f04010, 0x10 |
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write32 0x43f04110, 0x10 |
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write32 0x43f04210, 0x10 |
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write32 0x43f04310, 0x10 |
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write32 0x43f04410, 0x10 |
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write32 0x43f04800, 0x0 |
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write32 0x43f04900, 0x0 |
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write32 0x43f04a00, 0x0 |
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write32 0x43f04b00, 0x0 |
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write32 0x43f04c00, 0x0 |
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.endm |
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.macro init_m3if
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write32 0xb8003000, 0x1 |
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.endm |
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.macro init_clocks
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/* |
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* clocks |
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* |
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* first enable CLKO debug output |
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* 0x40000000 enables the debug CLKO signal |
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* 0x05000000 sets CLKO divider to 6 |
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* 0x00600000 makes CLKO parent clk the USB clk |
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*/ |
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write32 0x53f80064, 0x45600000 |
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write32 0x53f80008, 0x20034000 |
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/* |
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* enable all implemented clocks in all three |
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* clock control registers |
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*/ |
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write32 0x53f8000c, 0x1fffffff |
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write32 0x53f80010, 0xffffffff |
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write32 0x53f80014, 0xfdfff |
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.endm |
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.macro init_ddrtype
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/* |
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* ddr_type is 3.3v SDRAM |
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*/ |
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write32 0x43fac454, 0x800 |
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.endm |
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/* |
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* sdram controller init |
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*/ |
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.macro init_sdram_bank bankaddr, ctl, cfg |
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ldr r0, =0xb8001000 |
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ldr r2, =\bankaddr |
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/* |
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* reset SDRAM controller |
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* then wait for initialization to complete |
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*/ |
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ldr r1, =(1 << 1) |
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str r1, [r0, #0x10] |
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1: ldr r3, [r0, #0x10] |
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tst r3, #(1 << 31) |
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beq 1b |
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ldr r1, =0x95728 |
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str r1, [r0, #\cfg] /* config */ |
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ldr r1, =0x92116480 /* control | precharge */ |
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str r1, [r0, #\ctl] /* write command to controller */ |
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str r1, [r2, #0x400] /* command encoded in address */ |
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ldr r1, =0xa2116480 /* auto refresh */ |
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str r1, [r0, #\ctl] |
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ldrb r3, [r2] /* read dram twice to auto refresh */ |
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ldrb r3, [r2] |
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ldr r1, =0xb2116480 /* control | load mode */ |
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str r1, [r0, #\ctl] /* write command to controller */ |
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strb r1, [r2, #0x33] /* command encoded in address */ |
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ldr r1, =0x82116480 /* control | normal (0)*/ |
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str r1, [r0, #\ctl] /* write command to controller */ |
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.endm |
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.globl lowlevel_init
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lowlevel_init: |
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init_aips |
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init_max |
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init_m3if |
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init_clocks |
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init_sdram_bank 0x80000000, 0x0, 0x4 |
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init_sdram_bank 0x90000000, 0x8, 0xc |
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mov pc, lr |
@ -0,0 +1,176 @@ |
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/*
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* (C) Copyright 2009 DENX Software Engineering |
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* Author: John Rigby <jrigby@gmail.com> |
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* |
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* Based on imx27lite.c: |
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* Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net> |
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com> |
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* And: |
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* RedBoot tx25_misc.c Copyright (C) 2009 Red Hat |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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* |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/imx25-pinmux.h> |
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static void mdelay(int n) |
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{ |
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while (n-- > 0) |
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udelay(1000); |
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} |
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DECLARE_GLOBAL_DATA_PTR; |
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#ifdef CONFIG_FEC_MXC |
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void tx25_fec_init(void) |
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{ |
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struct iomuxc_mux_ctl *muxctl; |
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struct iomuxc_pad_ctl *padctl; |
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u32 val; |
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u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5); |
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struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE; |
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struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE; |
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u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode; |
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debug("tx25_fec_init\n"); |
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/*
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* fec pin init is generic |
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*/ |
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mx25_fec_init_pins(); |
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/*
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* Set up the FEC_RESET_B and FEC_ENABLE GPIO pins. |
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* |
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* FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13 |
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* FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11 |
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*/ |
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muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; |
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padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; |
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writel(gpio_mux_mode, &muxctl->pad_d13); |
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writel(gpio_mux_mode, &muxctl->pad_d11); |
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writel(0x0, &padctl->pad_d13); |
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writel(0x0, &padctl->pad_d11); |
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/* drop PHY power and assert reset (low) */ |
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val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9)); |
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writel(val, &gpio4->dr); |
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val = readl(&gpio4->dir) | (1 << 7) | (1 << 9); |
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writel(val, &gpio4->dir); |
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mdelay(5); |
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debug("resetting phy\n"); |
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/* turn on PHY power leaving reset asserted */ |
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val = readl(&gpio4->dr) | 1 << 9; |
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writel(val, &gpio4->dr); |
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mdelay(10); |
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/*
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* Setup some strapping pins that are latched by the PHY |
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* as reset goes high. |
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* |
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* Set PHY mode to 111 |
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* mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5 |
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* mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5 |
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* mode2 is tied high so nothing to do |
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* |
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* Turn on RMII mode |
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* RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode |
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*/ |
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/*
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* save three current mux modes and set each to gpio mode |
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*/ |
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saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0); |
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saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1); |
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saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv); |
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writel(gpio_mux_mode, &muxctl->pad_fec_rdata0); |
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writel(gpio_mux_mode, &muxctl->pad_fec_rdata1); |
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writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv); |
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/*
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* set each to 1 and make each an output |
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*/ |
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val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12); |
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writel(val, &gpio3->dr); |
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val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12); |
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writel(val, &gpio3->dir); |
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mdelay(22); /* this value came from RedBoot */ |
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/*
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* deassert PHY reset |
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*/ |
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val = readl(&gpio4->dr) | 1 << 7; |
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writel(val, &gpio4->dr); |
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writel(val, &gpio4->dr); |
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mdelay(5); |
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/*
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* set FEC pins back |
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*/ |
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writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0); |
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writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1); |
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writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv); |
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} |
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#else |
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#define tx25_fec_init() |
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#endif |
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int board_init() |
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{ |
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#ifdef CONFIG_MXC_UART |
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extern void mx25_uart_init_pins(void); |
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mx25_uart_init_pins(); |
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#endif |
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return 0; |
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} |
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int board_late_init(void) |
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{ |
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tx25_fec_init(); |
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return 0; |
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} |
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int dram_init (void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
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gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1, |
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PHYS_SDRAM_1_SIZE); |
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#if CONFIG_NR_DRAM_BANKS > 1 |
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
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gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2, |
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PHYS_SDRAM_2_SIZE); |
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#endif |
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return 0; |
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} |
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int checkboard(void) |
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{ |
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printf("KARO TX25\n"); |
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return 0; |
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} |
@ -0,0 +1,179 @@ |
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/*
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* (C) Copyright 2009 DENX Software Engineering |
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* Author: John Rigby <jrigby@gmail.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* KARO TX25 board - SoC Configuration |
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*/ |
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#define CONFIG_ARM926EJS /* arm926ejs CPU core */ |
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#define CONFIG_MX25 |
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#define CONFIG_TX25 |
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#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */ |
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#define CONFIG_SYS_HZ 1000 |
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */ |
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/* NAND BOOT is the only boot method */ |
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#define CONFIG_NAND_U_BOOT |
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#ifdef CONFIG_NAND_SPL |
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/* Start copying real U-boot from the second page */ |
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 |
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000 |
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/* Load U-Boot to this address */ |
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#define CONFIG_SYS_NAND_U_BOOT_DST 0x81f00000 |
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST |
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
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#define CONFIG_SYS_NAND_SPARE_SIZE 64 |
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
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#define CONFIG_SYS_NAND_PAGE_COUNT 64 |
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#define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024) |
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
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#else |
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#define CONFIG_SKIP_LOWLEVEL_INIT |
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#define CONFIG_SKIP_RELOCATE_UBOOT |
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#endif |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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/*
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* Memory Info |
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*/ |
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/* malloc() len */ |
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#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ |
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/* reserved for initial data */ |
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#define CONFIG_SYS_GBL_DATA_SIZE 128 |
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/*
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* Board has 2 32MB banks of DRAM but there is a bug when using |
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* both so only the first is configured |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM_1 0x80000000 |
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#define PHYS_SDRAM_1_SIZE 0x02000000 |
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#if (CONFIG_NR_DRAM_BANKS == 2) |
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#define PHYS_SDRAM_2 0x90000000 |
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#define PHYS_SDRAM_2_SIZE 0x02000000 |
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#endif |
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/* 8MB DRAM test */ |
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 |
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000) |
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#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */ |
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/*
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* Serial Info |
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*/ |
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#define CONFIG_MXC_UART 1 |
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#define CONFIG_SYS_MX25_UART1 1 |
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#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
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/*
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* Flash & Environment |
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*/ |
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/* No NOR flash present */ |
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#define CONFIG_SYS_NO_FLASH 1 |
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#define CONFIG_ENV_IS_IN_NAND |
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#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN |
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#define CONFIG_ENV_SIZE (128 * 1024) /* 128 kB NAND block size */ |
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) |
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/* NAND */ |
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#define CONFIG_NAND_MXC |
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#define CONFIG_NAND_MXC_V1_1 |
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#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000) |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
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#define CONFIG_SYS_NAND_BASE (0xBB000000) |
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#define CONFIG_JFFS2_NAND |
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#define CONFIG_MXC_NAND_HWECC |
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#define CONFIG_SYS_NAND_LARGEPAGE |
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#define CONFIG_SYS_64BIT_VSPRINTF |
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/* U-Boot general configuration */ |
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
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/* Print buffer sz */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
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sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
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/* Boot Argument Buffer Size */ |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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#define CONFIG_CMDLINE_EDITING |
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#define CONFIG_SYS_LONGHELP |
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/* U-Boot commands */ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_NAND |
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/*
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* Ethernet |
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*/ |
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#define CONFIG_FEC_MXC |
||||
#define CONFIG_FEC_MXC_PHYADDR 0x1f |
||||
#define CONFIG_MII |
||||
#define CONFIG_CMD_NET |
||||
#define CONFIG_NET_MULTI |
||||
#define BOARD_LATE_INIT |
||||
#define CONFIG_ENV_OVERWRITE |
||||
|
||||
#define CONFIG_BOOTDELAY 5 |
||||
|
||||
#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */ |
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
||||
|
||||
#define xstr(s) str(s) |
||||
#define str(s) #s |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"netdev=eth0\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=${serverip}:${rootpath}\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"addip=setenv bootargs ${bootargs} " \
|
||||
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
|
||||
":${hostname}:${netdev}:off panic=1\0" \
|
||||
"addtty=setenv bootargs ${bootargs}" \
|
||||
" console=ttymxc0,${baudrate}\0" \
|
||||
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||
"addmisc=setenv bootargs ${bootargs}\0" \
|
||||
"u-boot=tx25/u-boot.bin\0" \
|
||||
"kernel_addr_r=" xstr(CONFIG_LOADADDR) "\0" \
|
||||
"hostname=tx25\0" \
|
||||
"bootfile=tx25/uImage\0" \
|
||||
"rootpath=/opt/eldk/arm\0" \
|
||||
"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
|
||||
"run nfsargs addip addtty addmtd addmisc;" \
|
||||
"bootm\0" \
|
||||
"bootcmd=run net_nfs\0" \
|
||||
"load=tftp ${loadaddr} ${u-boot}\0" \
|
||||
"update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
|
||||
"upd=run load update\0" \
|
||||
|
||||
#endif /* __CONFIG_H */ |
@ -0,0 +1,78 @@ |
||||
#
|
||||
# (C) Copyright 2009 DENX Software Engineering
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundatio; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
CONFIG_NAND_SPL = y
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk |
||||
|
||||
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
|
||||
LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
|
||||
AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
|
||||
CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
|
||||
|
||||
SOBJS = start.o lowlevel_init.o
|
||||
COBJS = nand_boot_fsl_nfc.o
|
||||
|
||||
SRCS := $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
|
||||
SRCS += $(SRCTREE)/cpu/arm926ejs/start.S
|
||||
SRCS += $(SRCTREE)/board/karo/tx25/lowlevel_init.S
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
__OBJS := $(SOBJS) $(COBJS)
|
||||
LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
|
||||
|
||||
nandobj := $(OBJTREE)/nand_spl/
|
||||
|
||||
ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
|
||||
|
||||
all: $(obj).depend $(ALL) |
||||
|
||||
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl |
||||
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl |
||||
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds |
||||
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
|
||||
-Map $(nandobj)u-boot-spl.map \
|
||||
-o $@
|
||||
|
||||
$(nandobj)u-boot.lds: $(LDSCRIPT) |
||||
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
|
||||
|
||||
#########################################################################
|
||||
|
||||
$(obj)%.o: $(SRCTREE)/cpu/arm926ejs/%.S |
||||
$(CC) $(AFLAGS) -c -o $@ $<
|
||||
|
||||
$(obj)%.o: $(SRCTREE)/board/karo/tx25/%.S |
||||
$(CC) $(AFLAGS) -c -o $@ $<
|
||||
|
||||
$(obj)%.o: $(SRCTREE)/nand_spl/%.c |
||||
$(CC) $(CFLAGS) -c -o $@ $<
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1 @@ |
||||
PAD_TO := 2048
|
@ -0,0 +1,58 @@ |
||||
/* |
||||
* (C) Copyright 2009 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
||||
OUTPUT_ARCH(arm) |
||||
ENTRY(_start) |
||||
SECTIONS |
||||
{ |
||||
. = 0x00000000; |
||||
|
||||
. = ALIGN(4); |
||||
.text : |
||||
{ |
||||
start.o (.text) |
||||
lowlevel_init.o (.text) |
||||
nand_boot_fsl_nfc.o (.text) |
||||
*(.text) |
||||
. = 2K; |
||||
} |
||||
|
||||
. = ALIGN(4); |
||||
.rodata : { *(.rodata) } |
||||
|
||||
. = ALIGN(4); |
||||
.data : { *(.data) } |
||||
|
||||
. = ALIGN(4); |
||||
.got : { *(.got) } |
||||
|
||||
. = .; |
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
. = ALIGN(4); |
||||
__bss_start = .; |
||||
.bss : { *(.bss) } |
||||
_end = .; |
||||
} |
Loading…
Reference in new issue