@ -96,7 +96,7 @@ _armboot_real_end:
* /
.globl _uboot_reloc
_uboot_reloc :
.word CFG_DRAM_BASE + CFG_ D R A M _ S I Z E - C F G _ M O N I T O R _ L E N
.word TEXT_BASE
# ifdef C O N F I G _ U S E _ I R Q
/* IRQ stack memory (calculated at run-time) */
@ -130,7 +130,6 @@ relocate: /* relocate U-Boot to RAM */
ldr r2 , _ a r m b o o t _ s t a r t
ldr r3 , _ a r m b o o t _ e n d
sub r2 , r3 , r2 / * r2 < - s i z e o f a r m b o o t * /
/* ldr r1, _uboot_reloc / * r1 <- destination address */
ldr r1 , _ T E X T _ B A S E
add r2 , r0 , r2 / * r2 < - s o u r c e e n d a d d r e s s * /
@ -176,7 +175,7 @@ cpuspeed: .word CFG_CPUSPEED
/* RS: ??? */
.macro CPWAIT
mrc p15 ,0 ,r0 ,c2 ,c0 ,0
mrc p15 ,0 ,r0 ,c2 ,c0 ,0
mov r0 ,r0
sub p c ,p c ,#4
.endm
@ -207,23 +206,23 @@ cpu_init_crit:
ldr r0 , =0x2001 / * e n a b l e a c c e s s t o a l l c o p r o c . * /
mcr p15 , 0 , r0 , c15 , c1 , 0
CPWAIT
CPWAIT
mcr p15 , 0 , r0 , c7 , c10 , 4 / * d r a i n t h e w r i t e & f i l l b u f f e r s * /
CPWAIT
CPWAIT
mcr p15 , 0 , r0 , c7 , c7 , 0 / * f l u s h I c a c h e , D c a c h e a n d B T B * /
CPWAIT
CPWAIT
mcr p15 , 0 , r0 , c8 , c7 , 0 / * f l u s h i n s t u c t i o n a n d d a t a T L B s * /
CPWAIT
CPWAIT
/* Enable the Icache */
/ *
mrc p15 , 0 , r0 , c1 , c0 , 0
orr r0 , r0 , #0x1800
mcr p15 , 0 , r0 , c1 , c0 , 0
CPWAIT
CPWAIT
* /
mov p c , l r