- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
master
wdenk
22 years ago
parent
52f52c1494
commit
6dd652fa4d
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,236 @@ |
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/*
|
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* (C) Copyright 2003 |
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* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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|
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/* imports from fetch.c */ |
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extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *)); |
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/* this is relative to the root of the server's tftp directory */ |
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static char *def_global_env_path = "/hymod/global_env"; |
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|
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static int |
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env_callback (uchar *name, uchar *value) |
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{ |
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DECLARE_GLOBAL_DATA_PTR; |
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hymod_conf_t *cp = &gd->bd->bi_hymod_conf; |
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char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver; |
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int override = 1, append = 0, remove = 0, nnl, ovl, nvl; |
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nn = name; |
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if (*nn == '-') { |
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override = 0; |
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nn++; |
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} |
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while (*nn == ' ' || *nn == '\t') |
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nn++; |
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if ((nnl = strlen (nn)) == 0) { |
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printf ("Empty name in global env file\n"); |
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return (0); |
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} |
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if ((c = nn[nnl - 1]) == '+' || c == '-') { |
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if (c == '+') |
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append = 1; |
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else |
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remove = 1; |
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nn[--nnl] = '\0'; |
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} |
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while (nnl > 0 && ((c = nn[nnl - 1]) == ' ' || c == '\t')) |
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nn[--nnl] = '\0'; |
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if (nnl == 0) { |
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printf ("Empty name in global env file\n"); |
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return (0); |
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} |
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p = value; |
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q = nv; |
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while ((c = *p) == ' ' || c == '\t') |
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p++; |
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nvl = strlen (p); |
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while (nvl > 0 && ((c = p[nvl - 1]) == ' ' || c == '\t')) |
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p[--nvl] = '\0'; |
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while ((*q = *p++) != '\0') { |
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if (*q == '%') { |
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switch (*p++) { |
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case '\0': /* whoops - back up */ |
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p--; |
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break; |
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case '%': /* a single percent character */ |
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q++; |
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break; |
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case 's': /* main board serial number as string */ |
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q += sprintf (q, "%010lu", |
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cp->main.eeprom.serno); |
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break; |
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|
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case 'S': /* main board serial number as number */ |
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q += sprintf (q, "%lu", cp->main.eeprom.serno); |
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break; |
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|
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default: /* ignore any others */ |
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break; |
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} |
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} |
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else |
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q++; |
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} |
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if ((nvl = q - nv) == 0) { |
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setenv (nn, NULL); |
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return (1); |
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} |
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if ((curver = getenv ("global_env_version")) == NULL) |
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curver = "unknown"; |
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if ((newver = getenv ("new_genv_version")) == NULL || \
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strcmp (curver, newver) == 0) { |
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if (strcmp (nn, "version") == 0) |
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setenv ("new_genv_version", nv); |
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return (1); |
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} |
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if ((p = getenv (nn)) != NULL) { |
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strcpy (ov, p); |
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ovl = strlen (ov); |
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if (append) { |
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if (strstr (ov, nv) == NULL) { |
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printf ("Appending '%s' to env var '%s'\n", |
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nv, nn); |
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while (nvl >= 0) { |
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nv[ovl + 1 + nvl] = nv[nvl]; |
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nvl--; |
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} |
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nv[ovl] = ' '; |
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while (--ovl >= 0) |
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nv[ovl] = ov[ovl]; |
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setenv (nn, nv); |
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} |
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return (1); |
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} |
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if (remove) { |
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if (strstr (ov, nv) != NULL) { |
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printf ("Removing '%s' from env var '%s'\n", |
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nv, nn); |
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while ((p = strstr (ov, nv)) != NULL) { |
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q = p + nvl; |
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if (*q == ' ') |
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q++; |
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strcpy(p, q); |
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} |
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setenv (nn, ov); |
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} |
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return (1); |
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} |
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if (!override || strcmp (ov, nv) == 0) |
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return (1); |
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printf ("Re-setting env cmd '%s' from '%s' to '%s'\n", |
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nn, ov, nv); |
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} |
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else |
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printf ("Setting env cmd '%s' to '%s'\n", nn, nv); |
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setenv (nn, nv); |
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return (1); |
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} |
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void |
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hymod_check_env (void) |
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{ |
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char *p, *path, *curver, *newver; |
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int firsttime = 0, needsave = 0; |
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if (getenv ("global_env_loaded") == NULL) { |
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puts ("*** global environment has never been loaded\n"); |
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puts ("*** fetching from server"); |
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firsttime = 1; |
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} |
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else if ((p = getenv ("always_check_env")) != NULL && |
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strcmp (p, "yes") == 0) |
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puts ("*** checking for updated global environment"); |
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else |
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return; |
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puts (" (Control-C to Abort)\n"); |
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if ((path = getenv ("global_env_path")) == NULL || *path == '\0') |
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path = def_global_env_path; |
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if (fetch_and_parse (path, CFG_LOAD_ADDR, env_callback) == 0) { |
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puts ("*** Fetch of global environment failed!\n"); |
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return; |
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} |
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if ((newver = getenv ("new_genv_version")) == NULL) { |
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puts ("*** Version number not set - contents ignored!\n"); |
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return; |
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} |
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if ((curver = getenv ("global_env_version")) == NULL || \
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strcmp (curver, newver) != 0) { |
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setenv ("global_env_version", newver); |
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needsave = 1; |
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} |
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else |
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printf ("*** Global environment up-to-date (ver %s)\n", curver); |
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setenv ("new_genv_version", NULL); |
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if (firsttime) { |
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setenv ("global_env_loaded", "yes"); |
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needsave = 1; |
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} |
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if (needsave) |
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puts ("\n*** Remember to run the 'saveenv' " |
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"command to save the changes\n\n"); |
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} |
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@ -1,163 +1,156 @@ |
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/*************** DEFINES for Intel StrataFlash FLASH chip ********************/ |
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/*
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* acceptable chips types are: |
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* (C) Copyright 2000 |
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* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* 28F320J5, 28F640J5, 28F320J3A, 28F640J3A and 28F128J3A |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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/* register addresses, valid only following an CHIP_CMD_RD_ID command */ |
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#define CHIP_ADDR_REG_MAN 0x000000 /* manufacturer's id */ |
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#define CHIP_ADDR_REG_DEV 0x000001 /* device id */ |
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#define CHIP_ADDR_REG_CFGM 0x000003 /* master lock config */ |
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#define CHIP_ADDR_REG_CFG(b) (((b)<<16)|2) /* lock config for block b */ |
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/*************** DEFINES for Intel StrataFlash FLASH chip ********************/ |
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/* Commands */ |
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#define CHIP_CMD_RST 0xFF /* reset flash */ |
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#define CHIP_CMD_RD_ID 0x90 /* read the id and lock bits */ |
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#define CHIP_CMD_RD_QUERY 0x98 /* read device capabilities */ |
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#define CHIP_CMD_RD_STAT 0x70 /* read the status register */ |
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#define CHIP_CMD_CLR_STAT 0x50 /* clear the staus register */ |
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#define CHIP_CMD_WR_BUF 0xE8 /* clear the staus register */ |
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#define CHIP_CMD_PROG 0x40 /* program word command */ |
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#define CHIP_CMD_ERASE1 0x20 /* 1st word for block erase */ |
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#define CHIP_CMD_ERASE2 0xD0 /* 2nd word for block erase */ |
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#define CHIP_CMD_ERASE_SUSP 0xB0 /* suspend block erase */ |
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#define CHIP_CMD_LOCK 0x60 /* 1st word for all lock cmds */ |
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#define CHIP_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */ |
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#define CHIP_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */ |
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#define CHIP_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */ |
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#define ISF_CMD_RST 0xFF /* reset flash */ |
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#define ISF_CMD_RD_ID 0x90 /* read the id and lock bits */ |
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#define ISF_CMD_RD_QUERY 0x98 /* read device capabilities */ |
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#define ISF_CMD_RD_STAT 0x70 /* read the status register */ |
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#define ISF_CMD_CLR_STAT 0x50 /* clear the staus register */ |
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#define ISF_CMD_WR_BUF 0xE8 /* clear the staus register */ |
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#define ISF_CMD_PROG 0x40 /* program word command */ |
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#define ISF_CMD_ERASE1 0x20 /* 1st word for block erase */ |
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#define ISF_CMD_ERASE2 0xD0 /* 2nd word for block erase */ |
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#define ISF_CMD_ERASE_SUSP 0xB0 /* suspend block erase */ |
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#define ISF_CMD_LOCK 0x60 /* 1st word for all lock cmds */ |
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#define ISF_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */ |
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#define ISF_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */ |
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#define ISF_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */ |
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/* status register bits */ |
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#define CHIP_STAT_DPS 0x02 /* Device Protect Status */ |
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#define CHIP_STAT_VPPS 0x08 /* VPP Status */ |
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#define CHIP_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */ |
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#define CHIP_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */ |
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#define CHIP_STAT_ESS 0x40 /* Erase Suspend Status */ |
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#define CHIP_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */ |
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#define CHIP_STAT_ERR (CHIP_STAT_VPPS | CHIP_STAT_DPS | \ |
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CHIP_STAT_ECLBS | CHIP_STAT_PSLBS) |
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|
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/* ID and Lock Configuration */ |
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#define CHIP_RD_ID_LOCK 0x01 /* Bit 0 of each byte */ |
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#define CHIP_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */ |
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#define CHIP_RD_ID_DEV CFG_FLASH_ID |
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|
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/* dimensions */ |
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#define CHIP_WIDTH 2 /* chips are in 16 bit mode */ |
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#define CHIP_WSHIFT 1 /* (log2 of CHIP_WIDTH) */ |
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#define CHIP_NBLOCKS CFG_FLASH_NBLOCKS |
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#define CHIP_BLKSZ (128 * 1024) /* of 128Kbytes each */ |
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#define CHIP_SIZE (CHIP_BLKSZ * CHIP_NBLOCKS) |
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#define ISF_STAT_DPS 0x02 /* Device Protect Status */ |
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#define ISF_STAT_VPPS 0x08 /* VPP Status */ |
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#define ISF_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */ |
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#define ISF_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */ |
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#define ISF_STAT_ESS 0x40 /* Erase Suspend Status */ |
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#define ISF_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */ |
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|
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#define ISF_STAT_ERR (ISF_STAT_VPPS | ISF_STAT_DPS | \ |
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ISF_STAT_ECLBS | ISF_STAT_PSLBS) |
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|
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/* register addresses, valid only following an ISF_CMD_RD_ID command */ |
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#define ISF_REG_MAN_CODE 0x00 /* manufacturer code */ |
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#define ISF_REG_DEV_CODE 0x01 /* device code */ |
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#define ISF_REG_BLK_LCK 0x02 /* block lock configuration */ |
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#define ISF_REG_MST_LCK 0x03 /* master lock configuration */ |
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|
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/********************** DEFINES for Hymod Flash ******************************/ |
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|
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/*
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* The hymod board has 2 x 28F320J5 chips running in |
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* 16 bit mode, for a 32 bit wide bank. |
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* this code requires that the flash on any Hymod board appear as a bank |
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* of two (identical) 16bit Intel StrataFlash chips with 64Kword erase |
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* sectors (or blocks), running in x16 bit mode and connected side-by-side |
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* to make a 32-bit wide bus. |
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*/ |
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|
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typedef unsigned long bank_word_t; /* 8/16/32/64bit unsigned int */ |
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typedef volatile bank_word_t *bank_addr_t; |
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typedef unsigned long bank_size_t; /* want this big - >= 32 bit */ |
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typedef unsigned long bank_word_t; |
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typedef bank_word_t bank_blk_t[64 * 1024]; |
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#define BANK_FILL_WORD(b) (((bank_word_t)(b) << 16) | (bank_word_t)(b)) |
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|
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#ifdef EXAMPLE |
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|
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#define BANK_CHIP_WIDTH 2 /* each bank is 2 chips wide */ |
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#define BANK_CHIP_WSHIFT 1 /* (log2 of BANK_CHIP_WIDTH) */ |
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/* theoretically the following examples should also work */ |
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|
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#define BANK_WIDTH (CHIP_WIDTH * BANK_CHIP_WIDTH) |
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#define BANK_WSHIFT (CHIP_WSHIFT + BANK_CHIP_WSHIFT) |
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#define BANK_NBLOCKS CHIP_NBLOCKS |
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#define BANK_BLKSZ (CHIP_BLKSZ * BANK_CHIP_WIDTH) |
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#define BANK_SIZE (CHIP_SIZE * BANK_CHIP_WIDTH) |
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/* one flash chip in x8 mode with 128Kword sectors and 8bit bus */ |
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typedef unsigned char bank_word_t; |
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typedef bank_word_t bank_blk_t[128 * 1024]; |
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#define BANK_FILL_WORD(b) ((bank_word_t)(b)) |
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|
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#define MAX_BANKS 1 /* only one bank possible */ |
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/* four flash chips in x16 mode with 32Kword sectors and 64bit bus */ |
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typedef unsigned long long bank_word_t; |
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typedef bank_word_t bank_blk_t[32 * 1024]; |
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#define BANK_FILL_WORD(b) ( \ |
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((bank_word_t)(b) << 48) \
|
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((bank_word_t)(b) << 32) \
|
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((bank_word_t)(b) << 16) \
|
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((bank_word_t)(b) << 0) \
|
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) |
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|
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#endif /* EXAMPLE */ |
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|
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/* the sizes of these two types should probably be the same */ |
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typedef volatile bank_word_t *bank_addr_t; |
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typedef unsigned long bank_size_t; |
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|
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/* align bank addresses and sizes to bank word boundaries */ |
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#define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ |
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& ~(BANK_WIDTH - 1))) |
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#define BANK_SIZE_WORD_ALIGN(s) ((bank_size_t)BANK_ADDR_WORD_ALIGN( \ |
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(bank_size_t)(s) + (BANK_WIDTH - 1))) |
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& ~(sizeof (bank_word_t) - 1))) |
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#define BANK_SIZE_WORD_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_word_t) - 1) \ |
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& ~(sizeof (bank_word_t) - 1)) |
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|
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/* align bank addresses and sizes to bank block boundaries */ |
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#define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ |
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& ~(BANK_BLKSZ - 1))) |
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#define BANK_SIZE_BLK_ALIGN(s) ((bank_size_t)BANK_ADDR_BLK_ALIGN( \ |
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(bank_size_t)(s) + (BANK_BLKSZ - 1))) |
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|
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/* align bank addresses and sizes to bank boundaries */ |
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#define BANK_ADDR_BANK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ |
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& ~(BANK_SIZE - 1))) |
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#define BANK_SIZE_BANK_ALIGN(s) ((bank_size_t)BANK_ADDR_BANK_ALIGN( \ |
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(bank_size_t)(s) + (BANK_SIZE - 1))) |
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& ~(sizeof (bank_blk_t) - 1))) |
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#define BANK_SIZE_BLK_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_blk_t) - 1) \ |
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& ~(sizeof (bank_blk_t) - 1)) |
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|
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/* add an offset to a bank address */ |
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#define BANK_ADDR_OFFSET(a, o) (bank_addr_t)((bank_size_t)(a) + \ |
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(bank_size_t)(o)) |
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|
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/* get base address of bank b, given flash base address a */ |
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#define BANK_ADDR_BASE(a, b) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \ |
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(bank_size_t)(b) * BANK_SIZE) |
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#define BANK_ADDR_OFFSET(a, o) ((bank_addr_t)((bank_size_t)(a) + \ |
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(bank_size_t)(o))) |
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|
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/* adjust a bank address to start of next word, block or bank */ |
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#define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \ |
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BANK_WIDTH) |
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sizeof (bank_word_t)) |
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#define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \ |
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BANK_BLKSZ) |
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#define BANK_ADDR_NEXT_BANK(a) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \ |
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BANK_SIZE) |
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|
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/* get bank address of chip register r given a bank base address a */ |
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#define BANK_ADDR_REG(a, r) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \ |
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((bank_size_t)(r) << BANK_WSHIFT)) |
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|
||||
/* make a bank address for each chip register address */ |
||||
|
||||
#define BANK_ADDR_REG_MAN(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_MAN) |
||||
#define BANK_ADDR_REG_DEV(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_DEV) |
||||
#define BANK_ADDR_REG_CFGM(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFGM) |
||||
#define BANK_ADDR_REG_CFG(b,a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG(b)) |
||||
|
||||
/*
|
||||
* replicate a chip cmd/stat/rd value into each byte position within a word |
||||
* so that multiple chips are accessed in a single word i/o operation |
||||
* |
||||
* this must be as wide as the bank_word_t type, and take into account the |
||||
* chip width and bank layout |
||||
*/ |
||||
sizeof (bank_blk_t)) |
||||
|
||||
#define BANK_FILL_WORD(o) ((bank_word_t)( \ |
||||
((unsigned long)(o) << 16) | \
|
||||
((unsigned long)(o) << 0) \
|
||||
)) |
||||
/* get bank address of register r given a bank base address a and block num b */ |
||||
#define BANK_ADDR_REG(a, b, r) BANK_ADDR_OFFSET(BANK_ADDR_OFFSET((a), \ |
||||
(bank_size_t)(b) * sizeof (bank_blk_t)), \
|
||||
(bank_size_t)(r) * sizeof (bank_word_t)) |
||||
|
||||
/* make a bank word value for each chip cmd/stat/rd value */ |
||||
/* make a bank word value for each StrataFlash value */ |
||||
|
||||
/* Commands */ |
||||
#define BANK_CMD_RST BANK_FILL_WORD(CHIP_CMD_RST) |
||||
#define BANK_CMD_RD_ID BANK_FILL_WORD(CHIP_CMD_RD_ID) |
||||
#define BANK_CMD_RD_STAT BANK_FILL_WORD(CHIP_CMD_RD_STAT) |
||||
#define BANK_CMD_CLR_STAT BANK_FILL_WORD(CHIP_CMD_CLR_STAT) |
||||
#define BANK_CMD_ERASE1 BANK_FILL_WORD(CHIP_CMD_ERASE1) |
||||
#define BANK_CMD_ERASE2 BANK_FILL_WORD(CHIP_CMD_ERASE2) |
||||
#define BANK_CMD_PROG BANK_FILL_WORD(CHIP_CMD_PROG) |
||||
#define BANK_CMD_LOCK BANK_FILL_WORD(CHIP_CMD_LOCK) |
||||
#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_SET_LOCK_BLK) |
||||
#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(CHIP_CMD_SET_LOCK_MSTR) |
||||
#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_CLR_LOCK_BLK) |
||||
#define BANK_CMD_RST BANK_FILL_WORD(ISF_CMD_RST) |
||||
#define BANK_CMD_RD_ID BANK_FILL_WORD(ISF_CMD_RD_ID) |
||||
#define BANK_CMD_RD_STAT BANK_FILL_WORD(ISF_CMD_RD_STAT) |
||||
#define BANK_CMD_CLR_STAT BANK_FILL_WORD(ISF_CMD_CLR_STAT) |
||||
#define BANK_CMD_ERASE1 BANK_FILL_WORD(ISF_CMD_ERASE1) |
||||
#define BANK_CMD_ERASE2 BANK_FILL_WORD(ISF_CMD_ERASE2) |
||||
#define BANK_CMD_PROG BANK_FILL_WORD(ISF_CMD_PROG) |
||||
#define BANK_CMD_LOCK BANK_FILL_WORD(ISF_CMD_LOCK) |
||||
#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(ISF_CMD_SET_LOCK_BLK) |
||||
#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(ISF_CMD_SET_LOCK_MSTR) |
||||
#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(ISF_CMD_CLR_LOCK_BLK) |
||||
|
||||
/* status register bits */ |
||||
#define BANK_STAT_DPS BANK_FILL_WORD(CHIP_STAT_DPS) |
||||
#define BANK_STAT_PSS BANK_FILL_WORD(CHIP_STAT_PSS) |
||||
#define BANK_STAT_VPPS BANK_FILL_WORD(CHIP_STAT_VPPS) |
||||
#define BANK_STAT_PSLBS BANK_FILL_WORD(CHIP_STAT_PSLBS) |
||||
#define BANK_STAT_ECLBS BANK_FILL_WORD(CHIP_STAT_ECLBS) |
||||
#define BANK_STAT_ESS BANK_FILL_WORD(CHIP_STAT_ESS) |
||||
#define BANK_STAT_RDY BANK_FILL_WORD(CHIP_STAT_RDY) |
||||
|
||||
#define BANK_STAT_ERR BANK_FILL_WORD(CHIP_STAT_ERR) |
||||
|
||||
/* ID and Lock Configuration */ |
||||
#define BANK_RD_ID_LOCK BANK_FILL_WORD(CHIP_RD_ID_LOCK) |
||||
#define BANK_RD_ID_MAN BANK_FILL_WORD(CHIP_RD_ID_MAN) |
||||
#define BANK_RD_ID_DEV BANK_FILL_WORD(CHIP_RD_ID_DEV) |
||||
#define BANK_STAT_DPS BANK_FILL_WORD(ISF_STAT_DPS) |
||||
#define BANK_STAT_PSS BANK_FILL_WORD(ISF_STAT_PSS) |
||||
#define BANK_STAT_VPPS BANK_FILL_WORD(ISF_STAT_VPPS) |
||||
#define BANK_STAT_PSLBS BANK_FILL_WORD(ISF_STAT_PSLBS) |
||||
#define BANK_STAT_ECLBS BANK_FILL_WORD(ISF_STAT_ECLBS) |
||||
#define BANK_STAT_ESS BANK_FILL_WORD(ISF_STAT_ESS) |
||||
#define BANK_STAT_RDY BANK_FILL_WORD(ISF_STAT_RDY) |
||||
|
||||
#define BANK_STAT_ERR BANK_FILL_WORD(ISF_STAT_ERR) |
||||
|
||||
/* make a bank register address for each StrataFlash register address */ |
||||
|
||||
#define BANK_REG_MAN_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_MAN_CODE) |
||||
#define BANK_REG_DEV_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_DEV_CODE) |
||||
#define BANK_REG_BLK_LCK(a, b) BANK_ADDR_REG((a), (b), ISF_REG_BLK_LCK) |
||||
#define BANK_REG_MST_LCK(a) BANK_ADDR_REG((a), 0, ISF_REG_MST_LCK) |
||||
|
||||
@ -0,0 +1,322 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef _HYMOD_H_ |
||||
#define _HYMOD_H_ |
||||
|
||||
#include <linux/config.h> |
||||
#ifdef CONFIG_8260 |
||||
#include <asm/iopin_8260.h> |
||||
#endif |
||||
|
||||
/*
|
||||
* hymod configuration data - passed by boot code via the board information |
||||
* structure (only U-Boot has support for this at the moment) |
||||
* |
||||
* there are three types of data passed up from the boot monitor. the first |
||||
* (type hymod_eeprom_t) is the eeprom data that was read off both the main |
||||
* (or mother) board and the mezzanine board (if any). this data defines how |
||||
* many Xilinx fpgas are on each board, and their types (among other things). |
||||
* the second type of data (type xlx_mmap_t, one per Xilinx fpga) defines where |
||||
* in the physical address space the various Xilinx fpga access regions have |
||||
* been mapped by the boot rom. the third type of data (type xlx_iopins_t, |
||||
* one per Xilinx fpga) defines which io port pins are connected to the various |
||||
* signals required to program a Xilinx fpga. |
||||
* |
||||
* A ram/flash "bank" refers to memory controlled by the same chip select. |
||||
* |
||||
* the eeprom contents are defined as in technical note #2 - basically, |
||||
* a header, zero or more records in no particular order, and a 32 bit crc |
||||
* a record is 1 or more type bytes, a length byte and "length" bytes. |
||||
*/ |
||||
|
||||
#define HYMOD_EEPROM_ID 0xAA /* eeprom id byte */ |
||||
#define HYMOD_EEPROM_VER 1 /* eeprom contents version (0-127) */ |
||||
#define HYMOD_EEPROM_SIZE 256 /* number of bytes in the eeprom */ |
||||
|
||||
/* eeprom header */ |
||||
typedef |
||||
struct { |
||||
unsigned char id; /* eeprom id byte */ |
||||
unsigned char :1; |
||||
unsigned char ver:7; /* eeprom contents version number */ |
||||
unsigned long len; /* total # of bytes btw hdr and crc */ |
||||
} |
||||
hymod_eehdr_t; |
||||
|
||||
/* maximum number of bytes available for eeprom data records */ |
||||
#define HYMOD_EEPROM_MAXLEN (HYMOD_EEPROM_SIZE \ |
||||
- sizeof (hymod_eehdr_t) \
|
||||
- sizeof (unsigned long)) |
||||
|
||||
/* eeprom data record */ |
||||
typedef |
||||
union { |
||||
struct { |
||||
unsigned char topbit:1; |
||||
unsigned char type:7; |
||||
unsigned char len; |
||||
unsigned char data[1]; /* variable length */ |
||||
} small; |
||||
struct { |
||||
unsigned short topbit:1; |
||||
unsigned short nxtbit:1; |
||||
unsigned short type:14; |
||||
unsigned short len; |
||||
unsigned char data[1]; /* variable length */ |
||||
} medium; |
||||
struct { |
||||
unsigned long topbit:1; |
||||
unsigned long nxtbit:1; |
||||
unsigned long type:30; |
||||
unsigned long len; |
||||
unsigned char data[1]; /* variable length */ |
||||
} large; |
||||
} |
||||
hymod_eerec_t; |
||||
|
||||
#define HYMOD_EEOFF_MAIN 0x00 /* i2c addr offset for main eeprom */ |
||||
#define HYMOD_EEOFF_MEZZ 0x04 /* i2c addr offset for mezz eepomr */ |
||||
|
||||
/* eeprom record types */ |
||||
#define HYMOD_EEREC_SERNO 1 /* serial number */ |
||||
#define HYMOD_EEREC_DATE 2 /* date */ |
||||
#define HYMOD_EEREC_BATCH 3 /* batch id */ |
||||
#define HYMOD_EEREC_TYPE 4 /* board type */ |
||||
#define HYMOD_EEREC_REV 5 /* revision number */ |
||||
#define HYMOD_EEREC_SDRAM 6 /* sdram sizes */ |
||||
#define HYMOD_EEREC_FLASH 7 /* flash sizes */ |
||||
#define HYMOD_EEREC_ZBT 8 /* zbt ram sizes */ |
||||
#define HYMOD_EEREC_XLXTYP 9 /* Xilinx fpga types */ |
||||
#define HYMOD_EEREC_XLXSPD 10 /* Xilinx fpga speeds */ |
||||
#define HYMOD_EEREC_XLXTMP 11 /* Xilinx fpga temperatures */ |
||||
#define HYMOD_EEREC_XLXGRD 12 /* Xilinx fpga grades */ |
||||
#define HYMOD_EEREC_CPUTYP 13 /* Motorola CPU type */ |
||||
#define HYMOD_EEREC_CPUSPD 14 /* CPU speed */ |
||||
#define HYMOD_EEREC_BUSSPD 15 /* bus speed */ |
||||
#define HYMOD_EEREC_CPMSPD 16 /* CPM speed */ |
||||
#define HYMOD_EEREC_HSTYPE 17 /* high-speed serial chip type */ |
||||
#define HYMOD_EEREC_HSCHIN 18 /* high-speed serial input channels */ |
||||
#define HYMOD_EEREC_HSCHOUT 19 /* high-speed serial output channels */ |
||||
|
||||
/* some dimensions */ |
||||
#define HYMOD_MAX_BATCH 32 /* max no. of bytes in batch id */ |
||||
#define HYMOD_MAX_SDRAM 4 /* max sdram "banks" on any board */ |
||||
#define HYMOD_MAX_FLASH 4 /* max flash "banks" on any board */ |
||||
#define HYMOD_MAX_ZBT 16 /* max ZBT rams on any board */ |
||||
#define HYMOD_MAX_XLX 4 /* max Xilinx fpgas on any board */ |
||||
|
||||
#define HYMOD_MAX_BYTES 16 /* enough to store any bytes array */ |
||||
|
||||
/* board types */ |
||||
#define HYMOD_BDTYPE_NONE 0 /* information not present */ |
||||
#define HYMOD_BDTYPE_IO 1 /* I/O main board */ |
||||
#define HYMOD_BDTYPE_CLP 2 /* CLP main board */ |
||||
#define HYMOD_BDTYPE_DSP 3 /* DSP main board */ |
||||
#define HYMOD_BDTYPE_INPUT 4 /* video input mezzanine board */ |
||||
#define HYMOD_BDTYPE_ALTINPUT 5 /* video input mezzanine board */ |
||||
#define HYMOD_BDTYPE_DISPLAY 6 /* video display mezzanine board */ |
||||
#define HYMOD_BDTYPE_MAX 7 /* first invalid value */ |
||||
|
||||
/* Xilinx fpga types */ |
||||
#define HYMOD_XTYP_NONE 0 /* information not present */ |
||||
#define HYMOD_XTYP_XCV300E 1 /* Xilinx Virtex 300 */ |
||||
#define HYMOD_XTYP_XCV400E 2 /* Xilinx Virtex 400 */ |
||||
#define HYMOD_XTYP_XCV600E 3 /* Xilinx Virtex 600 */ |
||||
#define HYMOD_XTYP_MAX 4 /* first invalid value */ |
||||
|
||||
/* Xilinx fpga speeds */ |
||||
#define HYMOD_XSPD_NONE 0 /* information not present */ |
||||
#define HYMOD_XSPD_SIX 1 |
||||
#define HYMOD_XSPD_SEVEN 2 |
||||
#define HYMOD_XSPD_EIGHT 3 |
||||
#define HYMOD_XSPD_MAX 4 /* first invalid value */ |
||||
|
||||
/* Xilinx fpga temperatures */ |
||||
#define HYMOD_XTMP_NONE 0 /* information not present */ |
||||
#define HYMOD_XTMP_COM 1 |
||||
#define HYMOD_XTMP_IND 2 |
||||
#define HYMOD_XTMP_MAX 3 /* first invalid value */ |
||||
|
||||
/* Xilinx fpga grades */ |
||||
#define HYMOD_XTMP_NONE 0 /* information not present */ |
||||
#define HYMOD_XTMP_NORMAL 1 |
||||
#define HYMOD_XTMP_ENGSAMP 2 |
||||
#define HYMOD_XTMP_MAX 3 /* first invalid value */ |
||||
|
||||
/* CPU types */ |
||||
#define HYMOD_CPUTYPE_NONE 0 /* information not present */ |
||||
#define HYMOD_CPUTYPE_MPC8260 1 /* Motorola MPC8260 embedded powerpc */ |
||||
#define HYMOD_CPUTYPE_MAX 2 /* first invalid value */ |
||||
|
||||
/* CPU/BUS/CPM clock speeds */ |
||||
#define HYMOD_CLKSPD_NONE 0 /* information not present */ |
||||
#define HYMOD_CLKSPD_33MHZ 1 |
||||
#define HYMOD_CLKSPD_66MHZ 2 |
||||
#define HYMOD_CLKSPD_100MHZ 3 |
||||
#define HYMOD_CLKSPD_133MHZ 4 |
||||
#define HYMOD_CLKSPD_166MHZ 5 |
||||
#define HYMOD_CLKSPD_200MHZ 6 |
||||
#define HYMOD_CLKSPD_MAX 7 /* first invalid value */ |
||||
|
||||
/* high speed serial chip types */ |
||||
#define HYMOD_HSSTYPE_NONE 0 /* information not present */ |
||||
#define HYMOD_HSSTYPE_AMCC52064 1 |
||||
#define HYMOD_HSSTYPE_MAX 2 /* first invalid value */ |
||||
|
||||
/* a date (yyyy-mm-dd) */ |
||||
typedef |
||||
struct { |
||||
unsigned short year; |
||||
unsigned char month; |
||||
unsigned char day; |
||||
} |
||||
hymod_date_t; |
||||
|
||||
/* describes a Xilinx fpga */ |
||||
typedef |
||||
struct { |
||||
unsigned char type; /* chip type */ |
||||
unsigned char speed; /* chip speed rating */ |
||||
unsigned char temp; /* chip temperature rating */ |
||||
unsigned char grade; /* chip grade */ |
||||
} |
||||
hymod_xlx_t; |
||||
|
||||
/* describes a Motorola embedded processor */ |
||||
typedef |
||||
struct { |
||||
unsigned char type; /* CPU type */ |
||||
unsigned char cpuspd; /* speed of the PowerPC core */ |
||||
unsigned char busspd; /* speed of the system and 60x bus */ |
||||
unsigned char cpmspd; /* speed of the CPM co-processor */ |
||||
} |
||||
hymod_mpc_t; |
||||
|
||||
/* info about high-speed (1Gbit) serial interface */ |
||||
typedef |
||||
struct { |
||||
unsigned char type; /* high-speed serial chip type */ |
||||
unsigned char nchin; /* number of input channels mounted */ |
||||
unsigned char nchout; /* number of output channels mounted */ |
||||
} |
||||
hymod_hss_t; |
||||
|
||||
/*
|
||||
* this defines the contents of the serial eeprom that exists on every |
||||
* hymod board, including mezzanine boards (the serial eeprom will be |
||||
* faked for early development boards that don't have one) |
||||
*/ |
||||
|
||||
typedef |
||||
struct { |
||||
unsigned char valid:1; /* contents of this struct is valid */ |
||||
unsigned char ver:7; /* eeprom contents version */ |
||||
unsigned char bdtype; /* board type */ |
||||
unsigned char bdrev; /* board revision */ |
||||
unsigned char batchlen; /* length of batch string below */ |
||||
unsigned long serno; /* serial number */ |
||||
hymod_date_t date; /* manufacture date */ |
||||
unsigned char batch[32]; /* manufacturer specific batch id */ |
||||
unsigned char nsdram; /* # of ram "banks" */ |
||||
unsigned char nflash; /* # of flash "banks" */ |
||||
unsigned char nzbt; /* # of ZBT rams */ |
||||
unsigned char nxlx; /* # of Xilinx fpgas */ |
||||
unsigned char sdramsz[HYMOD_MAX_SDRAM]; /* log2 of sdram size */ |
||||
unsigned char flashsz[HYMOD_MAX_FLASH]; /* log2 of flash size */ |
||||
unsigned char zbtsz[HYMOD_MAX_ZBT]; /* log2 of ZBT ram size */ |
||||
hymod_xlx_t xlx[HYMOD_MAX_XLX]; /* Xilinx fpga info */ |
||||
hymod_mpc_t mpc; /* Motorola MPC CPU info */ |
||||
hymod_hss_t hss; /* high-speed serial info */ |
||||
} |
||||
hymod_eeprom_t; |
||||
|
||||
/*
|
||||
* this defines a region in the processor's physical address space |
||||
*/ |
||||
typedef |
||||
struct { |
||||
unsigned long exists:1; /* 1 if the region exists, 0 if not */ |
||||
unsigned long size:31; /* size in bytes */ |
||||
unsigned long base; /* base address */ |
||||
} |
||||
xlx_prgn_t; |
||||
|
||||
/*
|
||||
* this defines where the various Xilinx fpga access regions are mapped |
||||
* into the physical address space of the processor |
||||
*/ |
||||
typedef |
||||
struct { |
||||
xlx_prgn_t prog; /* program access region */ |
||||
xlx_prgn_t reg; /* register access region */ |
||||
xlx_prgn_t port; /* port access region */ |
||||
} |
||||
xlx_mmap_t; |
||||
|
||||
/*
|
||||
* this defines which 8260 i/o port pins are connected to the various |
||||
* signals required for programming a Xilinx fpga |
||||
*/ |
||||
typedef |
||||
struct { |
||||
iopin_t prog_pin; /* assert for >= 300ns to program */ |
||||
iopin_t init_pin; /* goes high when fpga is cleared */ |
||||
iopin_t done_pin; /* goes high when program is done */ |
||||
iopin_t enable_pin; /* some fpgas need enabling */ |
||||
} |
||||
xlx_iopins_t; |
||||
|
||||
/* all info about one Xilinx chip */ |
||||
typedef |
||||
struct { |
||||
xlx_mmap_t mmap; |
||||
xlx_iopins_t iopins; |
||||
unsigned long irq:8; /* h/w intr req number for this fpga */ |
||||
} |
||||
xlx_info_t; |
||||
|
||||
/* all info about one hymod board */ |
||||
typedef |
||||
struct { |
||||
hymod_eeprom_t eeprom; |
||||
xlx_info_t xlx[HYMOD_MAX_XLX]; |
||||
} |
||||
hymod_board_t; |
||||
|
||||
/*
|
||||
* this defines the configuration information of a hymod board-set |
||||
* (main board + possible mezzanine board). In future, there may be |
||||
* more than one mezzanine board (stackable?) - if so, add a "mezz2" |
||||
* field, and so on... or make mezz an array? |
||||
*/ |
||||
typedef |
||||
struct { |
||||
unsigned long ver:8; /* version control */ |
||||
hymod_board_t main; /* main board info */ |
||||
hymod_board_t mezz; /* mezzanine board info */ |
||||
unsigned long crc; /* ensures kernel and boot prom agree */ |
||||
} |
||||
hymod_conf_t; |
||||
|
||||
#endif /* _HYMOD_H_ */ |
||||
@ -0,0 +1,113 @@ |
||||
/*
|
||||
* (C) Copyright 2003 |
||||
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
|
||||
/* imports from common/main.c */ |
||||
extern char console_buffer[CFG_CBSIZE]; |
||||
|
||||
int |
||||
hymod_get_serno (const char *prompt) |
||||
{ |
||||
for (;;) { |
||||
int n, serno; |
||||
char *p; |
||||
|
||||
#ifdef CONFIG_BOOT_RETRY_TIME |
||||
reset_cmd_timeout (); |
||||
#endif |
||||
|
||||
n = readline (prompt); |
||||
|
||||
if (n < 0) |
||||
return (n); |
||||
|
||||
if (n == 0) |
||||
continue; |
||||
|
||||
serno = (int) simple_strtol (console_buffer, &p, 10); |
||||
|
||||
if (p > console_buffer && *p == '\0' && serno > 0) |
||||
return (serno); |
||||
|
||||
printf ("Invalid number (%s) - please re-enter\n", |
||||
console_buffer); |
||||
} |
||||
} |
||||
|
||||
int |
||||
hymod_get_ethaddr (void) |
||||
{ |
||||
for (;;) { |
||||
int n; |
||||
|
||||
#ifdef CONFIG_BOOT_RETRY_TIME |
||||
reset_cmd_timeout (); |
||||
#endif |
||||
|
||||
n = readline ("Enter board ethernet address: "); |
||||
|
||||
if (n < 0) |
||||
return (n); |
||||
|
||||
if (n == 0) |
||||
continue; |
||||
|
||||
if (n == 17) { |
||||
int i; |
||||
char *p, *q; |
||||
uchar ea[6]; |
||||
|
||||
/* see if it looks like an ethernet address */ |
||||
|
||||
p = console_buffer; |
||||
|
||||
for (i = 0; i < 6; i++) { |
||||
char term = (i == 5 ? '\0' : ':'); |
||||
|
||||
ea[i] = simple_strtol (p, &q, 16); |
||||
|
||||
if ((q - p) != 2 || *q++ != term) |
||||
break; |
||||
|
||||
p = q; |
||||
} |
||||
|
||||
if (i == 6) { |
||||
/* it looks ok - set it */ |
||||
printf ("Setting ethernet addr to %s\n", |
||||
console_buffer); |
||||
|
||||
setenv ("ethaddr", console_buffer); |
||||
|
||||
puts ("Remember to do a 'saveenv' to " |
||||
"make it permanent\n"); |
||||
|
||||
return (0); |
||||
} |
||||
} |
||||
|
||||
printf ("Invalid ethernet addr (%s) - please re-enter\n", |
||||
console_buffer); |
||||
} |
||||
} |
||||
@ -0,0 +1,171 @@ |
||||
/*
|
||||
* (C) Copyright 2003 |
||||
* Murray Jensen, CSIRO-MIT, Murray.Jensen@csiro.au |
||||
* |
||||
* based on dtt/lm75.c which is ... |
||||
* |
||||
* (C) Copyright 2001 |
||||
* Bill Hunter, Wave 7 Optics, williamhunter@mediaone.net |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Analog Devices's ADM1021 |
||||
* "Low Cost Microprocessor System Temperature Monitor" |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
|
||||
#ifdef CONFIG_DTT_ADM1021 |
||||
|
||||
#include <i2c.h> |
||||
#include <dtt.h> |
||||
|
||||
typedef |
||||
struct { |
||||
uint i2c_addr:7; /* 7bit i2c chip address */ |
||||
uint conv_rate:3; /* conversion rate */ |
||||
uint enable_alert:1; /* enable alert output pin */ |
||||
uint enable_local:1; /* enable internal temp sensor */ |
||||
uint max_local:8; /* internal temp maximum */ |
||||
uint min_local:8; /* internal temp minimum */ |
||||
uint enable_remote:1; /* enable remote temp sensor */ |
||||
uint max_remote:8; /* remote temp maximum */ |
||||
uint min_remote:8; /* remote temp minimum */ |
||||
} |
||||
dtt_cfg_t; |
||||
|
||||
dtt_cfg_t dttcfg[] = CFG_DTT_ADM1021; |
||||
|
||||
int |
||||
dtt_read (int sensor, int reg) |
||||
{ |
||||
dtt_cfg_t *dcp = &dttcfg[sensor >> 1]; |
||||
uchar data; |
||||
|
||||
if (i2c_read(dcp->i2c_addr, reg, 1, &data, 1) != 0) |
||||
return -1; |
||||
|
||||
return (int)data; |
||||
} /* dtt_read() */ |
||||
|
||||
int |
||||
dtt_write (int sensor, int reg, int val) |
||||
{ |
||||
dtt_cfg_t *dcp = &dttcfg[sensor >> 1]; |
||||
uchar data; |
||||
|
||||
data = (uchar)(val & 0xff); |
||||
|
||||
if (i2c_write(dcp->i2c_addr, reg, 1, &data, 1) != 0) |
||||
return 1; |
||||
|
||||
return 0; |
||||
} /* dtt_write() */ |
||||
|
||||
static int |
||||
_dtt_init (int sensor) |
||||
{ |
||||
dtt_cfg_t *dcp = &dttcfg[sensor >> 1]; |
||||
int reg, val; |
||||
|
||||
if (((sensor & 1) == 0 ? dcp->enable_local : dcp->enable_remote) == 0) |
||||
return 1; /* sensor is disabled (or rather ignored) */ |
||||
|
||||
/*
|
||||
* Setup High Limit register |
||||
*/ |
||||
if ((sensor & 1) == 0) { |
||||
reg = DTT_WRITE_LOC_HIGHLIM; |
||||
val = dcp->max_local; |
||||
} |
||||
else { |
||||
reg = DTT_WRITE_REM_HIGHLIM; |
||||
val = dcp->max_remote; |
||||
} |
||||
if (dtt_write (sensor, reg, val) != 0) |
||||
return 1; |
||||
|
||||
/*
|
||||
* Setup Low Limit register |
||||
*/ |
||||
if ((sensor & 1) == 0) { |
||||
reg = DTT_WRITE_LOC_LOWLIM; |
||||
val = dcp->min_local; |
||||
} |
||||
else { |
||||
reg = DTT_WRITE_REM_LOWLIM; |
||||
val = dcp->min_remote; |
||||
} |
||||
if (dtt_write (sensor, reg, val) != 0) |
||||
return 1; |
||||
|
||||
/* shouldn't hurt if the rest gets done twice */ |
||||
|
||||
/*
|
||||
* Setup Conversion Rate register |
||||
*/ |
||||
if (dtt_write (sensor, DTT_WRITE_CONVRATE, dcp->conv_rate) != 0) |
||||
return 1; |
||||
|
||||
/*
|
||||
* Setup configuraton register |
||||
*/ |
||||
val = 0; /* running */ |
||||
if (dcp->enable_alert == 0) |
||||
val |= DTT_CONFIG_ALERT_MASKED; /* mask ALERT pin */ |
||||
if (dtt_write (sensor, DTT_WRITE_CONFIG, val) != 0) |
||||
return 1; |
||||
|
||||
return 0; |
||||
} /* _dtt_init() */ |
||||
|
||||
int |
||||
dtt_init (void) |
||||
{ |
||||
int i; |
||||
unsigned char sensors[] = CONFIG_DTT_SENSORS; |
||||
const char *const header = "DTT: "; |
||||
|
||||
for (i = 0; i < sizeof(sensors); i++) { |
||||
if (_dtt_init(sensors[i]) != 0) |
||||
printf ("%s%d FAILED INIT\n", header, i+1); |
||||
else |
||||
printf ("%s%d is %i C\n", header, i+1, |
||||
dtt_get_temp(sensors[i])); |
||||
} |
||||
|
||||
return (0); |
||||
} /* dtt_init() */ |
||||
|
||||
int |
||||
dtt_get_temp (int sensor) |
||||
{ |
||||
signed char val; |
||||
|
||||
if ((sensor & 1) == 0) |
||||
val = dtt_read(sensor, DTT_READ_LOC_VALUE); |
||||
else |
||||
val = dtt_read(sensor, DTT_READ_REM_VALUE); |
||||
|
||||
return (int) val; |
||||
} /* dtt_get_temp() */ |
||||
|
||||
#endif /* CONFIG_DTT_ADM1021 */ |
||||
Loading…
Reference in new issue