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dts: cadence_spi: Sync DT bindings with Linux

Browse Source 
Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Fix indentation of the QSPI node in the keystone k2g
device tree.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
master
Jason Rush 7 years ago committed by Jagan Teki
parent 15a70a5da3
commit 6e62b178e1
12 changed files with 84 additions and 89 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 75
      arch/arm/dts/keystone-k2g-evm.dts
  2. 5
      arch/arm/dts/keystone-k2g.dtsi
  3. 5
      arch/arm/dts/socfpga.dtsi
  4. 4
      arch/arm/dts/socfpga_arria10.dtsi
  5. 9
      arch/arm/dts/socfpga_arria5_socdk.dts
  6. 9
      arch/arm/dts/socfpga_cyclone5_is1.dts
  7. 9
      arch/arm/dts/socfpga_cyclone5_socdk.dts
  8. 9
      arch/arm/dts/socfpga_cyclone5_sockit.dts
  9. 9
      arch/arm/dts/socfpga_cyclone5_socrates.dts
  10. 9
      arch/arm/dts/socfpga_cyclone5_sr1500.dts
  11. 18
      arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
  12. 12
      arch/arm/dts/stv0991.dts

75
arch/arm/dts/keystone-k2g-evm.dts
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@ -68,46 +68,45 @@
&qspi {
status = "okay";
flash0: m25p80@0 {
compatible = "s25fl512s","spi-flash";
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <96000000>;
#address-cells = <1>;
#size-cells = <1>;
tshsl-ns = <392>;
tsd2d-ns = <392>;
tchsh-ns = <100>;
tslch-ns = <100>;
flash0: m25p80@0 {
compatible = "s25fl512s","spi-flash";
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <96000000>;
#address-cells = <1>;
#size-cells = <1>;
cdns,tshsl-ns = <392>;
cdns,tsd2d-ns = <392>;
cdns,tchsh-ns = <100>;
cdns,tslch-ns = <100>;
block-size = <18>;
partition@0 {
label = "QSPI.u-boot-spl-os";
reg = <0x00000000 0x00100000>;
};
partition@1 {
label = "QSPI.u-boot-env";
reg = <0x00100000 0x00040000>;
};
partition@2 {
label = "QSPI.skern";
reg = <0x00140000 0x0040000>;
};
partition@3 {
label = "QSPI.pmmc-firmware";
reg = <0x00180000 0x0040000>;
};
partition@4 {
label = "QSPI.kernel";
reg = <0x001C0000 0x0800000>;
};
partition@5 {
label = "QSPI.file-system";
reg = <0x009C0000 0x3640000>;
};
};
partition@0 {
label = "QSPI.u-boot-spl-os";
reg = <0x00000000 0x00100000>;
};
partition@1 {
label = "QSPI.u-boot-env";
reg = <0x00100000 0x00040000>;
};
partition@2 {
label = "QSPI.skern";
reg = <0x00140000 0x0040000>;
};
partition@3 {
label = "QSPI.pmmc-firmware";
reg = <0x00180000 0x0040000>;
};
partition@4 {
label = "QSPI.kernel";
reg = <0x001C0000 0x0800000>;
};
partition@5 {
label = "QSPI.file-system";
reg = <0x009C0000 0x3640000>;
};
};
};
&mmc0 {

5
arch/arm/dts/keystone-k2g.dtsi
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@ -92,8 +92,9 @@
<0x24000000 0x4000000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
num-cs = <4>;
fifo-depth = <256>;
sram-size = <256>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x24000000>;
status = "disabled";
};

5
arch/arm/dts/socfpga.dtsi
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@ -644,8 +644,9 @@
clocks = <&qspi_clk>;
ext-decoder = <0>; /* external decoder */
num-cs = <4>;
fifo-depth = <128>;
sram-size = <128>;
cdns,fifo-depth = <128>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x00000000>;
bus-num = <2>;
status = "disabled";
};

4
arch/arm/dts/socfpga_arria10.dtsi
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@ -734,8 +734,8 @@
clocks = <&l4_main_clk>;
ext-decoder = <0>; /* external decoder */
num-chipselect = <4>;
fifo-depth = <128>;
sram-size = <512>;
cdns,fifo-depth = <128>;
cdns,fifo-width = <4>;
bus-num = <2>;
status = "disabled";
};

9
arch/arm/dts/socfpga_arria5_socdk.dts
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@ -94,10 +94,9 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

9
arch/arm/dts/socfpga_cyclone5_is1.dts
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@ -93,11 +93,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

9
arch/arm/dts/socfpga_cyclone5_socdk.dts
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@ -104,11 +104,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

9
arch/arm/dts/socfpga_cyclone5_sockit.dts
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@ -84,11 +84,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

9
arch/arm/dts/socfpga_cyclone5_socrates.dts
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@ -74,11 +74,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

9
arch/arm/dts/socfpga_cyclone5_sr1500.dts
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@ -92,10 +92,9 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

18
arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
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@ -79,11 +79,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
flash1: n25q00@1 {
@ -96,11 +95,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};

12
arch/arm/dts/stv0991.dts
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@ -32,7 +32,9 @@
reg = <0x80203000 0x100>,
<0x40000000 0x1000000>;
clocks = <3750000>;
sram-size = <256>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x40000000>;
status = "okay";
flash0: n25q32@0 {
@ -44,10 +46,10 @@
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};
};

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