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@ -55,7 +55,7 @@ |
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*/ |
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_vectors: |
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#ifndef CONFIG_M5271 |
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#ifndef CONFIG_R5200 |
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.long 0x00000000, _START |
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#else |
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.long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */ |
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@ -142,7 +142,9 @@ _start: |
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/* Initialize RAMBAR1: locate SRAM and validate it */ |
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move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0 |
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movec %d0, %RAMBAR1 |
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#ifdef CONFIG_M5271 |
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#endif |
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#ifdef CONFIG_R5200 |
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move.l #(_flash_setup-CFG_FLASH_BASE), %a0 |
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move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1 |
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move.l #(CFG_INIT_RAM_ADDR), %a2 |
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@ -150,8 +152,6 @@ _copy_flash: |
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move.l (%a0)+, (%a2)+ |
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cmp.l %a0, %a1 |
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bgt.s _copy_flash |
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#endif |
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jmp CFG_INIT_RAM_ADDR |
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_after_flash_copy: |
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#endif |
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@ -174,18 +174,24 @@ _after_flash_copy: |
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bsr cpu_init_f /* run low-level CPU init code (from flash) */ |
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bsr board_init_f /* run low-level board init code (from flash) */ |
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/* board_init_f() does not return |
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/* board_init_f() does not return */ |
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/*------------------------------------------------------------------------------*/ |
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#ifdef CONFIG_M5271 |
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#ifdef CONFIG_R5200 |
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_flash_setup: |
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move.l #0x1000, %d0 |
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/* CSAR0 */ |
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move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0 |
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move.w %d0, 0x40000080 |
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move.l #0x2180, %d0 |
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/* CSCR0 */ |
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move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */ |
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move.w %d0, 0x4000008A |
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move.l #0x3f0001, %d0 |
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/* CSMR0 */ |
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move.l #0x001f0001, %d0 /* 2 MB, valid */ |
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move.l %d0, 0x40000084 |
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jmp _after_flash_copy.L |
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_flash_setup_end: |
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#endif |
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