net: sh-eth: Remove definition of RX_DESC_SIZE and TX_DESC_SIZE

RX_DESC_SIZE and TX_DESC_SIZE mean the size of the data descriptor for sh-eth.
We can acquire this in sizeof. It is not necessary to define these in define.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
master
Nobuhiro Iwamatsu 10 years ago committed by Nobuhiro Iwamatsu
parent a3cc41b42d
commit 703949e495
  1. 20
      drivers/net/sh_eth.c
  2. 4
      drivers/net/sh_eth.h

@ -186,19 +186,21 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
struct tx_desc_s *cur_tx_desc;
/*
* Allocate tx descriptors. They must be TX_DESC_SIZE bytes aligned
* Allocate rx descriptors. They must be aligned to size of struct
* tx_desc_s.
*/
port_info->tx_desc_malloc = malloc(NUM_TX_DESC *
sizeof(struct tx_desc_s) +
TX_DESC_SIZE - 1);
sizeof(struct tx_desc_s) - 1);
if (!port_info->tx_desc_malloc) {
printf(SHETHER_NAME ": malloc failed\n");
ret = -ENOMEM;
goto err;
}
tmp_addr = (u32) (((int)port_info->tx_desc_malloc + TX_DESC_SIZE - 1) &
~(TX_DESC_SIZE - 1));
tmp_addr = (u32) (((int)port_info->tx_desc_malloc +
sizeof(struct tx_desc_s) - 1) &
~(sizeof(struct tx_desc_s) - 1));
flush_cache_wback(tmp_addr, NUM_TX_DESC * sizeof(struct tx_desc_s));
/* Make sure we use a P2 address (non-cacheable) */
port_info->tx_desc_base = (struct tx_desc_s *)ADDR_TO_P2(tmp_addr);
@ -238,19 +240,21 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
u8 *rx_buf;
/*
* Allocate rx descriptors. They must be RX_DESC_SIZE bytes aligned
* Allocate rx descriptors. They must be aligned to size of struct
* rx_desc_s.
*/
port_info->rx_desc_malloc = malloc(NUM_RX_DESC *
sizeof(struct rx_desc_s) +
RX_DESC_SIZE - 1);
sizeof(struct rx_desc_s) - 1);
if (!port_info->rx_desc_malloc) {
printf(SHETHER_NAME ": malloc failed\n");
ret = -ENOMEM;
goto err;
}
tmp_addr = (u32) (((int)port_info->rx_desc_malloc + RX_DESC_SIZE - 1) &
~(RX_DESC_SIZE - 1));
tmp_addr = (u32) (((int)port_info->rx_desc_malloc +
sizeof(struct rx_desc_s) - 1) &
~(sizeof(struct rx_desc_s) - 1));
flush_cache_wback(tmp_addr, NUM_RX_DESC * sizeof(struct rx_desc_s));
/* Make sure we use a P2 address (non-cacheable) */
port_info->rx_desc_base = (struct rx_desc_s *)ADDR_TO_P2(tmp_addr);

@ -51,8 +51,6 @@
/* The size of the tx descriptor is determined by how much padding is used.
4, 20, or 52 bytes of padding can be used */
#define TX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)
/* same as CONFIG_SH_ETHER_ALIGNE_SIZE */
#define TX_DESC_SIZE (12 + TX_DESC_PADDING)
/* Tx descriptor. We always use 3 bytes of padding */
struct tx_desc_s {
@ -68,8 +66,6 @@ struct tx_desc_s {
/* The size of the rx descriptor is determined by how much padding is used.
4, 20, or 52 bytes of padding can be used */
#define RX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)
/* same as CONFIG_SH_ETHER_ALIGNE_SIZE */
#define RX_DESC_SIZE (12 + RX_DESC_PADDING)
/* aligned cache line size */
#define RX_BUF_ALIGNE_SIZE (CONFIG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32)

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