This patch adds a DM GPIO driver for the Marvell MVEBU SoCs. There are other non-DM drivers that might be used on these platforms. But this patch creates a new DM driver. Which will be used by all Armada XP/38x boards. Other MVEBU SoC (Kirkwood / Orion) may follow once they support DM as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Signed-off-by: Stefan Roese <sr@denx.de>master
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <asm/gpio.h> |
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#include <asm/io.h> |
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#include <errno.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define MVEBU_GPIOS_PER_BANK 32 |
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struct mvebu_gpio_regs { |
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u32 data_out; |
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u32 io_conf; |
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u32 blink_en; |
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u32 in_pol; |
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u32 data_in; |
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}; |
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struct mvebu_gpio_priv { |
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struct mvebu_gpio_regs *regs; |
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char name[2]; |
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}; |
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static int mvebu_gpio_direction_input(struct udevice *dev, unsigned int gpio) |
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{ |
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struct mvebu_gpio_priv *priv = dev_get_priv(dev); |
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struct mvebu_gpio_regs *regs = priv->regs; |
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setbits_le32(®s->io_conf, BIT(gpio)); |
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return 0; |
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} |
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static int mvebu_gpio_direction_output(struct udevice *dev, unsigned gpio, |
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int value) |
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{ |
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struct mvebu_gpio_priv *priv = dev_get_priv(dev); |
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struct mvebu_gpio_regs *regs = priv->regs; |
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clrbits_le32(®s->io_conf, BIT(gpio)); |
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return 0; |
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} |
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static int mvebu_gpio_get_function(struct udevice *dev, unsigned gpio) |
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{ |
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struct mvebu_gpio_priv *priv = dev_get_priv(dev); |
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struct mvebu_gpio_regs *regs = priv->regs; |
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u32 val; |
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val = readl(®s->io_conf) & BIT(gpio); |
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if (val) |
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return GPIOF_INPUT; |
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else |
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return GPIOF_OUTPUT; |
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} |
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static int mvebu_gpio_set_value(struct udevice *dev, unsigned gpio, |
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int value) |
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{ |
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struct mvebu_gpio_priv *priv = dev_get_priv(dev); |
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struct mvebu_gpio_regs *regs = priv->regs; |
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if (value) |
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setbits_le32(®s->data_out, BIT(gpio)); |
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else |
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clrbits_le32(®s->data_out, BIT(gpio)); |
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return 0; |
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} |
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static int mvebu_gpio_get_value(struct udevice *dev, unsigned gpio) |
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{ |
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struct mvebu_gpio_priv *priv = dev_get_priv(dev); |
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struct mvebu_gpio_regs *regs = priv->regs; |
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return !!(readl(®s->data_in) & BIT(gpio)); |
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} |
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static int mvebu_gpio_probe(struct udevice *dev) |
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{ |
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
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struct mvebu_gpio_priv *priv = dev_get_priv(dev); |
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priv->regs = (struct mvebu_gpio_regs *)dev_get_addr(dev); |
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uc_priv->gpio_count = MVEBU_GPIOS_PER_BANK; |
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priv->name[0] = 'A' + dev->req_seq; |
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uc_priv->bank_name = priv->name; |
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return 0; |
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} |
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static const struct dm_gpio_ops mvebu_gpio_ops = { |
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.direction_input = mvebu_gpio_direction_input, |
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.direction_output = mvebu_gpio_direction_output, |
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.get_function = mvebu_gpio_get_function, |
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.get_value = mvebu_gpio_get_value, |
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.set_value = mvebu_gpio_set_value, |
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}; |
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static const struct udevice_id mvebu_gpio_ids[] = { |
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{ .compatible = "marvell,orion-gpio" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(gpio_mvebu) = { |
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.name = "gpio_mvebu", |
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.id = UCLASS_GPIO, |
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.of_match = mvebu_gpio_ids, |
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.ops = &mvebu_gpio_ops, |
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.probe = mvebu_gpio_probe, |
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.priv_auto_alloc_size = sizeof(struct mvebu_gpio_priv), |
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}; |
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