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@ -26,6 +26,10 @@ DECLARE_GLOBAL_DATA_PTR; |
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#define REG_BCM6328_OTP 0x62c |
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#define BCM6328_TP1_DISABLED BIT(9) |
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#define REG_BCM6318_STRAP_OVRDBUS 0x900 |
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#define OVRDBUS_6318_FREQ_SHIFT 23 |
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#define OVRDBUS_6318_FREQ_MASK (0x3 << OVRDBUS_6318_FREQ_SHIFT) |
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#define REG_BCM6328_MISC_STRAPBUS 0x1a40 |
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#define STRAPBUS_6328_FCVO_SHIFT 7 |
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#define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) |
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@ -112,6 +116,28 @@ static ulong bcm3380_get_cpu_freq(struct bmips_cpu_priv *priv) |
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return 333000000; |
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} |
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static ulong bcm6318_get_cpu_freq(struct bmips_cpu_priv *priv) |
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{ |
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unsigned int mips_pll_fcvo; |
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mips_pll_fcvo = readl_be(priv->regs + REG_BCM6318_STRAP_OVRDBUS); |
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mips_pll_fcvo = (mips_pll_fcvo & OVRDBUS_6318_FREQ_MASK) |
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>> OVRDBUS_6318_FREQ_SHIFT; |
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switch (mips_pll_fcvo) { |
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case 0: |
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return 166000000; |
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case 1: |
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return 400000000; |
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case 2: |
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return 250000000; |
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case 3: |
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return 333000000; |
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default: |
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return 0; |
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} |
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} |
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static ulong bcm6328_get_cpu_freq(struct bmips_cpu_priv *priv) |
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{ |
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unsigned int mips_pll_fcvo; |
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@ -233,6 +259,12 @@ static const struct bmips_cpu_hw bmips_cpu_bcm3380 = { |
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.get_cpu_count = bcm6358_get_cpu_count, |
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}; |
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static const struct bmips_cpu_hw bmips_cpu_bcm6318 = { |
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.get_cpu_desc = bmips_short_cpu_desc, |
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.get_cpu_freq = bcm6318_get_cpu_freq, |
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.get_cpu_count = bcm6345_get_cpu_count, |
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}; |
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static const struct bmips_cpu_hw bmips_cpu_bcm6328 = { |
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.get_cpu_desc = bmips_long_cpu_desc, |
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.get_cpu_freq = bcm6328_get_cpu_freq, |
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@ -348,6 +380,9 @@ static const struct udevice_id bmips_cpu_ids[] = { |
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.compatible = "brcm,bcm3380-cpu", |
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.data = (ulong)&bmips_cpu_bcm3380, |
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}, { |
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.compatible = "brcm,bcm6318-cpu", |
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.data = (ulong)&bmips_cpu_bcm6318, |
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}, { |
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.compatible = "brcm,bcm6328-cpu", |
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.data = (ulong)&bmips_cpu_bcm6328, |
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}, { |
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