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mpc85xx: configs - Add hash command in freescale platforms

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Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
master
Ruchika Gupta 10 years ago committed by York Sun
parent b9eebfade9
commit 737537ef0c
13 changed files with 91 additions and 0 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 7
      include/configs/B4860QDS.h
  2. 7
      include/configs/BSC9131RDB.h
  3. 7
      include/configs/BSC9132QDS.h
  4. 7
      include/configs/C29XPCIE.h
  5. 7
      include/configs/P1010RDB.h
  6. 7
      include/configs/P2041RDB.h
  7. 7
      include/configs/T1040QDS.h
  8. 7
      include/configs/T104xRDB.h
  9. 7
      include/configs/T208xQDS.h
  10. 7
      include/configs/T208xRDB.h
  11. 7
      include/configs/T4240QDS.h
  12. 7
      include/configs/T4240RDB.h
  13. 7
      include/configs/corenet_ds.h

7
include/configs/B4860QDS.h
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@ -82,6 +82,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
@ -759,6 +760,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* USB
*/

7
include/configs/BSC9131RDB.h
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@ -55,6 +55,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_TSEC_ENET
@ -382,6 +383,12 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
#define CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI

7
include/configs/BSC9132QDS.h
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@ -78,6 +78,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#define CONFIG_PCI /* Enable PCI/PCIE */
@ -598,6 +599,12 @@ combinations. this should be removed later
#define CONFIG_DOS_PARTITION
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/C29XPCIE.h
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@ -86,6 +86,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#define CONFIG_PCI /* Enable PCI/PCIE */
@ -506,6 +507,12 @@
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/P1010RDB.h
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@ -170,6 +170,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#define CONFIG_PCI /* Enable PCI/PCIE */
@ -832,6 +833,12 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_DOS_PARTITION
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/P2041RDB.h
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@ -49,6 +49,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
@ -647,6 +648,12 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_DOS_PARTITION
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/T1040QDS.h
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@ -58,6 +58,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controler 1 */
@ -716,6 +717,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/T104xRDB.h
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@ -113,6 +113,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controler 1 */
@ -731,6 +732,12 @@
#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/T208xQDS.h
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@ -44,6 +44,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
@ -777,6 +778,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/T208xRDB.h
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@ -37,6 +37,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
@ -736,6 +737,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

7
include/configs/T4240QDS.h
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@ -15,6 +15,7 @@
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
@ -506,6 +507,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* USB
*/

7
include/configs/T4240RDB.h
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@ -47,6 +47,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
@ -668,6 +669,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DOS_PARTITION
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
#define __USB_PHY_TYPE utmi

7
include/configs/corenet_ds.h
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@ -57,6 +57,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
@ -648,6 +649,12 @@
#define CONFIG_DOS_PARTITION
#endif
/* Hash command with SHA acceleration supported in hardware */
#ifdef CONFIG_FSL_CAAM
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif
/*
* Miscellaneous configurable options
*/

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