85xx: Add L2SRAM Register's macro definition

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
master
Mingkai Hu 15 years ago committed by Kumar Gala
parent 158c6724c9
commit 76b474e2f5
  1. 5
      cpu/mpc85xx/cpu_init.c
  2. 5
      include/asm-ppc/immap_85xx.h

@ -330,11 +330,12 @@ int cpu_init_r(void)
break;
}
if (l2cache->l2ctl & 0x80000000) {
if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) {
puts("already enabled");
l2srbar = l2cache->l2srbar0;
#ifdef CONFIG_SYS_INIT_L2_ADDR
if (l2cache->l2ctl & 0x00010000 && l2srbar >= CONFIG_SYS_FLASH_BASE) {
if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE
&& l2srbar >= CONFIG_SYS_FLASH_BASE) {
l2srbar = CONFIG_SYS_INIT_L2_ADDR;
l2cache->l2srbar0 = l2srbar;
printf("moving to 0x%08x", CONFIG_SYS_INIT_L2_ADDR);

@ -411,6 +411,11 @@ typedef struct ccsr_l2cache {
char res15[420];
} ccsr_l2cache_t;
#define MPC85xx_L2CTL_L2E 0x80000000
#define MPC85xx_L2CTL_L2SRAM_ENTIRE 0x00010000
#define MPC85xx_L2ERRDIS_MBECC 0x00000008
#define MPC85xx_L2ERRDIS_SBECC 0x00000004
/*
* DMA Registers(0x2_1000-0x2_2000)
*/

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