e1000e : Correct Rx Threshold granularity

In e1000e driver, Rx descriptor queue is used such that hardware can add only
one descriptor at a time. So the WTHRESH granularity in RXDCTL should be set
to single descriptor. This would ensure that every time controller fills a Rx
descriptor, it is flushed to host memory. Earlier this granularity was in
cache line units i.e 2 descriptors. This leads to controller always waiting
for 2 descriptors before flushing them out. But since not more than one Rx BD
is actually available , the accumulation condition never gets hit.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
master
Ruchika Gupta 12 years ago committed by Joe Hershberger
parent ebbf0d20aa
commit 776e66e8f1
  1. 10
      drivers/net/e1000.c
  2. 1
      drivers/net/e1000.h

@ -1688,6 +1688,16 @@ e1000_init_hw(struct eth_device *nic)
E1000_WRITE_REG(hw, TXDCTL, ctrl);
}
/* Set the receive descriptor write back policy */
if (hw->mac_type >= e1000_82571) {
ctrl = E1000_READ_REG(hw, RXDCTL);
ctrl =
(ctrl & ~E1000_RXDCTL_WTHRESH) |
E1000_RXDCTL_FULL_RX_DESC_WB;
E1000_WRITE_REG(hw, RXDCTL, ctrl);
}
switch (hw->mac_type) {
default:
break;

@ -1551,6 +1551,7 @@ struct e1000_hw {
#define E1000_RXDCTL_HTHRESH 0x00003F00 /* RXDCTL Host Threshold */
#define E1000_RXDCTL_WTHRESH 0x003F0000 /* RXDCTL Writeback Threshold */
#define E1000_RXDCTL_GRAN 0x01000000 /* RXDCTL Granularity */
#define E1000_RXDCTL_FULL_RX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
/* Transmit Descriptor Control */
#define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */

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