powerpc: P2010: Drop configuration for P2010

P2010 is a single-core version of P2020. There is no P2010 target
configured. Drop related macros. P2010 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>

arch/powerpc/cpu/mpc85xx/Makefile

@@ -80,7 +80,6 @@ obj-$(CONFIG_ARCH_P1022)	+= p1022_serdes.o
 obj-$(CONFIG_ARCH_P1023)	+= p1023_serdes.o
 obj-$(CONFIG_ARCH_P1024)	+= p1021_serdes.o
 obj-$(CONFIG_ARCH_P1025)	+= p1021_serdes.o
-obj-$(CONFIG_P2010)	+= p2020_serdes.o
 obj-$(CONFIG_ARCH_P2020)	+= p2020_serdes.o
 obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
 obj-$(CONFIG_PPC_P3041) += p3041_serdes.o

arch/powerpc/include/asm/config_mpc85xx.h

@@ -282,19 +282,6 @@
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
-/* P2010 is single core version of P2020 */
-#elif defined(CONFIG_P2010)
-#define CONFIG_MAX_CPUS			1
-#define CONFIG_SYS_FSL_NUM_LAWS		12
-#define CONFIG_SYS_PPC_E500_DEBUG_TLB	2
-#define CONFIG_SYS_FSL_SEC_COMPAT	2
-#define CONFIG_USB_MAX_CONTROLLER_COUNT	1
-#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
-#define CONFIG_SYS_FSL_ERRATUM_A004508
-#define CONFIG_SYS_FSL_ERRATUM_A005125
-
 #elif defined(CONFIG_ARCH_P2020)
 #define CONFIG_MAX_CPUS			2
 #define CONFIG_SYS_FSL_NUM_LAWS		12

doc/README.mpc85xx-sd-spi-boot

@@ -57,13 +57,11 @@ Please see the SoC reference manual for more documentation.
 
 P1022DS		config_sram_p1022ds.dat
 P2020DS		config_sram_p2020ds.dat
-P2010DS		config_sram_p2020ds.dat
 P1020RDB	config_ddr2_1g_p1020rdb_533M.dat
 P1020RDB	config_ddr2_1g_p1020rdb_667M.dat
 P2020RDB	config_ddr2_1g_p2020rdb_800M.dat
 P2020RDB	config_ddr2_1g_p2020rdb_667M.dat
 P2020RDB	config_ddr3_1gb_64bit_p2020rdb_pc.dat
-P2010RDB	config_ddr3_1gb_64bit_p2020rdb_pc.dat
 P1020RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
 P1011RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
 P1010RDB	config_ddr3_1gb_p1010rdb_800M.dat