Kumar Gala
19 years ago
commit
7958202031
@ -0,0 +1,123 @@ |
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/*
|
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* (C) Copyright 2005 |
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* Matthias Fuchs, esd GmbH Germany, matthias.fuchs@esd-electronics.com |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <command.h> |
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#if (CONFIG_COMMANDS & CFG_CMD_BSP) |
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extern int do_bootm (cmd_tbl_t *, int, int, char *[]); |
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extern int do_autoscript (cmd_tbl_t *, int, int, char *[]); |
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#define ADDRMASK 0xfffff000 |
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/*
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* Command loadpci: wait for signal from host and boot image. |
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*/ |
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int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
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{ |
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unsigned int *ptr = 0; |
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int count = 0; |
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int count2 = 0; |
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char addr[16]; |
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char str[] = "\\|/-"; |
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char *local_args[2]; |
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|
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while(1) { |
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/*
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* Mark sync address |
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*/ |
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ptr = 0; |
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memset(ptr, 0, 0x20); |
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*ptr = 0xffffffff; |
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puts("\nWaiting for action from pci host -"); |
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|
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/*
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* Wait for host to write the start address |
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*/ |
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while (*ptr == 0xffffffff) { |
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count++; |
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if (!(count % 100)) { |
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count2++; |
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putc(0x08); /* backspace */ |
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putc(str[count2 % 4]); |
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} |
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/* Abort if ctrl-c was pressed */ |
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if (ctrlc()) { |
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puts("\nAbort\n"); |
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return 0; |
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} |
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udelay(1000); |
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} |
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printf("\nGot bootcode %08x: ", *ptr); |
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sprintf(addr, "%08x", *ptr & ADDRMASK); |
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switch (*ptr & ~ADDRMASK) { |
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case 0: |
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/*
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* Boot image via bootm |
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*/ |
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printf("booting image at addr 0x%s ...\n", addr); |
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setenv("loadaddr", addr); |
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do_bootm (cmdtp, 0, 0, NULL); |
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break; |
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case 1: |
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/*
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* Boot image via autoscr |
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*/ |
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printf("executing script at addr 0x%s ...\n", addr); |
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local_args[0] = addr; |
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local_args[1] = NULL; |
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do_autoscript(cmdtp, 0, 1, local_args); |
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break; |
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case 2: |
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/*
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* Call run_cmd |
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*/ |
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printf("running command at addr 0x%s ...\n", addr); |
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run_command ((char*)(*ptr & ADDRMASK), 0); |
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break; |
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default: |
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printf("unhandled boot method\n"); |
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break; |
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} |
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} |
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} |
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U_BOOT_CMD( |
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loadpci, 1, 1, do_loadpci, |
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"loadpci - Wait for pci bootcmd and boot it\n", |
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NULL |
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); |
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#endif |
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@ -1,763 +0,0 @@ |
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/*
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* (C) Copyright 2002 |
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* Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/processor.h> |
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#include <asm/cache.h> |
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#undef DEBUG_FLASH |
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/*
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* This file implements a Common Flash Interface (CFI) driver for U-Boot. |
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* The width of the port and the width of the chips are determined at initialization. |
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* These widths are used to calculate the address for access CFI data structures. |
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* It has been tested on an Intel Strataflash implementation. |
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* |
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* References |
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* JEDEC Standard JESD68 - Common Flash Interface (CFI) |
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* JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes |
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* Intel Application Note 646 Common Flash Interface (CFI) and Command Sets |
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* Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet |
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* |
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* TODO |
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* Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available |
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* Add support for other command sets Use the PRI and ALT to determine command set |
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* Verify erase and program timeouts. |
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*/ |
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#define FLASH_CMD_CFI 0x98 |
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#define FLASH_CMD_READ_ID 0x90 |
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#define FLASH_CMD_RESET 0xff |
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#define FLASH_CMD_BLOCK_ERASE 0x20 |
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#define FLASH_CMD_ERASE_CONFIRM 0xD0 |
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#define FLASH_CMD_WRITE 0x40 |
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#define FLASH_CMD_PROTECT 0x60 |
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#define FLASH_CMD_PROTECT_SET 0x01 |
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#define FLASH_CMD_PROTECT_CLEAR 0xD0 |
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#define FLASH_CMD_CLEAR_STATUS 0x50 |
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#define FLASH_CMD_WRITE_TO_BUFFER 0xE8 |
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#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 |
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#define FLASH_STATUS_DONE 0x80 |
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#define FLASH_STATUS_ESS 0x40 |
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#define FLASH_STATUS_ECLBS 0x20 |
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#define FLASH_STATUS_PSLBS 0x10 |
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#define FLASH_STATUS_VPENS 0x08 |
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#define FLASH_STATUS_PSS 0x04 |
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#define FLASH_STATUS_DPS 0x02 |
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#define FLASH_STATUS_R 0x01 |
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#define FLASH_STATUS_PROTECT 0x01 |
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#define FLASH_OFFSET_CFI 0x55 |
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#define FLASH_OFFSET_CFI_RESP 0x10 |
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#define FLASH_OFFSET_WTOUT 0x1F |
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#define FLASH_OFFSET_WBTOUT 0x20 |
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#define FLASH_OFFSET_ETOUT 0x21 |
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#define FLASH_OFFSET_CETOUT 0x22 |
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#define FLASH_OFFSET_WMAX_TOUT 0x23 |
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#define FLASH_OFFSET_WBMAX_TOUT 0x24 |
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#define FLASH_OFFSET_EMAX_TOUT 0x25 |
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#define FLASH_OFFSET_CEMAX_TOUT 0x26 |
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#define FLASH_OFFSET_SIZE 0x27 |
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#define FLASH_OFFSET_INTERFACE 0x28 |
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#define FLASH_OFFSET_BUFFER_SIZE 0x2A |
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#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C |
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#define FLASH_OFFSET_ERASE_REGIONS 0x2D |
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#define FLASH_OFFSET_PROTECT 0x02 |
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#define FLASH_OFFSET_USER_PROTECTION 0x85 |
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#define FLASH_OFFSET_INTEL_PROTECTION 0x81 |
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#define FLASH_MAN_CFI 0x01000000 |
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typedef union { |
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unsigned char c; |
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unsigned short w; |
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unsigned long l; |
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} cfiword_t; |
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typedef union { |
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unsigned char * cp; |
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unsigned short *wp; |
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unsigned long *lp; |
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} cfiptr_t; |
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#define NUM_ERASE_REGIONS 4 |
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
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/*-----------------------------------------------------------------------
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* Functions |
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*/ |
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static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c); |
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static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf); |
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static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd); |
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static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd); |
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static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd); |
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static int flash_detect_cfi(flash_info_t * info); |
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static ulong flash_get_size (ulong base, int banknum); |
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static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword); |
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static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt); |
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#ifdef CFG_FLASH_USE_BUFFER_WRITE |
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static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len); |
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#endif |
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/*-----------------------------------------------------------------------
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* create an address based on the offset and the port width |
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*/ |
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inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset) |
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{ |
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return ((uchar *)(info->start[sect] + (offset * info->portwidth))); |
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} |
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/*-----------------------------------------------------------------------
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* read a character at a port width address |
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*/ |
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inline uchar flash_read_uchar(flash_info_t * info, uchar offset) |
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{ |
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uchar *cp; |
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cp = flash_make_addr(info, 0, offset); |
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return (cp[info->portwidth - 1]); |
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} |
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|
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/*-----------------------------------------------------------------------
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* read a short word by swapping for ppc format. |
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*/ |
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ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset) |
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{ |
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uchar * addr; |
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addr = flash_make_addr(info, sect, offset); |
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return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]); |
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} |
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|
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/*-----------------------------------------------------------------------
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* read a long word by picking the least significant byte of each maiximum |
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* port size word. Swap for ppc format. |
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*/ |
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ulong flash_read_long(flash_info_t * info, int sect, uchar offset) |
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{ |
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uchar * addr; |
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addr = flash_make_addr(info, sect, offset); |
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return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) | |
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(addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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unsigned long flash_init (void) |
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{ |
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unsigned long size; |
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int i; |
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unsigned long address; |
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|
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/* The flash is positioned back to back, with the demultiplexing of the chip
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* based on the A24 address line. |
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* |
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*/ |
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address = CFG_FLASH_BASE; |
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size = 0; |
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/* Init: no FLASHes known */ |
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for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { |
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flash_info[i].flash_id = FLASH_UNKNOWN; |
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size += flash_info[i].size = flash_get_size(address, i); |
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address += CFG_FLASH_INCREMENT; |
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if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
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printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i, |
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flash_info[0].size, flash_info[i].size<<20); |
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} |
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} |
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#if 0 /* test-only */
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/* Monitor protection ON by default */ |
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#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) |
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for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+monitor_flash_len-1; i++) |
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(void)flash_real_protect(&flash_info[0], i, 1); |
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#endif |
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#endif |
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return (size); |
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} |
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|
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/*-----------------------------------------------------------------------
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*/ |
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int flash_erase (flash_info_t *info, int s_first, int s_last) |
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{ |
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int rcode = 0; |
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int prot; |
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int sect; |
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if( info->flash_id != FLASH_MAN_CFI) { |
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printf ("Can't erase unknown flash type - aborted\n"); |
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return 1; |
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} |
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if ((s_first < 0) || (s_first > s_last)) { |
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printf ("- no sectors to erase\n"); |
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return 1; |
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} |
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|
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prot = 0; |
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for (sect=s_first; sect<=s_last; ++sect) { |
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if (info->protect[sect]) { |
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prot++; |
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} |
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} |
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if (prot) { |
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printf ("- Warning: %d protected sectors will not be erased!\n", |
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prot); |
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} else { |
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printf ("\n"); |
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} |
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|
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|
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for (sect = s_first; sect<=s_last; sect++) { |
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if (info->protect[sect] == 0) { /* not protected */ |
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flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS); |
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flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE); |
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flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM); |
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|
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if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) { |
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rcode = 1; |
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} else |
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printf("."); |
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} |
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} |
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printf (" done\n"); |
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return rcode; |
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} |
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|
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/*-----------------------------------------------------------------------
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*/ |
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void flash_print_info (flash_info_t *info) |
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{ |
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int i; |
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|
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if (info->flash_id != FLASH_MAN_CFI) { |
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printf ("missing or unknown FLASH type\n"); |
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return; |
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} |
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|
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printf("CFI conformant FLASH (%d x %d)", |
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(info->portwidth << 3 ), (info->chipwidth << 3 )); |
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printf (" Size: %ld MB in %d Sectors\n", |
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info->size >> 20, info->sector_count); |
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printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", |
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info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size); |
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|
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printf (" Sector Start Addresses:"); |
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for (i=0; i<info->sector_count; ++i) { |
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if ((i % 5) == 0) |
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printf ("\n"); |
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printf (" %08lX%5s", |
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info->start[i], |
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info->protect[i] ? " (RO)" : " " |
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); |
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} |
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printf ("\n"); |
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return; |
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} |
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|
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/*-----------------------------------------------------------------------
|
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* Copy memory to flash, returns: |
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* 0 - OK |
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* 1 - write timeout |
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* 2 - Flash not erased |
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*/ |
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
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{ |
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ulong wp; |
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ulong cp; |
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int aln; |
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cfiword_t cword; |
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int i, rc; |
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|
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/* get lower aligned address */ |
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wp = (addr & ~(info->portwidth - 1)); |
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|
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/* handle unaligned start */ |
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if((aln = addr - wp) != 0) { |
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cword.l = 0; |
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cp = wp; |
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for(i=0;i<aln; ++i, ++cp) |
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flash_add_byte(info, &cword, (*(uchar *)cp)); |
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|
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for(; (i< info->portwidth) && (cnt > 0) ; i++) { |
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flash_add_byte(info, &cword, *src++); |
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cnt--; |
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cp++; |
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} |
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for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp) |
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flash_add_byte(info, &cword, (*(uchar *)cp)); |
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if((rc = flash_write_cfiword(info, wp, cword)) != 0) |
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return rc; |
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wp = cp; |
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} |
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|
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#ifdef CFG_FLASH_USE_BUFFER_WRITE |
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while(cnt >= info->portwidth) { |
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i = info->buffer_size > cnt? cnt: info->buffer_size; |
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if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK) |
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return rc; |
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wp += i; |
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src += i; |
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cnt -=i; |
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} |
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#else |
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/* handle the aligned part */ |
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while(cnt >= info->portwidth) { |
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cword.l = 0; |
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for(i = 0; i < info->portwidth; i++) { |
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flash_add_byte(info, &cword, *src++); |
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} |
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if((rc = flash_write_cfiword(info, wp, cword)) != 0) |
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return rc; |
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wp += info->portwidth; |
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cnt -= info->portwidth; |
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} |
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#endif /* CFG_FLASH_USE_BUFFER_WRITE */ |
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if (cnt == 0) { |
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return (0); |
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} |
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|
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/*
|
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* handle unaligned tail bytes |
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*/ |
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cword.l = 0; |
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for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) { |
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flash_add_byte(info, &cword, *src++); |
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--cnt; |
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} |
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for (; i<info->portwidth; ++i, ++cp) { |
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flash_add_byte(info, & cword, (*(uchar *)cp)); |
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} |
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|
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return flash_write_cfiword(info, wp, cword); |
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} |
||||
|
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/*-----------------------------------------------------------------------
|
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*/ |
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int flash_real_protect(flash_info_t *info, long sector, int prot) |
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{ |
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int retcode = 0; |
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|
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flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
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flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT); |
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if(prot) |
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flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET); |
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else |
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flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR); |
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|
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if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout, |
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prot?"protect":"unprotect")) == 0) { |
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|
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info->protect[sector] = prot; |
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/* Intel's unprotect unprotects all locking */ |
||||
if(prot == 0) { |
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int i; |
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for(i = 0 ; i<info->sector_count; i++) { |
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if(info->protect[i]) |
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flash_real_protect(info, i, 1); |
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} |
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} |
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} |
||||
|
||||
return retcode; |
||||
} |
||||
/*-----------------------------------------------------------------------
|
||||
* wait for XSR.7 to be set. Time out with an error if it does not. |
||||
* This routine does not set the flash to read-array mode. |
||||
*/ |
||||
static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt) |
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{ |
||||
ulong start; |
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|
||||
/* Wait for command completion */ |
||||
start = get_timer (0); |
||||
while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) { |
||||
if (get_timer(start) > info->erase_blk_tout) { |
||||
printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]); |
||||
flash_write_cmd(info, sector, 0, FLASH_CMD_RESET); |
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return ERR_TIMOUT; |
||||
} |
||||
} |
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return ERR_OK; |
||||
} |
||||
/*-----------------------------------------------------------------------
|
||||
* Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check. |
||||
* This routine sets the flash to read-array mode. |
||||
*/ |
||||
static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt) |
||||
{ |
||||
int retcode; |
||||
retcode = flash_status_check(info, sector, tout, prompt); |
||||
if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) { |
||||
retcode = ERR_INVAL; |
||||
printf("Flash %s error at address %lx\n", prompt,info->start[sector]); |
||||
if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){ |
||||
printf("Command Sequence Error.\n"); |
||||
} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){ |
||||
printf("Block Erase Error.\n"); |
||||
retcode = ERR_NOT_ERASED; |
||||
} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) { |
||||
printf("Locking Error\n"); |
||||
} |
||||
if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){ |
||||
printf("Block locked.\n"); |
||||
retcode = ERR_PROTECTED; |
||||
} |
||||
if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS)) |
||||
printf("Vpp Low Error.\n"); |
||||
} |
||||
flash_write_cmd(info, sector, 0, FLASH_CMD_RESET); |
||||
return retcode; |
||||
} |
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c) |
||||
{ |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
cword->c = c; |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
cword->w = (cword->w << 8) | c; |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
cword->l = (cword->l << 8) | c; |
||||
} |
||||
} |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* make a proper sized command based on the port and chip widths |
||||
*/ |
||||
static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf) |
||||
{ |
||||
int i; |
||||
uchar *cp = (uchar *)cmdbuf; |
||||
for(i=0; i< info->portwidth; i++) |
||||
*cp++ = ((i+1) % info->chipwidth) ? '\0':cmd; |
||||
} |
||||
|
||||
/*
|
||||
* Write a proper sized command to the correct address |
||||
*/ |
||||
static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd) |
||||
{ |
||||
|
||||
volatile cfiptr_t addr; |
||||
cfiword_t cword; |
||||
addr.cp = flash_make_addr(info, sect, offset); |
||||
flash_make_cmd(info, cmd, &cword); |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
*addr.cp = cword.c; |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
*addr.wp = cword.w; |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
*addr.lp = cword.l; |
||||
break; |
||||
} |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd) |
||||
{ |
||||
cfiptr_t cptr; |
||||
cfiword_t cword; |
||||
int retval; |
||||
cptr.cp = flash_make_addr(info, sect, offset); |
||||
flash_make_cmd(info, cmd, &cword); |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
retval = (cptr.cp[0] == cword.c); |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
retval = (cptr.wp[0] == cword.w); |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
retval = (cptr.lp[0] == cword.l); |
||||
break; |
||||
default: |
||||
retval = 0; |
||||
break; |
||||
} |
||||
return retval; |
||||
} |
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd) |
||||
{ |
||||
cfiptr_t cptr; |
||||
cfiword_t cword; |
||||
int retval; |
||||
cptr.cp = flash_make_addr(info, sect, offset); |
||||
flash_make_cmd(info, cmd, &cword); |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
retval = ((cptr.cp[0] & cword.c) == cword.c); |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
retval = ((cptr.wp[0] & cword.w) == cword.w); |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
retval = ((cptr.lp[0] & cword.l) == cword.l); |
||||
break; |
||||
default: |
||||
retval = 0; |
||||
break; |
||||
} |
||||
return retval; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* detect if flash is compatible with the Common Flash Interface (CFI) |
||||
* http://www.jedec.org/download/search/jesd68.pdf
|
||||
* |
||||
*/ |
||||
static int flash_detect_cfi(flash_info_t * info) |
||||
{ |
||||
|
||||
for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT; |
||||
info->portwidth <<= 1) { |
||||
for(info->chipwidth =FLASH_CFI_BY8; |
||||
info->chipwidth <= info->portwidth; |
||||
info->chipwidth <<= 1) { |
||||
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
||||
flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI); |
||||
if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') && |
||||
flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') && |
||||
flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) |
||||
return 1; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
/*
|
||||
* The following code cannot be run from FLASH! |
||||
* |
||||
*/ |
||||
static ulong flash_get_size (ulong base, int banknum) |
||||
{ |
||||
flash_info_t * info = &flash_info[banknum]; |
||||
int i, j; |
||||
int sect_cnt; |
||||
unsigned long sector; |
||||
unsigned long tmp; |
||||
int size_ratio = 0; |
||||
uchar num_erase_regions; |
||||
int erase_region_size; |
||||
int erase_region_count; |
||||
|
||||
info->start[0] = base; |
||||
|
||||
invalidate_dcache_range(base, base+0x400); |
||||
|
||||
if(flash_detect_cfi(info)){ |
||||
|
||||
size_ratio = info->portwidth / info->chipwidth; |
||||
num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS); |
||||
|
||||
sect_cnt = 0; |
||||
sector = base; |
||||
for(i = 0 ; i < num_erase_regions; i++) { |
||||
if(i > NUM_ERASE_REGIONS) { |
||||
printf("%d erase regions found, only %d used\n", |
||||
num_erase_regions, NUM_ERASE_REGIONS); |
||||
break; |
||||
} |
||||
tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS); |
||||
erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128; |
||||
tmp >>= 16; |
||||
erase_region_count = (tmp & 0xffff) +1; |
||||
for(j = 0; j< erase_region_count; j++) { |
||||
info->start[sect_cnt] = sector; |
||||
sector += (erase_region_size * size_ratio); |
||||
info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT); |
||||
sect_cnt++; |
||||
} |
||||
} |
||||
|
||||
info->sector_count = sect_cnt; |
||||
/* multiply the size by the number of chips */ |
||||
info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio; |
||||
info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE)); |
||||
tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT); |
||||
info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT))); |
||||
tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT); |
||||
info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT))); |
||||
tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT); |
||||
info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000; |
||||
info->flash_id = FLASH_MAN_CFI; |
||||
} |
||||
|
||||
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
||||
#ifdef DEBUG_FLASH |
||||
printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */ |
||||
#endif |
||||
#ifdef DEBUG_FLASH |
||||
printf("found %d erase regions\n", num_erase_regions); |
||||
#endif |
||||
#ifdef DEBUG_FLASH |
||||
printf("size=%08x sectors=%08x \n", info->size, info->sector_count); |
||||
#endif |
||||
return(info->size); |
||||
} |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword) |
||||
{ |
||||
|
||||
cfiptr_t ctladdr; |
||||
cfiptr_t cptr; |
||||
int flag; |
||||
|
||||
ctladdr.cp = flash_make_addr(info, 0, 0); |
||||
cptr.cp = (uchar *)dest; |
||||
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
flag = ((cptr.cp[0] & cword.c) == cword.c); |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
flag = ((cptr.wp[0] & cword.w) == cword.w); |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
flag = ((cptr.lp[0] & cword.l) == cword.l); |
||||
break; |
||||
default: |
||||
return 2; |
||||
} |
||||
if(!flag) |
||||
return 2; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS); |
||||
flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE); |
||||
|
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
cptr.cp[0] = cword.c; |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
cptr.wp[0] = cword.w; |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
cptr.lp[0] = cword.l; |
||||
break; |
||||
} |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if(flag) |
||||
enable_interrupts(); |
||||
|
||||
return flash_full_status_check(info, 0, info->write_tout, "write"); |
||||
} |
||||
|
||||
#ifdef CFG_FLASH_USE_BUFFER_WRITE |
||||
|
||||
/* loop through the sectors from the highest address
|
||||
* when the passed address is greater or equal to the sector address |
||||
* we have a match |
||||
*/ |
||||
static int find_sector(flash_info_t *info, ulong addr) |
||||
{ |
||||
int sector; |
||||
for(sector = info->sector_count - 1; sector >= 0; sector--) { |
||||
if(addr >= info->start[sector]) |
||||
break; |
||||
} |
||||
return sector; |
||||
} |
||||
|
||||
static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len) |
||||
{ |
||||
|
||||
int sector; |
||||
int cnt; |
||||
int retcode; |
||||
volatile cfiptr_t src; |
||||
volatile cfiptr_t dst; |
||||
|
||||
src.cp = cp; |
||||
dst.cp = (uchar *)dest; |
||||
sector = find_sector(info, dest); |
||||
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
||||
flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); |
||||
if((retcode = flash_status_check(info, sector, info->buffer_write_tout, |
||||
"write to buffer")) == ERR_OK) { |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
cnt = len; |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
cnt = len >> 1; |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
cnt = len >> 2; |
||||
break; |
||||
default: |
||||
return ERR_INVAL; |
||||
break; |
||||
} |
||||
flash_write_cmd(info, sector, 0, (uchar)cnt-1); |
||||
while(cnt-- > 0) { |
||||
switch(info->portwidth) { |
||||
case FLASH_CFI_8BIT: |
||||
*dst.cp++ = *src.cp++; |
||||
break; |
||||
case FLASH_CFI_16BIT: |
||||
*dst.wp++ = *src.wp++; |
||||
break; |
||||
case FLASH_CFI_32BIT: |
||||
*dst.lp++ = *src.lp++; |
||||
break; |
||||
default: |
||||
return ERR_INVAL; |
||||
break; |
||||
} |
||||
} |
||||
flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM); |
||||
retcode = flash_full_status_check(info, sector, info->buffer_write_tout, |
||||
"buffer write"); |
||||
} |
||||
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
||||
return retcode; |
||||
} |
||||
#endif /* CFG_USE_FLASH_BUFFER_WRITE */ |
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,373 @@ |
||||
/*
|
||||
* (C) Copyright 2003-2006 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* (C) Copyright 2004-2005 |
||||
* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
|
||||
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
||||
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ |
||||
#define CONFIG_TQM5200 1 /* ... on TQM5200 module */ |
||||
#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */ |
||||
|
||||
#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ |
||||
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
||||
|
||||
#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
||||
#endif |
||||
|
||||
/*
|
||||
* Serial console configuration |
||||
*/ |
||||
#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
||||
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
||||
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
||||
|
||||
/* Partitions */ |
||||
#define CONFIG_MAC_PARTITION |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_ISO_PARTITION |
||||
|
||||
/* POST support */ |
||||
#define CONFIG_POST (CFG_POST_MEMORY | \ |
||||
CFG_POST_CPU | \
|
||||
CFG_POST_I2C) |
||||
|
||||
#ifdef CONFIG_POST |
||||
#define CFG_CMD_POST_DIAG CFG_CMD_DIAG |
||||
/* preserve space for the post_word at end of on-chip SRAM */ |
||||
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4 |
||||
#else |
||||
#define CFG_CMD_POST_DIAG 0 |
||||
#endif |
||||
|
||||
/*
|
||||
* Supported commands |
||||
*/ |
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ |
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_DATE | \
|
||||
CFG_CMD_DHCP | \
|
||||
CFG_CMD_ECHO | \
|
||||
CFG_CMD_EEPROM | \
|
||||
CFG_CMD_I2C | \
|
||||
CFG_CMD_JFFS2 | \
|
||||
CFG_CMD_MII | \
|
||||
CFG_CMD_NFS | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_POST_DIAG | \
|
||||
CFG_CMD_REGINFO | \
|
||||
CFG_CMD_SNTP ) |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
#include <cmd_confdefs.h> |
||||
|
||||
#define CONFIG_TIMESTAMP /* display image timestamps */ |
||||
|
||||
#if (TEXT_BASE == 0xFC000000) /* Boot low */ |
||||
# define CFG_LOWBOOT 1 |
||||
#endif |
||||
|
||||
/*
|
||||
* Autobooting |
||||
*/ |
||||
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
||||
|
||||
#define CONFIG_PREBOOT "echo;" \ |
||||
"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
|
||||
"echo" |
||||
|
||||
#undef CONFIG_BOOTARGS |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"netdev=eth0\0" \
|
||||
"rootpath=/opt/eldk/ppc_6xx\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=${serverip}:${rootpath}\0" \
|
||||
"addip=setenv bootargs ${bootargs} " \
|
||||
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
|
||||
":${hostname}:${netdev}:off panic=1\0" \
|
||||
"flash_self=run ramargs addip;" \
|
||||
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
|
||||
"flash_nfs=run nfsargs addip;" \
|
||||
"bootm ${kernel_addr}\0" \
|
||||
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
|
||||
"bootfile=/tftpboot/smmaco4/uImage\0" \
|
||||
"load=tftp 200000 ${u-boot}\0" \
|
||||
"u-boot=/tftpboot/smmaco4/u-boot.bin\0" \
|
||||
"update=protect off FC000000 FC05FFFF;" \
|
||||
"erase FC000000 FC05FFFF;" \
|
||||
"cp.b 200000 FC000000 ${filesize};" \
|
||||
"protect on FC000000 FC05FFFF\0" \
|
||||
"" |
||||
|
||||
#define CONFIG_BOOTCOMMAND "run net_nfs" |
||||
|
||||
/*
|
||||
* IPB Bus clocking configuration. |
||||
*/ |
||||
#define CFG_IPBSPEED_133 /* define for 133MHz speed */ |
||||
|
||||
#if defined(CFG_IPBSPEED_133) |
||||
/*
|
||||
* PCI Bus clocking configuration |
||||
* |
||||
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if |
||||
* CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't |
||||
* been tested with a IPB Bus Clock of 66 MHz. |
||||
*/ |
||||
#define CFG_PCISPEED_66 /* define for 66MHz speed */ |
||||
#endif |
||||
|
||||
/*
|
||||
* I2C configuration |
||||
*/ |
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
||||
#ifdef CONFIG_TQM5200_REV100 |
||||
#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */ |
||||
#else |
||||
#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */ |
||||
#endif |
||||
|
||||
/*
|
||||
* I2C clock frequency |
||||
* |
||||
* Please notice, that the resulting clock frequency could differ from the |
||||
* configured value. This is because the I2C clock is derived from system |
||||
* clock over a frequency divider with only a few divider values. U-boot |
||||
* calculates the best approximation for CFG_I2C_SPEED. However the calculated |
||||
* approximation allways lies below the configured value, never above. |
||||
*/ |
||||
#define CFG_I2C_SPEED 100000 /* 100 kHz */ |
||||
#define CFG_I2C_SLAVE 0x7F |
||||
|
||||
/*
|
||||
* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work |
||||
* also). For other EEPROMs configuration should be verified. On Mini-FAP the |
||||
* EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the |
||||
* same configuration could be used. |
||||
*/ |
||||
#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ |
||||
#define CFG_I2C_EEPROM_ADDR_LEN 2 |
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */ |
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 |
||||
|
||||
/*
|
||||
* Flash configuration |
||||
*/ |
||||
#define CFG_FLASH_BASE TEXT_BASE /* 0xFC000000 */ |
||||
|
||||
/* use CFI flash driver if no module variant is spezified */ |
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */ |
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */ |
||||
#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START } |
||||
#define CFG_FLASH_EMPTY_INFO |
||||
#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */ |
||||
#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */ |
||||
#undef CFG_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */ |
||||
|
||||
#if !defined(CFG_LOWBOOT) |
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00760000 + 0x00800000) |
||||
#else /* CFG_LOWBOOT */ |
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000) |
||||
#endif /* CFG_LOWBOOT */ |
||||
#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks |
||||
(= chip selects) */ |
||||
#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
||||
|
||||
/* Dynamic MTD partition support */ |
||||
#define CONFIG_JFFS2_CMDLINE |
||||
#define MTDIDS_DEFAULT "nor0=TQM5200-0" |
||||
#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ |
||||
"1408k(kernel)," \
|
||||
"2m(initrd)," \
|
||||
"4m(small-fs)," \
|
||||
"16m(big-fs)," \
|
||||
"8m(misc)" |
||||
|
||||
/*
|
||||
* Environment settings |
||||
*/ |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#define CFG_ENV_SIZE 0x10000 |
||||
#define CFG_ENV_SECT_SIZE 0x20000 |
||||
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) |
||||
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
||||
|
||||
/*
|
||||
* Memory map |
||||
*/ |
||||
#define CFG_MBAR 0xF0000000 |
||||
#define CFG_SDRAM_BASE 0x00000000 |
||||
#define CFG_DEFAULT_MBAR 0x80000000 |
||||
|
||||
/* Use ON-Chip SRAM until RAM will be available */ |
||||
#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM |
||||
#ifdef CONFIG_POST |
||||
/* preserve space for the post_word at end of on-chip SRAM */ |
||||
#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE |
||||
#else |
||||
#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE |
||||
#endif |
||||
|
||||
|
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||
|
||||
#define CFG_MONITOR_BASE TEXT_BASE |
||||
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) |
||||
# define CFG_RAMBOOT 1 |
||||
#endif |
||||
|
||||
#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */ |
||||
#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ |
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
|
||||
/*
|
||||
* Ethernet configuration |
||||
*/ |
||||
#define CONFIG_MPC5xxx_FEC 1 |
||||
/*
|
||||
* Define CONFIG_FEC_10MBIT to force FEC at 10Mb |
||||
*/ |
||||
/* #define CONFIG_FEC_10MBIT 1 */ |
||||
#define CONFIG_PHY_ADDR 0x00 |
||||
|
||||
/*
|
||||
* GPIO configuration |
||||
* |
||||
* use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1): |
||||
* Bit 0 (mask: 0x80000000): 1 |
||||
* use ALT CAN position: Bits 2-3 (mask: 0x30000000): |
||||
* 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting. |
||||
* 01 -> CAN1 on I2C1, CAN2 on Tmr0/1. |
||||
* Use for REV200 STK52XX boards. Do not use with REV100 modules |
||||
* (because, there I2C1 is used as I2C bus) |
||||
* use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100 |
||||
* use PSC2 as CAN: Bits 25:27 (mask: 0x00000030) |
||||
* 000 -> All PSC2 pins are GIOPs |
||||
* 001 -> CAN1/2 on PSC2 pins |
||||
* Use for REV100 STK52xx boards |
||||
* use PSC6: |
||||
* on STK52xx: |
||||
* use as UART. Pins PSC6_0 to PSC6_3 are used. |
||||
* Bits 9:11 (mask: 0x00700000): |
||||
* 101 -> PSC6 : Extended POST test is not available |
||||
* on MINI-FAP and TQM5200_IB: |
||||
* use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000): |
||||
* 000 -> PSC6 could not be used as UART, CODEC or IrDA |
||||
* GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST |
||||
* tests. |
||||
*/ |
||||
#if defined (CONFIG_MINIFAP) |
||||
# define CFG_GPS_PORT_CONFIG 0x91000004 |
||||
#elif defined (CONFIG_STK52XX) |
||||
# if defined (CONFIG_STK52XX_REV100) |
||||
# define CFG_GPS_PORT_CONFIG 0x81500014 |
||||
# else /* STK52xx REV200 and above */ |
||||
# if defined (CONFIG_TQM5200_REV100) |
||||
# error TQM5200 REV100 not supported on STK52XX REV200 or above |
||||
# else/* TQM5200 REV200 and above */ |
||||
# define CFG_GPS_PORT_CONFIG 0x91500004 |
||||
# endif |
||||
# endif |
||||
#else /* TMQ5200 Inbetriebnahme-Board */ |
||||
# define CFG_GPS_PORT_CONFIG 0x81000004 |
||||
#endif |
||||
|
||||
/*
|
||||
* RTC configuration |
||||
*/ |
||||
#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CFG_LONGHELP /* undef to save memory */ |
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CFG_MAXARGS 16 /* max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
|
||||
/* Enable an alternate, more extensive memory test */ |
||||
#define CFG_ALT_MEMTEST |
||||
|
||||
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ |
||||
#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
||||
|
||||
#define CFG_LOAD_ADDR 0x100000 /* default load address */ |
||||
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
||||
|
||||
/*
|
||||
* Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined, |
||||
* which is normally part of the default commands (CFV_CMD_DFL) |
||||
*/ |
||||
#define CONFIG_LOOPW |
||||
|
||||
/*
|
||||
* Various low-level settings |
||||
*/ |
||||
#if defined(CONFIG_MPC5200) |
||||
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI |
||||
#define CFG_HID0_FINAL HID0_ICE |
||||
#else |
||||
#define CFG_HID0_INIT 0 |
||||
#define CFG_HID0_FINAL 0 |
||||
#endif |
||||
|
||||
#define CFG_BOOTCS_START CFG_FLASH_BASE |
||||
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE |
||||
#ifdef CFG_PCISPEED_66 |
||||
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ |
||||
#else |
||||
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ |
||||
#endif |
||||
#define CFG_CS0_START CFG_FLASH_BASE |
||||
#define CFG_CS0_SIZE CFG_FLASH_SIZE |
||||
|
||||
#define CFG_CS_BURST 0x00000000 |
||||
#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */ |
||||
|
||||
#define CFG_RESET_ADDRESS 0xff000000 |
||||
|
||||
#endif /* __CONFIG_H */ |
||||
@ -0,0 +1,22 @@ |
||||
#!/bin/sh |
||||
# Print additional version information for non-release trees. |
||||
|
||||
usage() { |
||||
echo "Usage: $0 [srctree]" >&2 |
||||
exit 1 |
||||
} |
||||
|
||||
cd "${1:-.}" || usage |
||||
|
||||
# Check for git and a git repo. |
||||
if head=`git rev-parse --verify HEAD 2>/dev/null`; then |
||||
# Do we have an untagged version? |
||||
if [ "`git name-rev --tags HEAD`" = "HEAD undefined" ]; then |
||||
printf '%s%s' -g `echo "$head" | cut -c1-8` |
||||
fi |
||||
|
||||
# Are there uncommitted changes? |
||||
if git diff-files | read dummy; then |
||||
printf '%s' -dirty |
||||
fi |
||||
fi |
||||
Loading…
Reference in new issue