Convert omap3_logic to ti_omap3_common.h

Convert to using the common config files.

Signed-off-by: Adam Ford <adam.ford@logicpd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
master
Adam Ford 9 years ago committed by Tom Rini
parent 2ec69b881c
commit 7b77b1f63b
  1. 3
      arch/arm/cpu/armv7/omap3/Kconfig
  2. 14
      board/logicpd/omap3som/omap3logic.c
  3. 59
      include/configs/omap3_logic.h

@ -92,6 +92,9 @@ config TARGET_MCX
config TARGET_OMAP3_LOGIC
bool "OMAP3 Logic"
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_OMAP3_MVBLX
bool "OMAP3 MVBLX"

@ -12,6 +12,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <ns16550.h>
#include <netdev.h>
#include <flash.h>
#include <nand.h>
@ -33,6 +35,18 @@ DECLARE_GLOBAL_DATA_PTR;
* machine IDs; row it selected based on CPU column is slected based
* on hsusb0_data5 pin having a pulldown resistor
*/
static const struct ns16550_platdata omap3logic_serial = {
OMAP34XX_UART1,
2,
V_NS16550_CLK
};
U_BOOT_DEVICE(omap3logic_uart) = {
"serial_omap",
&omap3logic_serial
};
static struct board_id {
char *name;
int machine_id;

@ -14,25 +14,16 @@
/*
* High Level Configuration Options
*/
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
#define CONFIG_OMAP_GPIO
#define CONFIG_OMAP_COMMON
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define CONFIG_SYS_TEXT_BASE 0x80400000
#define CONFIG_SDRC /* The chip has SDRC controller */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap.h>
#include <configs/ti_omap3_common.h>
#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
/*
* Display CPU and Board information
*/
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@ -55,25 +46,14 @@
*/
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
/* Sector */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
/*
* Hardware drivers
*/
/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
/*
* select serial console configuration
*/
#undef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
@ -92,7 +72,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_EXT2 /* EXT2 Support */
#define CONFIG_CMD_FAT /* FAT support */
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
@ -120,32 +99,24 @@
/*
* TWL4030
*/
#define CONFIG_TWL4030_POWER
/*
* Board NAND Info.
*/
#define CONFIG_SYS_NAND_BASE NAND_BASE
#define CONFIG_SYS_NAND_QUIET_TEST
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand at */
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
/* NAND devices */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_JFFS2_NAND
/* nand device jffs2 lives on */
#define CONFIG_JFFS2_DEV "nand0"
/* start of jffs2 partition */
#define CONFIG_JFFS2_PART_OFFSET 0x680000
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
/* partition */
/* Environment information */
#define CONFIG_BOOTDELAY 2
/*
* PREBOOT assumes the 4.3" display is attached. User can interrupt
@ -239,17 +210,13 @@
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
/* address */
/*
* OMAP3 has 12 GP timers, they can be driven by the system clock
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
@ -292,12 +259,8 @@
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
/*
* SMSC922x Ethernet

Loading…
Cancel
Save