commit
7e8f270292
@ -0,0 +1,7 @@ |
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# (C) Copyright 2016 Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o
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obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o
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@ -0,0 +1,202 @@ |
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/*
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* (C) Copyright 2009, 2011 Freescale Semiconductor, Inc. |
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* |
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* (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB |
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* |
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* Author: Tor Krill tor@excito.com |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <usb.h> |
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#include <asm/io.h> |
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#include <hwconfig.h> |
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#include <fsl_usb.h> |
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#include <fdt_support.h> |
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#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT |
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
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#endif |
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static const char * const compat_usb_fsl[] = { |
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"fsl-usb2-mph", |
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"fsl-usb2-dr", |
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"snps,dwc3", |
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NULL |
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}; |
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static int fdt_usb_get_node_type(void *blob, int start_offset, |
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int *node_offset, const char **node_type) |
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{ |
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int i; |
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int ret = -ENOENT; |
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for (i = 0; compat_usb_fsl[i]; i++) { |
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*node_offset = fdt_node_offset_by_compatible |
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(blob, start_offset, |
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compat_usb_fsl[i]); |
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if (*node_offset >= 0) { |
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*node_type = compat_usb_fsl[i]; |
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ret = 0; |
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break; |
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} |
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} |
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return ret; |
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} |
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static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode, |
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const char *phy_type, int start_offset) |
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{ |
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const char *prop_mode = "dr_mode"; |
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const char *prop_type = "phy_type"; |
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const char *node_type = NULL; |
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int node_offset; |
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int err; |
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err = fdt_usb_get_node_type(blob, start_offset, |
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&node_offset, &node_type); |
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if (err < 0) |
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return err; |
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if (mode) { |
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err = fdt_setprop(blob, node_offset, prop_mode, mode, |
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strlen(mode) + 1); |
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if (err < 0) |
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printf("WARNING: could not set %s for %s: %s.\n", |
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prop_mode, node_type, fdt_strerror(err)); |
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} |
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if (phy_type) { |
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err = fdt_setprop(blob, node_offset, prop_type, phy_type, |
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strlen(phy_type) + 1); |
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if (err < 0) |
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printf("WARNING: could not set %s for %s: %s.\n", |
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prop_type, node_type, fdt_strerror(err)); |
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} |
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return node_offset; |
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} |
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static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum, |
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int start_offset) |
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{ |
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int node_offset, err; |
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const char *node_type = NULL; |
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err = fdt_usb_get_node_type(blob, start_offset, |
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&node_offset, &node_type); |
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if (err < 0) |
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return err; |
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err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0); |
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if (err < 0) { |
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printf("ERROR: could not set %s for %s: %s.\n", |
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prop_erratum, node_type, fdt_strerror(err)); |
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} |
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return node_offset; |
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} |
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void fdt_fixup_dr_usb(void *blob, bd_t *bd) |
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{ |
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static const char * const modes[] = { "host", "peripheral", "otg" }; |
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static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" }; |
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int usb_erratum_a006261_off = -1; |
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int usb_erratum_a007075_off = -1; |
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int usb_erratum_a007792_off = -1; |
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int usb_erratum_a005697_off = -1; |
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int usb_mode_off = -1; |
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int usb_phy_off = -1; |
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char str[5]; |
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int i, j; |
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for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) { |
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const char *dr_mode_type = NULL; |
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const char *dr_phy_type = NULL; |
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int mode_idx = -1, phy_idx = -1; |
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snprintf(str, 5, "%s%d", "usb", i); |
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if (hwconfig(str)) { |
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for (j = 0; j < ARRAY_SIZE(modes); j++) { |
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if (hwconfig_subarg_cmp(str, "dr_mode", |
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modes[j])) { |
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mode_idx = j; |
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break; |
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} |
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} |
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for (j = 0; j < ARRAY_SIZE(phys); j++) { |
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if (hwconfig_subarg_cmp(str, "phy_type", |
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phys[j])) { |
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phy_idx = j; |
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break; |
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} |
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} |
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if (mode_idx < 0 && phy_idx < 0) { |
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printf("WARNING: invalid phy or mode\n"); |
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return; |
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} |
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if (mode_idx > -1) |
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dr_mode_type = modes[mode_idx]; |
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if (phy_idx > -1) |
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dr_phy_type = phys[phy_idx]; |
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} |
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if (has_dual_phy()) |
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dr_phy_type = phys[2]; |
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usb_mode_off = fdt_fixup_usb_mode_phy_type(blob, |
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dr_mode_type, NULL, |
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usb_mode_off); |
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if (usb_mode_off < 0) |
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return; |
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usb_phy_off = fdt_fixup_usb_mode_phy_type(blob, |
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NULL, dr_phy_type, |
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usb_phy_off); |
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if (usb_phy_off < 0) |
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return; |
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if (has_erratum_a006261()) { |
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usb_erratum_a006261_off = fdt_fixup_usb_erratum |
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(blob, |
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"fsl,usb-erratum-a006261", |
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usb_erratum_a006261_off); |
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if (usb_erratum_a006261_off < 0) |
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return; |
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} |
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if (has_erratum_a007075()) { |
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usb_erratum_a007075_off = fdt_fixup_usb_erratum |
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(blob, |
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"fsl,usb-erratum-a007075", |
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usb_erratum_a007075_off); |
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if (usb_erratum_a007075_off < 0) |
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return; |
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} |
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if (has_erratum_a007792()) { |
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usb_erratum_a007792_off = fdt_fixup_usb_erratum |
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(blob, |
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"fsl,usb-erratum-a007792", |
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usb_erratum_a007792_off); |
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if (usb_erratum_a007792_off < 0) |
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return; |
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} |
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if (has_erratum_a005697()) { |
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usb_erratum_a005697_off = fdt_fixup_usb_erratum |
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(blob, |
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"fsl,usb-erratum-a005697", |
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usb_erratum_a005697_off); |
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if (usb_erratum_a005697_off < 0) |
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return; |
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} |
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} |
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} |
@ -0,0 +1,288 @@ |
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/*
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* Microchip PIC32 MUSB "glue layer" |
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* |
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* Copyright (C) 2015, Microchip Technology Inc. |
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* Cristian Birsan <cristian.birsan@microchip.com> |
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* Purna Chandra Mandal <purna.mandal@microchip.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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* |
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* Based on the dsps "glue layer" code. |
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*/ |
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#include <common.h> |
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#include <linux/usb/musb.h> |
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#include "linux-compat.h" |
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#include "musb_core.h" |
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#include "musb_uboot.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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#define PIC32_TX_EP_MASK 0x0f /* EP0 + 7 Tx EPs */ |
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#define PIC32_RX_EP_MASK 0x0e /* 7 Rx EPs */ |
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#define MUSB_SOFTRST 0x7f |
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#define MUSB_SOFTRST_NRST BIT(0) |
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#define MUSB_SOFTRST_NRSTX BIT(1) |
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#define USBCRCON 0 |
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#define USBCRCON_USBWKUPEN BIT(0) /* Enable Wakeup Interrupt */ |
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#define USBCRCON_USBRIE BIT(1) /* Enable Remote resume Interrupt */ |
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#define USBCRCON_USBIE BIT(2) /* Enable USB General interrupt */ |
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#define USBCRCON_SENDMONEN BIT(3) /* Enable Session End VBUS monitoring */ |
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#define USBCRCON_BSVALMONEN BIT(4) /* Enable B-Device VBUS monitoring */ |
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#define USBCRCON_ASVALMONEN BIT(5) /* Enable A-Device VBUS monitoring */ |
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#define USBCRCON_VBUSMONEN BIT(6) /* Enable VBUS monitoring */ |
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#define USBCRCON_PHYIDEN BIT(7) /* PHY ID monitoring enable */ |
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#define USBCRCON_USBIDVAL BIT(8) /* USB ID value */ |
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#define USBCRCON_USBIDOVEN BIT(9) /* USB ID override enable */ |
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#define USBCRCON_USBWK BIT(24) /* USB Wakeup Status */ |
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#define USBCRCON_USBRF BIT(25) /* USB Resume Status */ |
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#define USBCRCON_USBIF BIT(26) /* USB General Interrupt Status */ |
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/* PIC32 controller data */ |
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struct pic32_musb_data { |
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struct musb_host_data mdata; |
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struct device dev; |
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void __iomem *musb_glue; |
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}; |
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#define to_pic32_musb_data(d) \ |
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container_of(d, struct pic32_musb_data, dev) |
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static void pic32_musb_disable(struct musb *musb) |
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{ |
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/* no way to shut the controller */ |
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} |
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static int pic32_musb_enable(struct musb *musb) |
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{ |
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/* soft reset by NRSTx */ |
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musb_writeb(musb->mregs, MUSB_SOFTRST, MUSB_SOFTRST_NRSTX); |
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/* set mode */ |
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musb_platform_set_mode(musb, musb->board_mode); |
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return 0; |
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} |
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static irqreturn_t pic32_interrupt(int irq, void *hci) |
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{ |
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struct musb *musb = hci; |
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irqreturn_t ret = IRQ_NONE; |
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u32 epintr, usbintr; |
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/* ack usb core interrupts */ |
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musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); |
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if (musb->int_usb) |
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musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb); |
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/* ack endpoint interrupts */ |
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musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & PIC32_RX_EP_MASK; |
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if (musb->int_rx) |
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musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx); |
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musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & PIC32_TX_EP_MASK; |
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if (musb->int_tx) |
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musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx); |
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/* drop spurious RX and TX if device is disconnected */ |
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if (musb->int_usb & MUSB_INTR_DISCONNECT) { |
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musb->int_tx = 0; |
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musb->int_rx = 0; |
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} |
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if (musb->int_tx || musb->int_rx || musb->int_usb) |
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ret = musb_interrupt(musb); |
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return ret; |
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} |
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static int pic32_musb_set_mode(struct musb *musb, u8 mode) |
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{ |
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struct device *dev = musb->controller; |
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struct pic32_musb_data *pdata = to_pic32_musb_data(dev); |
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switch (mode) { |
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case MUSB_HOST: |
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clrsetbits_le32(pdata->musb_glue + USBCRCON, |
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USBCRCON_USBIDVAL, USBCRCON_USBIDOVEN); |
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break; |
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case MUSB_PERIPHERAL: |
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setbits_le32(pdata->musb_glue + USBCRCON, |
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USBCRCON_USBIDVAL | USBCRCON_USBIDOVEN); |
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break; |
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case MUSB_OTG: |
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dev_err(dev, "support for OTG is unimplemented\n"); |
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break; |
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default: |
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dev_err(dev, "unsupported mode %d\n", mode); |
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return -EINVAL; |
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} |
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return 0; |
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} |
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static int pic32_musb_init(struct musb *musb) |
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{ |
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struct pic32_musb_data *pdata = to_pic32_musb_data(musb->controller); |
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u32 ctrl, hwvers; |
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u8 power; |
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/* Returns zero if not clocked */ |
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hwvers = musb_read_hwvers(musb->mregs); |
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if (!hwvers) |
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return -ENODEV; |
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/* Reset the musb */ |
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power = musb_readb(musb->mregs, MUSB_POWER); |
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power = power | MUSB_POWER_RESET; |
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musb_writeb(musb->mregs, MUSB_POWER, power); |
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mdelay(100); |
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/* Start the on-chip PHY and its PLL. */ |
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power = power & ~MUSB_POWER_RESET; |
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musb_writeb(musb->mregs, MUSB_POWER, power); |
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musb->isr = pic32_interrupt; |
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ctrl = USBCRCON_USBIF | USBCRCON_USBRF | |
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USBCRCON_USBWK | USBCRCON_USBIDOVEN | |
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USBCRCON_PHYIDEN | USBCRCON_USBIE | |
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USBCRCON_USBRIE | USBCRCON_USBWKUPEN | |
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USBCRCON_VBUSMONEN; |
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writel(ctrl, pdata->musb_glue + USBCRCON); |
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return 0; |
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} |
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/* PIC32 supports only 32bit read operation */ |
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void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) |
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{ |
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void __iomem *fifo = hw_ep->fifo; |
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u32 val, rem = len % 4; |
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/* USB stack ensures dst is always 32bit aligned. */ |
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readsl(fifo, dst, len / 4); |
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if (rem) { |
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dst += len & ~0x03; |
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val = musb_readl(fifo, 0); |
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memcpy(dst, &val, rem); |
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} |
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} |
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const struct musb_platform_ops pic32_musb_ops = { |
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.init = pic32_musb_init, |
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.set_mode = pic32_musb_set_mode, |
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.disable = pic32_musb_disable, |
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.enable = pic32_musb_enable, |
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}; |
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/* PIC32 default FIFO config - fits in 8KB */ |
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static struct musb_fifo_cfg pic32_musb_fifo_config[] = { |
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{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, |
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{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, |
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{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, |
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{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, |
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{ .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, |
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{ .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, }, |
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{ .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, }, |
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{ .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, }, |
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}; |
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static struct musb_hdrc_config pic32_musb_config = { |
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.fifo_cfg = pic32_musb_fifo_config, |
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.fifo_cfg_size = ARRAY_SIZE(pic32_musb_fifo_config), |
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.multipoint = 1, |
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.dyn_fifo = 1, |
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.num_eps = 8, |
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.ram_bits = 11, |
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}; |
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/* PIC32 has one MUSB controller which can be host or gadget */ |
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static struct musb_hdrc_platform_data pic32_musb_plat = { |
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.mode = MUSB_HOST, |
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.config = &pic32_musb_config, |
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.power = 250, /* 500mA */ |
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.platform_ops = &pic32_musb_ops, |
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}; |
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static int musb_usb_probe(struct udevice *dev) |
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{ |
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struct usb_bus_priv *priv = dev_get_uclass_priv(dev); |
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struct pic32_musb_data *pdata = dev_get_priv(dev); |
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struct musb_host_data *mdata = &pdata->mdata; |
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struct fdt_resource mc, glue; |
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void *fdt = (void *)gd->fdt_blob; |
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int node = dev->of_offset; |
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void __iomem *mregs; |
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int ret; |
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priv->desc_before_addr = true; |
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ret = fdt_get_named_resource(fdt, node, "reg", "reg-names", |
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"mc", &mc); |
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if (ret < 0) { |
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printf("pic32-musb: resource \"mc\" not found\n"); |
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return ret; |
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} |
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ret = fdt_get_named_resource(fdt, node, "reg", "reg-names", |
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"control", &glue); |
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if (ret < 0) { |
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printf("pic32-musb: resource \"control\" not found\n"); |
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return ret; |
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} |
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|
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mregs = ioremap(mc.start, fdt_resource_size(&mc)); |
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pdata->musb_glue = ioremap(glue.start, fdt_resource_size(&glue)); |
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|
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/* init controller */ |
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#ifdef CONFIG_USB_MUSB_HOST |
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mdata->host = musb_init_controller(&pic32_musb_plat, |
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&pdata->dev, mregs); |
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if (!mdata->host) |
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return -EIO; |
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|
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ret = musb_lowlevel_init(mdata); |
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#else |
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pic32_musb_plat.mode = MUSB_PERIPHERAL; |
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ret = musb_register(&pic32_musb_plat, &pdata->dev, mregs); |
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#endif |
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if (ret == 0) |
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printf("PIC32 MUSB OTG\n"); |
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return ret; |
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} |
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|
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static int musb_usb_remove(struct udevice *dev) |
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{ |
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struct pic32_musb_data *pdata = dev_get_priv(dev); |
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musb_stop(pdata->mdata.host); |
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return 0; |
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} |
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|
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static const struct udevice_id pic32_musb_ids[] = { |
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{ .compatible = "microchip,pic32mzda-usb" }, |
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{ } |
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}; |
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|
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U_BOOT_DRIVER(usb_musb) = { |
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.name = "pic32-musb", |
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.id = UCLASS_USB, |
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.of_match = pic32_musb_ids, |
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.probe = musb_usb_probe, |
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.remove = musb_usb_remove, |
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#ifdef CONFIG_USB_MUSB_HOST |
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.ops = &musb_usb_ops, |
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#endif |
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.platdata_auto_alloc_size = sizeof(struct usb_platdata), |
||||
.priv_auto_alloc_size = sizeof(struct pic32_musb_data), |
||||
}; |
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Reference in new issue