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wdenk 22 years ago
parent cc1c8a136f
commit 7ebf7443ad
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  1. 138
      MAKEALL
  2. 656
      Makefile
  3. 118
      board/cogent/README
  4. 40
      board/cpu86/config.mk
  5. 26
      board/cray/L1/config.mk
  6. 453
      board/cu824/README
  7. 247
      board/eltec/bab7xx/bab7xx.c
  8. 189
      board/eltec/elppc/elppc.c
  9. 36
      board/ep8260/config.mk
  10. 437
      board/evb64260/evb64260.c
  11. 805
      board/evb64260/flash.c
  12. 457
      board/evb64260/memory.c
  13. 129
      board/evb64260/u-boot.lds
  14. 20
      board/gth/README
  15. 57
      mkconfig

138
MAKEALL
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#!/bin/sh
if [ "${CROSS_COMPILE}" ] ; then
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
else
MAKE=make
fi
[ -d LOG ] || mkdir LOG || exit 1
LIST=""
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx=" \
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 FADS823 \
FADS850SAR FADS860T FLAGADM FPS850L \
GEN860T GENIETV GTH hermes \
IAD210 ICU862_100MHz IP860 IVML24 \
IVML24_128 IVML24_256 IVMS8 IVMS8_128 \
IVMS8_256 LANTEC lwmon MBX \
MBX860T MHPC MVS1 NETVIA \
NX823 pcu_e R360MPI RPXClassic \
RPXlite RRvision SM850 SPD823TS \
SXNI855T TQM823L TQM823L_LCD TQM850L \
TQM855L TQM860L TQM860L_FEC TTTech \
"
#########################################################################
## PPC4xx Systems
#########################################################################
LIST_4xx=" \
ADCIOP AR405 CANBT CPCI405 \
CPCI4052 CPCI440 CPCIISER4 CRAYL1 \
DASA_SIM DU405 EBONY ERIC \
MIP405 ML2 OCRTC ORSG \
PCI405 PIP405 W7OLMC W7OLMG \
WALNUT405 \
"
#########################################################################
## MPC824x Systems
#########################################################################
LIST_824x=" \
BMW CU824 MOUSSE MUSENKI \
OXC PN62 Sandpoint8240 Sandpoint8245 \
utx8245 \
"
#########################################################################
## MPC8260 Systems
#########################################################################
LIST_8260=" \
cogent_mpc8260 CPU86 ep8260 gw8260 \
hymod IPHASE4539 MPC8260ADS PM826 \
ppmc8260 RPXsuper rsdproto sacsng \
sbc8260 SCM TQM8260 \
"
#########################################################################
## 74xx/7xx Systems
#########################################################################
LIST_74xx=" \
EVB64260 PCIPPC2 PCIPPC6 ZUMA \
"
LIST_7xx=" \
BAB7xx ELPPC \
"
LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
#########################################################################
## StrongARM Systems
#########################################################################
LIST_SA="lart shannon dnp1110"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7="impa7 ep7312"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9="smdk2400 smdk2410 trab"
#########################################################################
## Xscale Systems
#########################################################################
LIST_xscale="lubbock cradle csb226"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
#----- for now, just run PPC by default -----
[ $# = 0 ] && set $LIST_ppc
#-----------------------------------------------------------------------
build_target() {
target=$1
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
}
#-----------------------------------------------------------------------
for arg in $@
do
case "$arg" in
8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
done
;;
*) build_target ${arg}
;;
esac
done

656
Makefile
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#
# (C) Copyright 2000, 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
HOSTARCH := $(shell uname -m | \
sed -e s/i.86/i386/ \
-e s/sun4u/sparc64/ \
-e s/arm.*/arm/ \
-e s/sa110/arm/ \
-e s/powerpc/ppc/ \
-e s/macppc/ppc/)
HOSTOS := $(shell uname -s | tr A-Z a-z | \
sed -e 's/\(cygwin\).*/cygwin/')
export HOSTARCH
# Deal with colliding definitions from tcsh etc.
VENDOR=
#########################################################################
TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi)
export TOPDIR
ifeq (include/config.mk,$(wildcard include/config.mk))
# load ARCH, BOARD, and CPU configuration
include include/config.mk
export ARCH CPU BOARD VENDOR
# load other configuration
include $(TOPDIR)/config.mk
ifndef CROSS_COMPILE
ifeq ($(HOSTARCH),ppc)
CROSS_COMPILE =
else
## #ifeq ($(CPU),mpc8xx)
## CROSS_COMPILE = ppc_8xx-
## #endif
## #ifeq ($(CPU),ppc4xx)
## #CROSS_COMPILE = ppc_4xx-
## #endif
## #ifeq ($(CPU),mpc824x)
## #CROSS_COMPILE = ppc_82xx-
## #endif
## #ifeq ($(CPU),mpc8260)
## #CROSS_COMPILE = ppc_82xx-
## #endif
## #ifeq ($(CPU),74xx_7xx)
## #CROSS_COMPILE = ppc_74xx-)
## #endif
ifeq ($(ARCH),ppc)
CROSS_COMPILE = ppc_8xx-
endif
ifeq ($(ARCH),arm)
CROSS_COMPILE = arm_920TDI-
endif
endif
endif
export CROSS_COMPILE
# The "tools" are needed early, so put this first
SUBDIRS = tools \
lib_generic \
lib_$(ARCH) \
cpu/$(CPU) \
board/$(BOARDDIR) \
common \
disk \
fs \
net \
rtc \
dtt \
drivers \
post \
post/cpu \
examples
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
OBJS = cpu/$(CPU)/start.o
ifeq ($(CPU),ppc4xx)
OBJS += cpu/$(CPU)/resetvec.o
endif
LIBS = board/$(BOARDDIR)/lib$(BOARD).a
LIBS += cpu/$(CPU)/lib$(CPU).a
LIBS += lib_$(ARCH)/lib$(ARCH).a
LIBS += fs/jffs2/libjffs2.a
LIBS += net/libnet.a
LIBS += disk/libdisk.a
LIBS += rtc/librtc.a
LIBS += dtt/libdtt.a
LIBS += drivers/libdrivers.a
LIBS += post/libpost.a post/cpu/libcpu.a
LIBS += common/libcommon.a
LIBS += lib_generic/libgeneric.a
#########################################################################
all: u-boot.srec u-boot.bin System.map
install: all
cp u-boot.bin /tftpboot/u-boot.bin
cp u-boot.bin /net/sam/tftpboot/u-boot.bin
u-boot.srec: u-boot
$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@
u-boot.bin: u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
u-boot: depend subdirs $(OBJS) $(LIBS) $(LDSCRIPT)
$(LD) $(LDFLAGS) $(OBJS) $(LIBS) $(LIBS) -Map u-boot.map -o u-boot
subdirs:
@for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir || exit 1 ; done
depend dep:
@for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir .depend ; done
tags:
ctags -w `find $(SUBDIRS) include \
\( -name CVS -prune \) -o \( -name '*.[ch]' -print \)`
etags:
etags -a `find $(SUBDIRS) include \
\( -name CVS -prune \) -o \( -name '*.[ch]' -print \)`
System.map: u-boot
@$(NM) $< | \
grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > System.map
#########################################################################
else
all install u-boot u-boot.srec depend dep:
@echo "System not configured - see README" >&2
@ exit 1
endif
#########################################################################
unconfig:
rm -f include/config.h include/config.mk
#========================================================================
# PowerPC
#========================================================================
#########################################################################
## MPC8xx Systems
#########################################################################
ADS860_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx fads
AMX860_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx amx860 westel
c2mon_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx c2mon
CCM_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx CCM siemens
cogent_mpc8xx_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx cogent
ESTEEM192E_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx esteem192e
ETX094_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx etx094
FADS823_config \
FADS850SAR_config \
FADS860T_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx fads
FLAGADM_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx flagadm
GEN860T_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx gen860t
GENIETV_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx genietv
GTH_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx gth
hermes_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx hermes
IAD210_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx IAD210 siemens
xtract_ICU862 = $(subst _100MHz,,$(subst _config,,$1))
ICU862_100MHz_config \
ICU862_config: unconfig
@ >include/config.h
@[ -z "$(findstring _100MHz,$@)" ] || \
{ echo "#define CONFIG_100MHz" >>include/config.h ; \
echo "... with 100MHz system clock" ; \
}
@./mkconfig -a $(call xtract_ICU862,$@) ppc mpc8xx icu862
IP860_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx ip860
IVML24_256_config \
IVML24_128_config \
IVML24_config: unconfig
@ >include/config.h
@[ -z "$(findstring IVML24_config,$@)" ] || \
{ echo "#define CONFIG_IVML24_16M" >>include/config.h ; \
}
@[ -z "$(findstring IVML24_128_config,$@)" ] || \
{ echo "#define CONFIG_IVML24_32M" >>include/config.h ; \
}
@[ -z "$(findstring IVML24_256_config,$@)" ] || \
{ echo "#define CONFIG_IVML24_64M" >>include/config.h ; \
}
@./mkconfig -a IVML24 ppc mpc8xx ivm
IVMS8_256_config \
IVMS8_128_config \
IVMS8_config: unconfig
@ >include/config.h
@[ -z "$(findstring IVMS8_config,$@)" ] || \
{ echo "#define CONFIG_IVMS8_16M" >>include/config.h ; \
}
@[ -z "$(findstring IVMS8_128_config,$@)" ] || \
{ echo "#define CONFIG_IVMS8_32M" >>include/config.h ; \
}
@[ -z "$(findstring IVMS8_256_config,$@)" ] || \
{ echo "#define CONFIG_IVMS8_64M" >>include/config.h ; \
}
@./mkconfig -a IVMS8 ppc mpc8xx ivm
LANTEC_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx lantec
lwmon_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx lwmon
MBX_config \
MBX860T_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx mbx8xx
MHPC_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx mhpc eltec
MVS1_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx mvs1
NETVIA_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx netvia
NX823_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx nx823
pcu_e_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx pcu_e siemens
R360MPI_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx r360mpi
RPXClassic_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx RPXClassic
RPXlite_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx RPXlite
RRvision_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx RRvision
RRvision_LCD_config: unconfig
@echo "#define CONFIG_LCD" >include/config.h
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>include/config.h
@./mkconfig -a RRvision ppc mpc8xx RRvision
SM850_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx tqm8xx
SPD823TS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx spd8xx
SXNI855T_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx sixnet
# Play some tricks for configuration selection
# All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
# but only 855 and 860 boards may come with FEC
# and 823 boards may have LCD support
xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1)))))
FPS850L_config \
TQM823L_config \
TQM823L_66MHz_config \
TQM823L_80MHz_config \
TQM823L_LCD_config \
TQM823L_LCD_66MHz_config \
TQM823L_LCD_80MHz_config \
TQM850L_config \
TQM850L_66MHz_config \
TQM850L_80MHz_config \
TQM855L_config \
TQM855L_66MHz_config \
TQM855L_80MHz_config \
TQM855L_FEC_config \
TQM855L_FEC_66MHz_config \
TQM855L_FEC_80MHz_config \
TQM860L_config \
TQM860L_66MHz_config \
TQM860L_80MHz_config \
TQM860L_FEC_config \
TQM860L_FEC_66MHz_config \
TQM860L_FEC_80MHz_config: unconfig
@ >include/config.h
@[ -z "$(findstring _FEC,$@)" ] || \
{ echo "#define CONFIG_FEC_ENET" >>include/config.h ; \
echo "... with FEC support" ; \
}
@[ -z "$(findstring _66MHz,$@)" ] || \
{ echo "#define CONFIG_66MHz" >>include/config.h ; \
echo "... with 66MHz system clock" ; \
}
@[ -z "$(findstring _80MHz,$@)" ] || \
{ echo "#define CONFIG_80MHz" >>include/config.h ; \
echo "... with 80MHz system clock" ; \
}
@[ -z "$(findstring _LCD,$@)" ] || \
{ echo "#define CONFIG_LCD" >>include/config.h ; \
echo "#define CONFIG_NEC_NL6648BC20" >>include/config.h ; \
echo "... with LCD display" ; \
}
@./mkconfig -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx
TTTech_config: unconfig
@echo "#define CONFIG_LCD" >include/config.h
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>include/config.h
@./mkconfig -a TQM823L ppc mpc8xx tqm8xx
#########################################################################
## PPC4xx Systems
#########################################################################
ADCIOP_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx adciop esd
AR405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ar405 esd
CANBT_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx canbt esd
CPCI405_config \
CPCI4052_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx cpci405 esd
@echo "BOARD_REVISION = $(@:_config=)" >>include/config.mk
CPCI440_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx cpci440 esd
CPCIISER4_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx cpciiser4 esd
CRAYL1_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx L1 cray
DASA_SIM_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx dasa_sim esd
DU405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx du405 esd
EBONY_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ebony
ERIC_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx eric
MIP405_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx mip405 mpl
ML2_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ml2
OCRTC_config \
ORSG_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ocrtc esd
PCI405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pci405 esd
PIP405_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl
W7OLMC_config \
W7OLMG_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx w7o
WALNUT405_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx walnut405
#########################################################################
## MPC824x Systems
#########################################################################
BMW_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x bmw
CU824_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x cu824
MOUSSE_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x mousse
MUSENKI_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x musenki
OXC_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x oxc
PN62_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x pn62
Sandpoint8240_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x sandpoint
Sandpoint8245_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x sandpoint
utx8245_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x utx8245
#########################################################################
## MPC8260 Systems
#########################################################################
xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
cogent_mpc8260_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 cogent
CPU86_config \
CPU86_ROMBOOT_config: unconfig
@./mkconfig $(call xtract_82xx,$@) ppc mpc8260 cpu86
@cd ./include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
echo "... booting from 8-bit flash" ; \
else \
echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
echo "... booting from 64-bit flash" ; \
fi; \
echo "export CONFIG_BOOT_ROM" >> config.mk;
ep8260_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 ep8260
gw8260_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 gw8260
hymod_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 hymod
IPHASE4539_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 iphase4539
MPC8260ADS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 mpc8260ads
PM826_config \
PM826_ROMBOOT_config: unconfig
@./mkconfig $(call xtract_82xx,$@) ppc mpc8260 pm826
@cd ./include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
echo "... booting from 8-bit flash" ; \
else \
echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
echo "... booting from 64-bit flash" ; \
fi; \
echo "export CONFIG_BOOT_ROM" >> config.mk; \
ppmc8260_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 ppmc8260
RPXsuper_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 rpxsuper
rsdproto_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 rsdproto
sacsng_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 sacsng
sbc8260_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 sbc8260
SCM_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 SCM siemens
TQM8260_config \
TQM8260_L2_config \
TQM8260_266MHz_config \
TQM8260_L2_266MHz_config \
TQM8260_300MHz_config: unconfig
@ >include/config.h
@if [ "$(findstring _L2_,$@)" ] ; then \
echo "#define CONFIG_L2_CACHE" >>include/config.h ; \
echo "... with L2 Cache support (60x Bus Mode)" ; \
else \
echo "#undef CONFIG_L2_CACHE" >>include/config.h ; \
echo "... without L2 Cache support" ; \
fi
@[ -z "$(findstring _266MHz,$@)" ] || \
{ echo "#define CONFIG_266MHz" >>include/config.h ; \
echo "... with 266MHz system clock" ; \
}
@[ -z "$(findstring _300MHz,$@)" ] || \
{ echo "#define CONFIG_300MHz" >>include/config.h ; \
echo "... with 300MHz system clock" ; \
}
@./mkconfig -a $(call xtract_82xx,$@) ppc mpc8260 tqm8260
#########################################################################
## 74xx/7xx Systems
#########################################################################
EVB64260_config \
EVB64260_750CX_config: unconfig
@./mkconfig EVB64260 ppc 74xx_7xx evb64260
ZUMA_config: unconfig
@./mkconfig $(@:_config=) ppc 74xx_7xx evb64260
PCIPPC2_config \
PCIPPC6_config: unconfig
@./mkconfig $(@:_config=) ppc 74xx_7xx pcippc2
BAB7xx_config: unconfig
@./mkconfig $(@:_config=) ppc 74xx_7xx bab7xx eltec
ELPPC_config: unconfig
@./mkconfig $(@:_config=) ppc 74xx_7xx elppc eltec
#========================================================================
# ARM
#========================================================================
#########################################################################
## StrongARM Systems
#########################################################################
lart_config : unconfig
@./mkconfig $(@:_config=) arm sa1100 lart
dnp1110_config : unconfig
@./mkconfig $(@:_config=) arm sa1100 dnp1110
shannon_config : unconfig
@./mkconfig $(@:_config=) arm sa1100 shannon
#########################################################################
## ARM920T Systems
#########################################################################
smdk2400_config : unconfig
@./mkconfig $(@:_config=) arm arm920t smdk2400
smdk2410_config : unconfig
@./mkconfig $(@:_config=) arm arm920t smdk2410
trab_config : unconfig
@./mkconfig $(@:_config=) arm arm920t trab
#########################################################################
## ARM720T Systems
#########################################################################
impa7_config : unconfig
@./mkconfig $(@:_config=) arm arm720t impa7
ep7312_config : unconfig
@./mkconfig $(@:_config=) arm arm720t ep7312
#########################################################################
## Xscale Systems
#########################################################################
lubbock_config : unconfig
@./mkconfig $(@:_config=) arm xscale lubbock
cradle_config : unconfig
@./mkconfig $(@:_config=) arm xscale cradle
csb226_config : unconfig
@./mkconfig $(@:_config=) arm xscale csb226
#########################################################################
clean:
find . -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' \
-o -name '*.o' -o -name '*.a' \) -print \
| xargs rm -f
rm -f examples/hello_world examples/timer examples/eepro100_eeprom
rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
rm -f tools/easylogo/easylogo tools/bmp_logo
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
clobber: clean
find . -type f \
\( -name .depend -o -name '*.srec' -o -name '*.bin' \) \
-print \
| xargs rm -f
rm -f $(OBJS) *.bak tags TAGS
rm -fr *.*~
rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
rm -f tools/crc32.c tools/environment.c
rm -f include/asm/arch include/asm
mrproper \
distclean: clobber unconfig
backup:
F=`basename $(TOPDIR)` ; cd .. ; \
gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
#########################################################################

118
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Cogent Modular Architecture configuration
-----------------------------------------
As the name suggests, the Cogent platform is a modular system where
you have a motherboard into which plugs a cpu module and one or more
i/o modules. This provides very nice flexibility, but makes the
configuration task somewhat harder.
The possible Cogent motherboards are:
Code Config Variable Description
---- --------------- -----------
CMA101 CONFIG_CMA101 32MB ram, 2 ser, 1 par, rtc, dipsw,
2x16 lcd, eth(?)
CMA102 CONFIG_CMA102 32MB ram, 2 ser, 1 par, rtc, dipsw,
2x16 lcd
CMA111 CONFIG_CMA111 32MB ram, 1MB flash, 4 ser, 1 par,
rtc, ps/2 kbd/mse, 2x16 lcd, 2xPCI,
10/100TP eth
CMA120 CONFIG_CMA120 32MB ram, 1MB flash, 4 ser, 1 par,
rtc, ps/2 kbd/mse, 2x16 lcd, 2xPCI,
10/100TP eth, 2xPCMCIA, video/lcd-panel
CMA150 CONFIG_CMA150 8MB ram, 1MB flash, 2 ser, 1 par, rtc,
ps/2 kbd/mse, 2x16 lcd
The possible Cogent PowerPC CPU modules are:
Code Config Variable Description
---- --------------- -----------
CMA278-603EV CONFIG_CMA278_603EV PPC603ev CPU, 66MHz clock, 512K EPROM,
JTAG/COP
CMA278-603ER CONFIG_CMA278_603ER PPC603er CPU, 66MHz clock, 512K EPROM,
JTAG/COP
CMA278-740 CONFIG_CMA278_740 PPC740 CPU, 66MHz clock, 512K EPROM,
JTAG/COP
CMA280-509 CONFIG_CMA280_509 MPC505/509 CPU, 50MHz clock,
512K EPROM, BDM
CMA282 CONFIG_CMA282 MPC8260 CPU, 66MHz clock, 512K EPROM,
JTAG, 16M RAM, 1 x ser (SMC2),
1 x 10baseT PHY (SCC4), 1 x 10/100 TP
PHY (FCC1), 2 x 48pin DIN (FCC2 + TDM1)
CMA285 CONFIG_CMA285 MPC801 CPU, 33MHz clock, 512K EPROM,
BDM
CMA286-21 CONFIG_CMA286_21 MPC821 CPU, 66MHz clock, 512K EPROM,
BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
1 x 10baseT PHY (SCC2)
CMA286-60-OLD CONFIG_CMA286_60_OLD MPC860 CPU, 33MHz clock, 128K EPROM,
BDM
CMA286-60 CONFIG_CMA286_60 MPC860 CPU, 66MHz clock, 512K EPROM,
BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
1 x 10baseT PHY (SCC2)
CMA286-60P CONFIG_CMA286_60P MPC860P CPU, 66MHz clock, 512K EPROM,
BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
1 x 10baseT PHY (SCC2)
CMA287-23 CONFIG_CMA287_23 MPC823 CPU, 33MHz clock, 512K EPROM,
BDM
CMA287-50 CONFIG_CMA287_50 MPC850 CPU, 33MHz clock, 512K EPROM,
BDM
(there are a lot of other cpu modules with ARM, MIPS and M-CORE CPUs,
but we'll worry about those later).
The possible Cogent CMA I/O Modules are:
Code Config Variable Description
---- --------------- -----------
CMA302 CONFIG_CMA302 up to 16M flash, ps/2 keyboard/mouse
CMA352 CONFIG_CMA352 CMAbus <=> PCI
Currently supported:
Motherboards: CMA102
CPU Modules: CMA286-60-OLD
I/O Modules: CMA302 I/O module
To configure, perform the usual U-Boot configuration task of editing
"include/config_cogent_mpc8xx.h" and reviewing all the options and
settings in there. In particular, check the chip select values
installed into the memory controller's various option and base
registers - these are set by the defines CFG_CMA_CSn_{BASE,SIZE} and
CFG_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
into the SCCR - via the define CFG_SCCR. Finally, decide whether you
want the serial console on motherboard serial port A or on one of the
8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly
(NONE means use Cogent motherboard serial port A).
Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be
the base address of the EPROM for the CPU module. This should be the
same as the value selected for CFG_MONITOR_BASE in
"include/config_cogent_*.h" (in fact, I have made this automatic via
the -DTEXT_BASE=... option in CPPFLAGS).
Finally, set the values of the make variables $(CMA_MB) and $(CMA_IOMS).
$(CMA_MB) is the name of the directory that contains support for your
motherboard. At this stage, only "cma10x" exists, which supports the
CMA101 and CMA102 motherboards - but only selected devices, namely
serial, lcd and dipsw.
$(CMA_IOMS) is a list of zero or more directories that contain
support for the i/o modules you have installed. At this stage, only
"cma302" exists, which supports the CMA302 flash i/o module - but
only the flash part, not the ps/2 keyboard and mouse interfaces.
There should be a make variable for each of the above directories,
which is the directory name with "_O" appended. This make variable is
a list of object files to compile from that directory and include in
the library.
e.g. cma10x_O = serial.o ...
That's it. Good Luck.
Murray.Jensen@cmst.csiro.au
August 31, 2000.

40
board/cpu86/config.mk
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#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# CPU86 boards
#
# This should be equal to the CFG_FLASH_BASE define in config_CPU86.h
# for the "final" configuration, with U-Boot in flash, or the address
# in RAM where U-Boot is loaded at for debugging.
#
ifeq ($(CONFIG_BOOT_ROM),y)
TEXT_BASE := 0xFF800000
PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
else
TEXT_BASE := 0xFF000000
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)

26
board/cray/L1/config.mk
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#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# Note: I make an "image" from U-Boot itself, which prefixes 0x40 bytes of
# header info, hence start address is thus shifted.
TEXT_BASE = 0xFFFD0040

453
board/cu824/README
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ppcboot for a CU824 board
---------------------------
CU824 has two banks of flash 8MB each. In board's notation, bank 0 is
the one at the address of 0xFF800000 and bank 1 is the one at the
address of 0xFF000000. On power-up the processor jumps to the address
of 0xFFF00100, the last megabyte of the bank 0 of flash. Thus,
U-Boot is configured to reside in flash starting at the address of
0xFFF00000. The environment space is not embedded in the U-Boot code
and is located in flash separately from U-Boot, at the address of
0xFF008000.
U-Boot test results
--------------------
x.x Operation on all available serial consoles
x.x.x CONFIG_CONS_INDEX 1
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>he
go - start application at address 'addr'
run - run commands in an environment variable
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
tftpboot- boot image via network using TFTP protocol
and env variables ipaddr and serverip
rarpboot- boot image via network using RARP/TFTP protocol
bootd - boot default, i.e., run 'bootcmd'
loads - load S-Record file over serial line
loadb - load binary file over serial line (kermit mode)
md - memory display
mm - memory modify (auto-incrementing)
nm - memory modify (constant address)
mw - memory write (fill)
cp - memory copy
cmp - memory compare
crc32 - checksum calculation
base - print or set address offset
printenv- print environment variables
setenv - set environment variables
saveenv - save environment variables to persistent storage
protect - enable or disable FLASH write protection
erase - erase FLASH memory
flinfo - print FLASH memory information
bdinfo - print Board Info structure
iminfo - print header information for application image
coninfo - print console devices and informations
loop - infinite loop on address range
mtest - simple RAM test
icache - enable or disable instruction cache
dcache - enable or disable data cache
reset - Perform RESET of the CPU
echo - echo args to console
version - print monitor version
help - print online help
? - alias for 'help'
=>
x.x.x CONFIG_CONS_INDEX 2
**** NOT TESTED ****
x.x Flash Driver Operation
x.x.x Erase Operation
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>
=>
=>md ff000000
ff000000: 27051956 70706362 6f6f7420 302e382e '..Vppcboot 0.8.
ff000010: 3320284d 61792031 31203230 3031202d 3 (May 11 2001 -
ff000020: 2031343a 35373a30 33290000 00000000 14:57:03)......
ff000030: 00000000 00000000 00000000 00000000 ................
ff000040: 00000000 00000000 00000000 00000000 ................
ff000050: 00000000 00000000 00000000 00000000 ................
ff000060: 00000000 00000000 00000000 00000000 ................
ff000070: 00000000 00000000 00000000 00000000 ................
ff000080: 00000000 00000000 00000000 00000000 ................
ff000090: 00000000 00000000 00000000 00000000 ................
ff0000a0: 00000000 00000000 00000000 00000000 ................
ff0000b0: 00000000 00000000 00000000 00000000 ................
ff0000c0: 00000000 00000000 00000000 00000000 ................
ff0000d0: 00000000 00000000 00000000 00000000 ................
ff0000e0: 00000000 00000000 00000000 00000000 ................
ff0000f0: 00000000 00000000 00000000 00000000 ................
=>erase ff000000 ff007fff
Erase Flash from 0xff000000 to 0xff007fff
done
Erased 1 sectors
=>md ff000000
ff000000: ffffffff ffffffff ffffffff ffffffff ................
ff000010: ffffffff ffffffff ffffffff ffffffff ................
ff000020: ffffffff ffffffff ffffffff ffffffff ................
ff000030: ffffffff ffffffff ffffffff ffffffff ................
ff000040: ffffffff ffffffff ffffffff ffffffff ................
ff000050: ffffffff ffffffff ffffffff ffffffff ................
ff000060: ffffffff ffffffff ffffffff ffffffff ................
ff000070: ffffffff ffffffff ffffffff ffffffff ................
ff000080: ffffffff ffffffff ffffffff ffffffff ................
ff000090: ffffffff ffffffff ffffffff ffffffff ................
ff0000a0: ffffffff ffffffff ffffffff ffffffff ................
ff0000b0: ffffffff ffffffff ffffffff ffffffff ................
ff0000c0: ffffffff ffffffff ffffffff ffffffff ................
ff0000d0: ffffffff ffffffff ffffffff ffffffff ................
ff0000e0: ffffffff ffffffff ffffffff ffffffff ................
ff0000f0: ffffffff ffffffff ffffffff ffffffff ................
=>
x.x.x Information
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>
=>
=>
=>flinfo
Bank # 1: Intel: 28F160F3B (16Mbit)
Size: 8 MB in 39 Sectors
Sector Start Addresses:
FF000000 FF008000 (RO) FF010000 FF018000 FF020000
FF028000 FF030000 FF038000 FF040000 FF080000
FF0C0000 FF100000 FF140000 FF180000 FF1C0000
FF200000 FF240000 FF280000 FF2C0000 FF300000
FF340000 FF380000 FF3C0000 FF400000 FF440000
FF480000 FF4C0000 FF500000 FF540000 FF580000
FF5C0000 FF600000 FF640000 FF680000 FF6C0000
FF700000 FF740000 FF780000 FF7C0000
Bank # 2: Intel: 28F160F3B (16Mbit)
Size: 8 MB in 39 Sectors
Sector Start Addresses:
FF800000 FF808000 FF810000 FF818000 FF820000
FF828000 FF830000 FF838000 FF840000 FF880000
FF8C0000 FF900000 FF940000 FF980000 FF9C0000
FFA00000 FFA40000 FFA80000 FFAC0000 FFB00000
FFB40000 FFB80000 FFBC0000 FFC00000 FFC40000
FFC80000 FFCC0000 FFD00000 FFD40000 FFD80000
FFDC0000 FFE00000 FFE40000 FFE80000 FFEC0000
FFF00000 (RO) FFF40000 FFF80000 FFFC0000
=>
x.x.x Flash Programming
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>
=>
=>
=>cp 0 ff000000 20
Copy to Flash... done
=>md 0
00000000: 0ec08ce0 03f9800c 00000001 040c0000 ................
00000010: 00000001 03fd1aa0 03fd1ae4 03fd1a00 ................
00000020: 03fd1a58 03fceb04 03fd34cc 03fd34d0 ...X......4...4.
00000030: 03fcd5bc 03fcdabc 00000000 00000000 ................
00000040: 00000000 00000000 00000000 00000000 ................
00000050: 00000000 00000000 00000000 00000000 ................
00000060: 00000000 00000000 00000000 00000000 ................
00000070: 00000000 00000000 00000000 00000000 ................
00000080: 00000000 00000000 00000000 00000000 ................
00000090: 00000000 00000000 00000000 00000000 ................
000000a0: 00000000 00000000 00000000 00000000 ................
000000b0: 00000000 00000000 00000000 00000000 ................
000000c0: 00000000 00000000 00000000 00000000 ................
000000d0: 00000000 00000000 00000000 00000000 ................
000000e0: 00000000 00000000 00000000 00000000 ................
000000f0: 00000000 00000000 00000000 00000000 ................
=>md ff000000
ff000000: 0ec08ce0 03f9800c 00000001 040c0000 ................
ff000010: 00000001 03fd1aa0 03fd1ae4 03fd1a00 ................
ff000020: 03fd1a58 03fceb04 03fd34cc 03fd34d0 ...X......4...4.
ff000030: 03fcd5bc 03fcdabc 00000000 00000000 ................
ff000040: 00000000 00000000 00000000 00000000 ................
ff000050: 00000000 00000000 00000000 00000000 ................
ff000060: 00000000 00000000 00000000 00000000 ................
ff000070: 00000000 00000000 00000000 00000000 ................
ff000080: ffffffff ffffffff ffffffff ffffffff ................
ff000090: ffffffff ffffffff ffffffff ffffffff ................
ff0000a0: ffffffff ffffffff ffffffff ffffffff ................
ff0000b0: ffffffff ffffffff ffffffff ffffffff ................
ff0000c0: ffffffff ffffffff ffffffff ffffffff ................
ff0000d0: ffffffff ffffffff ffffffff ffffffff ................
ff0000e0: ffffffff ffffffff ffffffff ffffffff ................
ff0000f0: ffffffff ffffffff ffffffff ffffffff ................
=>
x.x.x Storage of environment variables in flash
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>printenv
bootargs=
bootcmd=bootm FE020000
bootdelay=5
baudrate=9600
ipaddr=192.168.4.2
serverip=192.168.4.1
ethaddr=00:40:42:01:00:a0
stdin=serial
stdout=serial
stderr=serial
Environment size: 167/32764 bytes
=>setenv myvar 1234
=>save_env
Un-Protected 1 sectors
Erasing Flash...
done
Erased 1 sectors
Saving Environment to Flash...
Protected 1 sectors
=>reset
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>printenv
bootargs=
bootcmd=bootm FE020000
bootdelay=5
baudrate=9600
ipaddr=192.168.4.2
serverip=192.168.4.1
ethaddr=00:40:42:01:00:a0
myvar=1234
stdin=serial
stdout=serial
stderr=serial
Environment size: 178/32764 bytes
=>
x.x Image Download and run over serial port
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>
=>mw 40000 0 10000
=>md 40000
00040000: 00000000 00000000 00000000 00000000 ................
00040010: 00000000 00000000 00000000 00000000 ................
00040020: 00000000 00000000 00000000 00000000 ................
00040030: 00000000 00000000 00000000 00000000 ................
00040040: 00000000 00000000 00000000 00000000 ................
00040050: 00000000 00000000 00000000 00000000 ................
00040060: 00000000 00000000 00000000 00000000 ................
00040070: 00000000 00000000 00000000 00000000 ................
00040080: 00000000 00000000 00000000 00000000 ................
00040090: 00000000 00000000 00000000 00000000 ................
000400a0: 00000000 00000000 00000000 00000000 ................
000400b0: 00000000 00000000 00000000 00000000 ................
000400c0: 00000000 00000000 00000000 00000000 ................
000400d0: 00000000 00000000 00000000 00000000 ................
000400e0: 00000000 00000000 00000000 00000000 ................
000400f0: 00000000 00000000 00000000 00000000 ................
=>loads
## Ready for S-Record download ...
(Back at xpert.denx.de)
[vlad@xpert vlad]$ cat hello_world.srec >/dev/ttyS0
[vlad@xpert vlad]$ kermit -l /dev/ttyS0 -b 9600 -c
Connecting to /dev/ttyS0, speed 9600.
The escape character is Ctrl-\ (ASCII 28, FS)
Type the escape character followed by C to get back,
or followed by ? to see other options.
md 40000
00040000: 00018148 9421ffe0 7c0802a6 bf61000c ...H.!..|....a..
00040010: 90010024 48000005 7fc802a6 801effe8 ...$H...........
00040020: 7fc0f214 7c7f1b78 813f0038 7c9c2378 ....|..x.?.8|.#x
00040030: 807e8000 7cbd2b78 80090010 3b600000 .~..|.+x....;`..
00040040: 7c0803a6 4e800021 813f0038 7f84e378 |...N..!.?.8...x
00040050: 807e8004 80090010 7c0803a6 4e800021 .~......|...N..!
00040060: 7c1be000 4181003c 80bd0000 813f0038 |...A..<.....?.8
00040070: 3bbd0004 2c050000 40820008 80be8008 ;...,...@.......
00040080: 80090010 7f64db78 807e800c 3b7b0001 .....d.x.~..;{..
00040090: 7c0803a6 4e800021 7c1be000 4081ffcc |...N..!|...@...
000400a0: 813f0038 807e8010 80090010 7c0803a6 .?.8.~......|...
000400b0: 4e800021 813f0038 80090004 7c0803a6 N..!.?.8....|...
000400c0: 4e800021 2c030000 4182ffec 813f0038 N..!,...A....?.8
000400d0: 80090000 7c0803a6 4e800021 813f0038 ....|...N..!.?.8
000400e0: 807e8014 80090010 7c0803a6 4e800021 .~......|...N..!
000400f0: 38600000 80010024 7c0803a6 bb61000c 8`.....$|....a..
=>go 40004
## Starting application at 0x00040004 ...
Hello World
argc = 1
argv[0] = "40004"
argv[1] = "<NULL>"
Hit any key to exit ...
## Application terminated, rc = 0x0
=>
x.x Image download and run over ethernet interface
ppcboot 0.9.2 (May 13 2001 - 17:56:46)
Initializing...
CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
Board: CU824 Revision 1 Local Bus at 99 MHz
DRAM: 64 MB
FLASH: 16 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>
=>mw 40000 0 10000
=>md 40000
00040000: 00000000 00000000 00000000 00000000 ................
00040010: 00000000 00000000 00000000 00000000 ................
00040020: 00000000 00000000 00000000 00000000 ................
00040030: 00000000 00000000 00000000 00000000 ................
00040040: 00000000 00000000 00000000 00000000 ................
00040050: 00000000 00000000 00000000 00000000 ................
00040060: 00000000 00000000 00000000 00000000 ................
00040070: 00000000 00000000 00000000 00000000 ................
00040080: 00000000 00000000 00000000 00000000 ................
00040090: 00000000 00000000 00000000 00000000 ................
000400a0: 00000000 00000000 00000000 00000000 ................
000400b0: 00000000 00000000 00000000 00000000 ................
000400c0: 00000000 00000000 00000000 00000000 ................
000400d0: 00000000 00000000 00000000 00000000 ................
000400e0: 00000000 00000000 00000000 00000000 ................
000400f0: 00000000 00000000 00000000 00000000 ................
=>tftpboot 40000 hello_world.bin
ARP broadcast 1
TFTP from server 192.168.4.1; our IP address is 192.168.4.2
Filename 'hello_world.bin'.
Load address: 0x40000
Loading: #############
done
Bytes transferred = 65912 (10178 hex)
=>md 40000
00040000: 00018148 9421ffe0 7c0802a6 bf61000c ...H.!..|....a..
00040010: 90010024 48000005 7fc802a6 801effe8 ...$H...........
00040020: 7fc0f214 7c7f1b78 813f0038 7c9c2378 ....|..x.?.8|.#x
00040030: 807e8000 7cbd2b78 80090010 3b600000 .~..|.+x....;`..
00040040: 7c0803a6 4e800021 813f0038 7f84e378 |...N..!.?.8...x
00040050: 807e8004 80090010 7c0803a6 4e800021 .~......|...N..!
00040060: 7c1be000 4181003c 80bd0000 813f0038 |...A..<.....?.8
00040070: 3bbd0004 2c050000 40820008 80be8008 ;...,...@.......
00040080: 80090010 7f64db78 807e800c 3b7b0001 .....d.x.~..;{..
00040090: 7c0803a6 4e800021 7c1be000 4081ffcc |...N..!|...@...
000400a0: 813f0038 807e8010 80090010 7c0803a6 .?.8.~......|...
000400b0: 4e800021 813f0038 80090004 7c0803a6 N..!.?.8....|...
000400c0: 4e800021 2c030000 4182ffec 813f0038 N..!,...A....?.8
000400d0: 80090000 7c0803a6 4e800021 813f0038 ....|...N..!.?.8
000400e0: 807e8014 80090010 7c0803a6 4e800021 .~......|...N..!
000400f0: 38600000 80010024 7c0803a6 bb61000c 8`.....$|....a..
=>go 40004
## Starting application at 0x00040004 ...
Hello World
argc = 1
argv[0] = "40004"
argv[1] = "<NULL>"
Hit any key to exit ...
## Application terminated, rc = 0x0
=>

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/*
* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Andreas Heppel <aheppel@sysgo.de>
* (C) Copyright 2001 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <mpc106.h>
#include <mk48t59.h>
#include <74xx_7xx.h>
#include <ns87308.h>
#include <video_fb.h>
/*---------------------------------------------------------------------------*/
/*
* Get Bus clock frequency
*/
ulong bab7xx_get_bus_freq (void)
{
/*
* The GPIO Port 1 on BAB7xx reflects the bus speed.
*/
volatile struct GPIO *gpio = (struct GPIO *)(CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
unsigned char data = gpio->dta1;
if (data & 0x02)
return 66666666;
return 83333333;
}
/*---------------------------------------------------------------------------*/
/*
* Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
*/
ulong bab7xx_get_gclk_freq (void)
{
static const int pllratio_to_factor[] = {
00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00,
};
return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10);
}
/*----------------------------------------------------------------------------*/
int checkcpu (void)
{
uint pvr = get_pvr();
printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF);
printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq()/1000000,
bab7xx_get_bus_freq()/1000000);
return (0);
}
/* ------------------------------------------------------------------------- */
int checkboard (void)
{
#ifdef CFG_ADDRESS_MAP_A
puts ("Board: ELTEC BAB7xx PReP\n");
#else
puts ("Board: ELTEC BAB7xx CHRP\n");
#endif
return (0);
}
/* ------------------------------------------------------------------------- */
int checkflash (void)
{
/* TODO: XXX XXX XXX */
printf ("2 MB ## Test not implemented yet ##\n");
return (0);
}
/* ------------------------------------------------------------------------- */
static unsigned int mpc106_read_cfg_dword (unsigned int reg)
{
unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
out32r(MPC106_REG_ADDR, reg_addr);
return (in32r(MPC106_REG_DATA | (reg & 0x3)));
}
/* ------------------------------------------------------------------------- */
long int dram_size (int board_type)
{
/* No actual initialisation to do - done when setting up
* PICRs MCCRs ME/SARs etc in ram_init.S.
*/
register unsigned long i, msar1, mear1, memSize;
#if defined(CFG_MEMTEST)
register unsigned long reg;
printf("Testing DRAM\n");
/* write each mem addr with it's address */
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
*reg = reg;
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
{
if (*reg != reg)
return -1;
}
#endif
/*
* Since MPC106 memory controller chip has already been set to
* control all memory, just read and interpret its memory boundery register.
*/
memSize = 0;
msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
do
{
if (i & 0x01) /* is bank enabled ? */
memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
msar1 >>= 8;
mear1 >>= 8;
i >>= 1;
} while (i);
return (memSize * 0x100000);
}
/* ------------------------------------------------------------------------- */
long int initdram(int board_type)
{
return dram_size(board_type);
}
/* ------------------------------------------------------------------------- */
void after_reloc (ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Jump to the main U-Boot board init code
*/
board_init_r(gd, dest_addr);
}
/* ------------------------------------------------------------------------- */
/*
* do_reset is done here because in this case it is board specific, since the
* 7xx CPUs can only be reset by external HW (the RTC in this case).
*/
void
do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
#if defined(CONFIG_RTC_MK48T59)
/* trigger watchdog immediately */
rtc_set_watchdog(1, RTC_WD_RB_16TH);
#else
#error "You must define the macro CONFIG_RTC_MK48T59."
#endif
}
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_WATCHDOG)
/*
* Since the 7xx CPUs don't have an internal watchdog, this function is
* board specific. We use the RTC here.
*/
void watchdog_reset(void)
{
#if defined(CONFIG_RTC_MK48T59)
/* we use a 32 sec watchdog timer */
rtc_set_watchdog(8, RTC_WD_RB_4);
#else
#error "You must define the macro CONFIG_RTC_MK48T59."
#endif
}
#endif /* CONFIG_WATCHDOG */
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CONSOLE_EXTRA_INFO
extern GraphicDevice smi;
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
switch (line_number)
{
case 1:
sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz",
(get_pvr() >> 8) & 0xFF,
get_pvr() & 0xFF,
bab7xx_get_gclk_freq()/1000000,
bab7xx_get_bus_freq()/1000000);
return;
case 2:
sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
dram_size(0)/0x100000,
flash_init()/0x100000);
return;
case 3:
sprintf (info, " %s", smi.modeIdent);
return;
}
/* no more info lines */
*info = 0;
return;
}
#endif
/*---------------------------------------------------------------------------*/

189
board/eltec/elppc/elppc.c
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/*
* (C) Copyright 2002 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <mpc106.h>
#include <video_fb.h>
/* ------------------------------------------------------------------------- */
int checkboard (void)
{
puts ("Board: ELTEC PowerPC\n");
return (0);
}
/* ------------------------------------------------------------------------- */
int checkflash (void)
{
/* TODO */
printf ("Test not implemented !\n");
return (0);
}
/* ------------------------------------------------------------------------- */
static unsigned int mpc106_read_cfg_dword (unsigned int reg)
{
unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
out32r(MPC106_REG_ADDR, reg_addr);
return (in32r(MPC106_REG_DATA | (reg & 0x3)));
}
/* ------------------------------------------------------------------------- */
long int dram_size (int board_type)
{
/*
* No actual initialisation to do - done when setting up
* PICRs MCCRs ME/SARs etc in asm_init.S.
*/
register unsigned long i, msar1, mear1, memSize;
#if defined(CFG_MEMTEST)
register unsigned long reg;
printf("Testing DRAM\n");
/* write each mem addr with it's address */
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
*reg = reg;
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
{
if (*reg != reg)
return -1;
}
#endif
/*
* Since MPC107 memory controller chip has already been set to
* control all memory, just read and interpret its memory boundery register.
*/
memSize = 0;
msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
do
{
if (i & 0x01) /* is bank enabled ? */
memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
msar1 >>= 8;
mear1 >>= 8;
i >>= 1;
} while (i);
return (memSize * 0x100000);
}
/* ------------------------------------------------------------------------- */
long int initdram(int board_type)
{
return dram_size(board_type);
}
/* ------------------------------------------------------------------------- */
/*
* The BAB 911 can be reset by writing bit 0 of the Processor Initialization
* Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
* Memory Block).
*/
void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
out8(MPC107_EUMB_PI, 1);
}
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_WATCHDOG)
/*
* Since the 7xx CPUs don't have an internal watchdog, this function is
* board specific.
*/
void watchdog_reset(void)
{
}
#endif /* CONFIG_WATCHDOG */
/* ------------------------------------------------------------------------- */
void after_reloc (ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Jump to the main U-Boot board init code
*/
board_init_r(gd, dest_addr);
}
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CONSOLE_EXTRA_INFO
extern GraphicDevice smi;
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
switch (line_number)
{
case 1:
sprintf (info," MPC7xx V%d.%d at %d / %d MHz",
(get_pvr() >> 8) & 0xFF,
get_pvr() & 0xFF,
400,
100);
return;
case 2:
sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
dram_size(0)/0x100000,
flash_init()/0x100000);
return;
case 3:
sprintf (info, " %s", smi.modeIdent);
return;
}
/* no more info lines */
*info = 0;
return;
}
#endif

36
board/ep8260/config.mk
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#
# (C) Copyright 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# EP8260 boards
#
# This should be equal to the CFG_FLASH_BASE define in config_ep8260.h
# for the "final" configuration, with U-Boot in flash, or the address
# in RAM where U-Boot is loaded at for debugging.
#
#TEXT_BASE = 0x00100000
#TEXT_BASE = 0xFF000000
TEXT_BASE = 0xFFF00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)

437
board/evb64260/evb64260.c
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/*
* (C) Copyright 2001
* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* evb64260.c - main board support/init for the Galileo Eval board.
*/
#include <common.h>
#include <74xx_7xx.h>
#include <galileo/memory.h>
#include <galileo/pci.h>
#include <galileo/gt64260R.h>
#include <net.h>
#include <asm/io.h>
#include "eth.h"
#include "mpsc.h"
#include "i2c.h"
#include "64260.h"
#ifdef CONFIG_ZUMA_V2
extern void zuma_mbox_init(void);
#endif
#undef DEBUG
#define MAP_PCI
#ifdef DEBUG
#define DP(x) x
#else
#define DP(x)
#endif
/* ------------------------------------------------------------------------- */
/* this is the current GT register space location */
/* it starts at CFG_DFL_GT_REGS but moves later to CFG_GT_REGS */
/* Unfortunately, we cant change it while we are in flash, so we initialize it
* to the "final" value. This means that any debug_led calls before
* board_pre_init wont work right (like in cpu_init_f).
* See also my_remap_gt_regs below. (NTL)
*/
unsigned int INTERNAL_REG_BASE_ADDR = CFG_GT_REGS;
/* ------------------------------------------------------------------------- */
/*
* This is a version of the GT register space remapping function that
* doesn't touch globals (meaning, it's ok to run from flash.)
*
* Unfortunately, this has the side effect that a writable
* INTERNAL_REG_BASE_ADDR is impossible. Oh well.
*/
void
my_remap_gt_regs(u32 cur_loc, u32 new_loc)
{
u32 temp;
/* check and see if it's already moved */
temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
if ((temp & 0xffff) == new_loc >> 20)
return;
temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
0xffff0000) | (new_loc >> 20);
out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
}
static void
gt_pci_config(void)
{
/* move PCI stuff out of the way - NTL */
/* map PCI Host 0 */
pciMapSpace(PCI_HOST0, PCI_REGION0, CFG_PCI0_0_MEM_SPACE,
CFG_PCI0_0_MEM_SPACE, CFG_PCI0_MEM_SIZE);
pciMapSpace(PCI_HOST0, PCI_REGION1, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION2, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION3, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_IO, CFG_PCI0_IO_SPACE_PCI,
CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE);
/* map PCI Host 1 */
pciMapSpace(PCI_HOST1, PCI_REGION0, CFG_PCI1_0_MEM_SPACE,
CFG_PCI1_0_MEM_SPACE, CFG_PCI1_MEM_SIZE);
pciMapSpace(PCI_HOST1, PCI_REGION1, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION2, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION3, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_IO, CFG_PCI1_IO_SPACE_PCI,
CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE);
/* PCI interface settings */
GT_REG_WRITE(PCI_0TIMEOUT_RETRY, 0xffff);
GT_REG_WRITE(PCI_1TIMEOUT_RETRY, 0xffff);
GT_REG_WRITE(PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffff80e);
GT_REG_WRITE(PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffff80e);
}
/* Setup CPU interface paramaters */
static void
gt_cpu_config(void)
{
cpu_t cpu = get_cpu_type();
ulong tmp;
/* cpu configuration register */
tmp = GTREGREAD(CPU_CONFIGURATION);
/* set the AACK delay bit
* see Res#14 */
tmp |= CPU_CONF_AACK_DELAY;
tmp &= ~CPU_CONF_AACK_DELAY_2; /* New RGF */
/* Galileo claims this is necessary for all busses >= 100 MHz */
tmp |= CPU_CONF_FAST_CLK;
if (cpu == CPU_750CX) {
tmp &= ~CPU_CONF_DP_VALID; /* Safer, needed for CXe. RGF */
tmp &= ~CPU_CONF_AP_VALID;
} else {
tmp |= CPU_CONF_DP_VALID;
tmp |= CPU_CONF_AP_VALID;
}
/* this only works with the MPX bus */
tmp &= ~CPU_CONF_RD_OOO; /* Safer RGF */
tmp |= CPU_CONF_PIPELINE;
tmp |= CPU_CONF_TA_DELAY;
GT_REG_WRITE(CPU_CONFIGURATION, tmp);
/* CPU master control register */
tmp = GTREGREAD(CPU_MASTER_CONTROL);
tmp |= CPU_MAST_CTL_ARB_EN;
if ((cpu == CPU_7400) ||
(cpu == CPU_7410) ||
(cpu == CPU_7450)) {
tmp |= CPU_MAST_CTL_CLEAN_BLK;
tmp |= CPU_MAST_CTL_FLUSH_BLK;
} else {
/* cleanblock must be cleared for CPUs
* that do not support this command
* see Res#1 */
tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
}
GT_REG_WRITE(CPU_MASTER_CONTROL, tmp);
}
/*
* board_pre_init.
*
* set up gal. device mappings, etc.
*/
int board_pre_init (void)
{
uchar sram_boot = 0;
/*
* set up the GT the way the kernel wants it
* the call to move the GT register space will obviously
* fail if it has already been done, but we're going to assume
* that if it's not at the power-on location, it's where we put
* it last time. (huber)
*/
my_remap_gt_regs(CFG_DFL_GT_REGS, CFG_GT_REGS);
gt_pci_config();
/* mask all external interrupt sources */
GT_REG_WRITE(CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
GT_REG_WRITE(CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
GT_REG_WRITE(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
GT_REG_WRITE(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
GT_REG_WRITE(PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
GT_REG_WRITE(PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
GT_REG_WRITE(CPU_INT_0_MASK, 0);
GT_REG_WRITE(CPU_INT_1_MASK, 0);
GT_REG_WRITE(CPU_INT_2_MASK, 0);
GT_REG_WRITE(CPU_INT_3_MASK, 0);
/* now, onto the configuration */
GT_REG_WRITE(SDRAM_CONFIGURATION, CFG_SDRAM_CONFIG);
/* ----- DEVICE BUS SETTINGS ------ */
/*
* EVB
* 0 - SRAM
* 1 - RTC
* 2 - UART
* 3 - Flash
* boot - BootCS
*
* Zuma
* 0 - Flash
* boot - BootCS
*/
/*
* the dual 7450 module requires burst access to the boot
* device, so the serial rom copies the boot device to the
* on-board sram on the eval board, and updates the correct
* registers to boot from the sram. (device0)
*/
#ifdef CONFIG_ZUMA_V2
/* Zuma has no SRAM */
sram_boot = 0;
#else
if (memoryGetDeviceBaseAddress(DEVICE0) && 0xfff00000 == CFG_MONITOR_BASE)
sram_boot = 1;
#endif
if (!sram_boot)
memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
memoryMapDeviceSpace(DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
memoryMapDeviceSpace(DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE);
memoryMapDeviceSpace(DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE);
/* configure device timing */
#ifdef CFG_DEV0_PAR
if (!sram_boot)
GT_REG_WRITE(DEVICE_BANK0PARAMETERS, CFG_DEV0_PAR);
#endif
#ifdef CFG_DEV1_PAR
GT_REG_WRITE(DEVICE_BANK1PARAMETERS, CFG_DEV1_PAR);
#endif
#ifdef CFG_DEV2_PAR
GT_REG_WRITE(DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
#endif
#ifdef CFG_32BIT_BOOT_PAR
/* detect if we are booting from the 32 bit flash */
if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
/* 32 bit boot flash */
GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR);
GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_32BIT_BOOT_PAR);
} else {
/* 8 bit boot flash */
GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR);
GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
}
#else
/* 8 bit boot flash only */
GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
#endif
gt_cpu_config();
/* MPP setup */
GT_REG_WRITE(MPP_CONTROL0, CFG_MPP_CONTROL_0);
GT_REG_WRITE(MPP_CONTROL1, CFG_MPP_CONTROL_1);
GT_REG_WRITE(MPP_CONTROL2, CFG_MPP_CONTROL_2);
GT_REG_WRITE(MPP_CONTROL3, CFG_MPP_CONTROL_3);
GT_REG_WRITE(GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL);
GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, CFG_SERIAL_PORT_MUX);
return 0;
}
/* various things to do after relocation */
int misc_init_r (void)
{
icache_enable();
#ifdef CFG_L2
l2cache_enable();
#endif
#ifdef CONFIG_MPSC
mpsc_init2();
#endif
#ifdef CONFIG_ZUMA_V2
zuma_mbox_init();
#endif
return (0);
}
void
after_reloc(gd_t *gd, ulong dest_addr)
{
/* check to see if we booted from the sram. If so, move things
* back to the way they should be. (we're running from main
* memory at this point now */
if (memoryGetDeviceBaseAddress(DEVICE0) == CFG_MONITOR_BASE) {
memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
memoryMapDeviceSpace(BOOT_DEVICE, CFG_FLASH_BASE, _1M);
}
/* now, jump to the main U-Boot board init code */
board_init_r (gd, dest_addr);
/* NOTREACHED */
}
/* ------------------------------------------------------------------------- */
/*
* Check Board Identity:
*/
int
checkboard (void)
{
puts ("Board: " CFG_BOARD_NAME "\n");
return (0);
}
/* utility functions */
void
debug_led(int led, int mode)
{
#ifndef CONFIG_ZUMA_V2
volatile int *addr = NULL;
int dummy;
if (mode == 1) {
switch (led) {
case 0:
addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000);
break;
case 1:
addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000);
break;
case 2:
addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000);
break;
}
} else if (mode == 0) {
switch (led) {
case 0:
addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000);
break;
case 1:
addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000);
break;
case 2:
addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000);
break;
}
}
WRITE_CHAR(addr, 0);
dummy = *addr;
#endif /* CONFIG_ZUMA_V2 */
}
void
display_mem_map(void)
{
int i,j;
unsigned int base,size,width;
/* SDRAM */
printf("SDRAM\n");
for(i=0;i<=BANK3;i++) {
base = memoryGetBankBaseAddress(i);
size = memoryGetBankSize(i);
if(size !=0)
{
printf("BANK%d: base - 0x%08x\tsize - %dM bytes\n",i,base,size>>20);
}
}
/* CPU's PCI windows */
for(i=0;i<=PCI_HOST1;i++) {
printf("\nCPU's PCI %d windows\n", i);
base=pciGetSpaceBase(i,PCI_IO);
size=pciGetSpaceSize(i,PCI_IO);
printf(" IO: base - 0x%08x\tsize - %dM bytes\n",base,size>>20);
for(j=0;j<=PCI_REGION3;j++) {
base = pciGetSpaceBase(i,j);
size = pciGetSpaceSize(i,j);
printf("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n",j,base,
size>>20);
}
}
/* Devices */
printf("\nDEVICES\n");
for(i=0;i<=DEVICE3;i++) {
base = memoryGetDeviceBaseAddress(i);
size = memoryGetDeviceSize(i);
width= memoryGetDeviceWidth(i) * 8;
printf("DEV %d: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n",
i, base, size>>20, width);
}
/* Bootrom */
base = memoryGetDeviceBaseAddress(BOOT_DEVICE); /* Boot */
size = memoryGetDeviceSize(BOOT_DEVICE);
width= memoryGetDeviceWidth(BOOT_DEVICE) * 8;
printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n",
base, size>>20, width);
}

805
board/evb64260/flash.c
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/*
* (C) Copyright 2001
* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* flash.c - flash support for the 512k, 8bit boot flash on the GEVB
* most of this file was based on the existing U-Boot
* flash drivers.
*/
#include <common.h>
#include <mpc8xx.h>
#include <galileo/gt64260R.h>
#include <galileo/memory.h>
#include "intel_flash.h"
#define FLASH_ROM 0xFFFD /* unknown flash type */
#define FLASH_RAM 0xFFFE /* unknown flash type */
#define FLASH_MAN_UNKNOWN 0xFFFF0000
/* #define DEBUG */
/* #define FLASH_ID_OVERRIDE */ /* Hack to set type to 040B if ROM emulator is installed.
* Can be used to program a ROM in circuit if a programmer
* is not available by swapping the rom out. */
/* Intel flash commands */
int flash_erase_intel(flash_info_t *info, int s_first, int s_last);
int write_word_intel(bank_addr_t addr, bank_word_t value);
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (int portwidth, vu_long *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
static void flash_get_offsets (ulong base, flash_info_t *info);
/*-----------------------------------------------------------------------
*/
unsigned long
flash_init (void)
{
unsigned int i;
unsigned long size_b0 = 0, size_b1 = 0;
unsigned long base, flash_size;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* the boot flash */
base = CFG_FLASH_BASE;
size_b0 = flash_get_size(1, (vu_long *)base, &flash_info[0]);
printf("[%ldkB@%lx] ", size_b0/1024, base);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n",
base, size_b0, size_b0<<20);
}
base = memoryGetDeviceBaseAddress(CFG_EXTRA_FLASH_DEVICE);
for(i=1;i<CFG_MAX_FLASH_BANKS;i++) {
unsigned long size = flash_get_size(CFG_EXTRA_FLASH_WIDTH, (vu_long *)base, &flash_info[i]);
printf("[%ldMB@%lx] ", size>>20, base);
if (flash_info[i].flash_id == FLASH_UNKNOWN) {
if(i==1) {
printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n",
base, size_b1, size_b1<<20);
}
break;
}
size_b1+=size;
base+=size;
}
flash_size = size_b0 + size_b1;
return flash_size;
}
/*-----------------------------------------------------------------------
*/
static void
flash_get_offsets (ulong base, flash_info_t *info)
{
int i;
int sector_size;
if(!info->sector_count) return;
/* set up sector start address table */
switch(info->flash_id & FLASH_TYPEMASK) {
case FLASH_AM040:
case FLASH_28F128J3A:
case FLASH_28F640J3A:
case FLASH_RAM:
/* this chip has uniformly spaced sectors */
sector_size=info->size/info->sector_count;
for (i = 0; i < info->sector_count; i++)
info->start[i] = base + (i * sector_size);
break;
default:
if (info->flash_id & FLASH_BTYPE) {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00008000;
info->start[2] = base + 0x0000C000;
info->start[3] = base + 0x00010000;
for (i = 4; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00020000) - 0x00060000;
}
} else {
/* set sector offsets for top boot block type */
i = info->sector_count - 1;
info->start[i--] = base + info->size - 0x00008000;
info->start[i--] = base + info->size - 0x0000C000;
info->start[i--] = base + info->size - 0x00010000;
for (; i >= 0; i--) {
info->start[i] = base + i * 0x00020000;
}
}
}
}
/*-----------------------------------------------------------------------
*/
void
flash_print_info (flash_info_t *info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_INTEL: printf ("INTEL "); break;
default: printf ("Unknown Vendor "); break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_AM040:
printf ("AM29LV040B (4 Mbit, bottom boot sect)\n");
break;
case FLASH_AM400B:
printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
break;
case FLASH_AM400T:
printf ("AM29LV400T (4 Mbit, top boot sector)\n");
break;
case FLASH_AM800B:
printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
break;
case FLASH_AM800T:
printf ("AM29LV800T (8 Mbit, top boot sector)\n");
break;
case FLASH_AM160B:
printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
break;
case FLASH_AM160T:
printf ("AM29LV160T (16 Mbit, top boot sector)\n");
break;
case FLASH_AM320B:
printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
break;
case FLASH_AM320T:
printf ("AM29LV320T (32 Mbit, top boot sector)\n");
break;
case FLASH_28F640J3A:
printf ("28F640J3A (64 Mbit)\n");
break;
case FLASH_28F128J3A:
printf ("28F128J3A (128 Mbit)\n");
break;
case FLASH_ROM:
printf ("ROM\n");
break;
case FLASH_RAM:
printf ("RAM\n");
break;
default:
printf ("Unknown Chip Type\n");
break;
}
puts (" Size: ");
print_size (info->size, "");
printf (" in %d Sectors\n", info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
return;
}
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------
*/
/*
* The following code cannot be run from FLASH!
*/
static inline void flash_cmd(int width, volatile unsigned char *addr, int offset, unsigned char cmd)
{
/* supports 1x8, 1x16, and 2x16 */
/* 2x8 and 4x8 are not supported */
if(width==4) {
/* assuming chips are in 16 bit mode */
/* 2x16 */
unsigned long cmd32=(cmd<<16)|cmd;
*(volatile unsigned long *)(addr+offset*2)=cmd32;
} else {
/* 1x16 or 1x8 */
*(volatile unsigned char *)(addr+offset)=cmd;
}
}
static ulong
flash_get_size (int portwidth, vu_long *addr, flash_info_t *info)
{
short i;
volatile unsigned char *caddr = (unsigned char *)addr;
volatile unsigned short *saddr = (unsigned short *)addr;
volatile unsigned long *laddr = (unsigned long *)addr;
char old[2], save;
ulong id, manu, base = (ulong)addr;
info->portwidth=portwidth;
save = *caddr;
flash_cmd(portwidth,caddr,0,0xf0);
flash_cmd(portwidth,caddr,0,0xf0);
udelay(10);
old[0] = caddr[0];
old[1] = caddr[1];
if(old[0]!=0xf0) {
flash_cmd(portwidth,caddr,0,0xf0);
flash_cmd(portwidth,caddr,0,0xf0);
udelay(10);
if(*caddr==0xf0) {
/* this area is ROM */
*caddr=save;
#ifndef FLASH_ID_OVERRIDE
info->flash_id = FLASH_ROM + FLASH_MAN_UNKNOWN;
info->sector_count = 8;
info->size = 0x80000;
#else
info->flash_id = FLASH_MAN_AMD + FLASH_AM040;
info->sector_count = 8;
info->size = 0x80000;
info->chipwidth=1;
#endif
flash_get_offsets(base, info);
return info->size;
}
} else {
*caddr=0;
udelay(10);
if(*caddr==0) {
/* this area is RAM */
*caddr=save;
info->flash_id = FLASH_RAM + FLASH_MAN_UNKNOWN;
info->sector_count = 8;
info->size = 0x80000;
flash_get_offsets(base, info);
return info->size;
}
flash_cmd(portwidth,caddr,0,0xf0);
udelay(10);
}
/* Write auto select command: read Manufacturer ID */
flash_cmd(portwidth,caddr,0x555,0xAA);
flash_cmd(portwidth,caddr,0x2AA,0x55);
flash_cmd(portwidth,caddr,0x555,0x90);
udelay(10);
if ((caddr[0] == old[0]) &&
(caddr[1] == old[1])) {
/* this area is ROM */
#ifndef FLASH_ID_OVERRIDE
info->flash_id = FLASH_ROM + FLASH_MAN_UNKNOWN;
info->sector_count = 8;
info->size = 0x80000;
#else
info->flash_id = FLASH_MAN_AMD + FLASH_AM040;
info->sector_count = 8;
info->size = 0x80000;
info->chipwidth=1;
#endif
flash_get_offsets(base, info);
return info->size;
#ifdef DEBUG
} else {
printf("%px%d: %02x:%02x -> %02x:%02x\n",
caddr, portwidth, old[0], old[1],
caddr[0], caddr[1]);
#endif
}
switch(portwidth) {
case 1:
manu = caddr[0];
manu |= manu<<16;
id = caddr[1];
break;
case 2:
manu = saddr[0];
manu |= manu<<16;
id = saddr[1];
id |= id<<16;
break;
case 4:
manu = laddr[0];
id = laddr[1];
break;
default:
id = manu = -1;
break;
}
#ifdef DEBUG
printf("\n%08lx:%08lx:%08lx\n", base, manu, id);
printf("%08lx %08lx %08lx %08lx\n",
laddr[0],laddr[1],laddr[2],laddr[3]);
#endif
switch (manu) {
case AMD_MANUFACT:
info->flash_id = FLASH_MAN_AMD;
break;
case FUJ_MANUFACT:
info->flash_id = FLASH_MAN_FUJ;
break;
case INTEL_MANUFACT:
info->flash_id = FLASH_MAN_INTEL;
break;
default:
printf("Unknown Mfr [%08lx]:%08lx\n", manu, id);
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
return (0); /* no or unknown flash */
}
switch (id) {
case AMD_ID_LV400T:
info->flash_id += FLASH_AM400T;
info->sector_count = 11;
info->size = 0x00100000;
info->chipwidth=1;
break; /* => 1 MB */
case AMD_ID_LV400B:
info->flash_id += FLASH_AM400B;
info->sector_count = 11;
info->size = 0x00100000;
info->chipwidth=1;
break; /* => 1 MB */
case AMD_ID_LV800T:
info->flash_id += FLASH_AM800T;
info->sector_count = 19;
info->size = 0x00200000;
info->chipwidth=1;
break; /* => 2 MB */
case AMD_ID_LV800B:
info->flash_id += FLASH_AM800B;
info->sector_count = 19;
info->size = 0x00200000;
info->chipwidth=1;
break; /* => 2 MB */
case AMD_ID_LV160T:
info->flash_id += FLASH_AM160T;
info->sector_count = 35;
info->size = 0x00400000;
info->chipwidth=1;
break; /* => 4 MB */
case AMD_ID_LV160B:
info->flash_id += FLASH_AM160B;
info->sector_count = 35;
info->size = 0x00400000;
info->chipwidth=1;
break; /* => 4 MB */
#if 0 /* enable when device IDs are available */
case AMD_ID_LV320T:
info->flash_id += FLASH_AM320T;
info->sector_count = 67;
info->size = 0x00800000;
break; /* => 8 MB */
case AMD_ID_LV320B:
info->flash_id += FLASH_AM320B;
info->sector_count = 67;
info->size = 0x00800000;
break; /* => 8 MB */
#endif
case AMD_ID_LV040B:
info->flash_id += FLASH_AM040;
info->sector_count = 8;
info->size = 0x80000;
info->chipwidth=1;
break;
case INTEL_ID_28F640J3A:
info->flash_id += FLASH_28F640J3A;
info->sector_count = 64;
info->size = 128*1024 * 64; /* 128kbytes x 64 blocks */
info->chipwidth=2;
if(portwidth==4) info->size*=2; /* 2x16 */
break;
case INTEL_ID_28F128J3A:
info->flash_id += FLASH_28F128J3A;
info->sector_count = 128;
info->size = 128*1024 * 128; /* 128kbytes x 128 blocks */
info->chipwidth=2;
if(portwidth==4) info->size*=2; /* 2x16 */
break;
default:
printf("Unknown id %lx:[%lx]\n", manu, id);
info->flash_id = FLASH_UNKNOWN;
info->chipwidth=1;
return (0); /* => no or unknown flash */
}
flash_get_offsets(base, info);
#if 0
/* set up sector start address table */
if (info->flash_id & FLASH_AM040) {
/* this chip has uniformly spaced sectors */
for (i = 0; i < info->sector_count; i++)
info->start[i] = base + (i * 0x00010000);
} else if (info->flash_id & FLASH_BTYPE) {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00008000;
info->start[2] = base + 0x0000C000;
info->start[3] = base + 0x00010000;
for (i = 4; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00020000) - 0x00060000;
}
} else {
/* set sector offsets for top boot block type */
i = info->sector_count - 1;
info->start[i--] = base + info->size - 0x00008000;
info->start[i--] = base + info->size - 0x0000C000;
info->start[i--] = base + info->size - 0x00010000;
for (; i >= 0; i--) {
info->start[i] = base + i * 0x00020000;
}
}
#endif
/* check for protected sectors */
for (i = 0; i < info->sector_count; i++) {
/* read sector protection at sector address, (A7 .. A0)=0x02 */
/* D0 = 1 if protected */
caddr = (volatile unsigned char *)(info->start[i]);
saddr = (volatile unsigned short *)(info->start[i]);
laddr = (volatile unsigned long *)(info->start[i]);
if(portwidth==1)
info->protect[i] = caddr[2] & 1;
else if(portwidth==2)
info->protect[i] = saddr[2] & 1;
else
info->protect[i] = laddr[2] & 1;
}
/*
* Prevent writes to uninitialized FLASH.
*/
if (info->flash_id != FLASH_UNKNOWN) {
caddr = (volatile unsigned char *)info->start[0];
flash_cmd(portwidth,caddr,0,0xF0); /* reset bank */
}
return (info->size);
}
/* TODO: 2x16 unsupported */
int
flash_erase (flash_info_t *info, int s_first, int s_last)
{
volatile unsigned char *addr = (char *)(info->start[0]);
int flag, prot, sect, l_sect;
ulong start, now, last;
/* TODO: 2x16 unsupported */
if(info->portwidth==4) return 1;
if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 1;
if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
for (sect = s_first; sect<=s_last; sect++) {
int sector_size=info->size/info->sector_count;
addr = (char *)(info->start[sect]);
memset((void *)addr, 0, sector_size);
}
return 0;
}
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
if ((info->flash_id&FLASH_VENDMASK) == FLASH_MAN_INTEL) {
return flash_erase_intel(info,
(unsigned short)s_first,
(unsigned short)s_last);
}
#if 0
if ((info->flash_id == FLASH_UNKNOWN) ||
(info->flash_id > FLASH_AMD_COMP)) {
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return 1;
}
#endif
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
flash_cmd(info->portwidth,addr,0x555,0xAA);
flash_cmd(info->portwidth,addr,0x2AA,0x55);
flash_cmd(info->portwidth,addr,0x555,0x80);
flash_cmd(info->portwidth,addr,0x555,0xAA);
flash_cmd(info->portwidth,addr,0x2AA,0x55);
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
addr = (char *)(info->start[sect]);
flash_cmd(info->portwidth,addr,0,0x30);
l_sect = sect;
}
}
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
/*
* We wait for the last triggered sector
*/
if (l_sect < 0)
goto DONE;
start = get_timer (0);
last = start;
addr = (volatile unsigned char *)(info->start[l_sect]);
/* broken for 2x16: TODO */
while ((addr[0] & 0x80) != 0x80) {
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
putc ('.');
last = now;
}
}
DONE:
/* reset to read mode */
addr = (volatile unsigned char *)info->start[0];
flash_cmd(info->portwidth,addr,0,0xf0);
flash_cmd(info->portwidth,addr,0,0xf0);
printf (" done\n");
return 0;
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
/* broken for 2x16: TODO */
int
write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
ulong cp, wp, data;
int i, l, rc;
if(info->portwidth==4) return 1;
if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 0;
if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
memcpy((void *)addr, src, cnt);
return 0;
}
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
for (; i<4 && cnt>0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while (cnt >= 4) {
data = 0;
for (i=0; i<4; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 4;
cnt -= 4;
}
if (cnt == 0) {
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i<4; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
return (write_word(info, wp, data));
}
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
/* broken for 2x16: TODO */
static int
write_word (flash_info_t *info, ulong dest, ulong data)
{
volatile unsigned char *addr = (char *)(info->start[0]);
ulong start;
int flag, i;
if(info->portwidth==4) return 1;
if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 1;
if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
*(unsigned long *)dest=data;
return 0;
}
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
unsigned short low = data & 0xffff;
unsigned short hi = (data >> 16) & 0xffff;
int ret = write_word_intel((bank_addr_t)dest, hi);
if (!ret) ret = write_word_intel((bank_addr_t)(dest+2), low);
return ret;
}
/* Check if Flash is (sufficiently) erased */
if ((*((vu_long *)dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
/* first, perform an unlock bypass command to speed up flash writes */
addr[0x555] = 0xAA;
addr[0x2AA] = 0x55;
addr[0x555] = 0x20;
/* write each byte out */
for (i = 0; i < 4; i++) {
char *data_ch = (char *)&data;
addr[0] = 0xA0;
*(((char *)dest)+i) = data_ch[i];
udelay(10); /* XXX */
}
/* we're done, now do an unlock bypass reset */
addr[0] = 0x90;
addr[0] = 0x00;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
return (0);
}

457
board/evb64260/memory.c
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@ -0,0 +1,457 @@
/* Memory.c - Memory mappings and remapping functions */
/* Copyright - Galileo technology. */
/* modified by Josh Huber to clean some things up, and
* fit it into the U-Boot framework */
#include <galileo/core.h>
#include <galileo/memory.h>
/********************************************************************
* memoryGetBankBaseAddress - Gets the base address of a memory bank
* - If the memory bank size is 0 then this base address has no meaning!!!
*
*
* INPUTS: MEMORY_BANK bank - The bank we ask for its base Address.
* OUTPUT: N/A
* RETURNS: Memory bank base address.
*********************************************************************/
static unsigned long memoryGetBankRegOffset(MEMORY_BANK bank)
{
switch (bank)
{
case BANK0:
return SCS_0_LOW_DECODE_ADDRESS;
case BANK1:
return SCS_1_LOW_DECODE_ADDRESS;
case BANK2:
return SCS_2_LOW_DECODE_ADDRESS;
case BANK3:
return SCS_3_LOW_DECODE_ADDRESS;
}
return SCS_0_LOW_DECODE_ADDRESS; /* default value */
}
unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank)
{
unsigned int base;
unsigned int regOffset=memoryGetBankRegOffset(bank);
GT_REG_READ(regOffset,&base);
base = base << 20;
return base;
}
/********************************************************************
* memoryGetDeviceBaseAddress - Gets the base address of a device.
* - If the device size is 0 then this base address has no meaning!!!
*
*
* INPUT: DEVICE device - The device we ask for its base address.
* OUTPUT: N/A
* RETURNS: Device base address.
*********************************************************************/
static unsigned int memoryGetDeviceRegOffset(DEVICE device)
{
switch (device)
{
case DEVICE0:
return CS_0_LOW_DECODE_ADDRESS;
case DEVICE1:
return CS_1_LOW_DECODE_ADDRESS;
case DEVICE2:
return CS_2_LOW_DECODE_ADDRESS;
case DEVICE3:
return CS_3_LOW_DECODE_ADDRESS;
case BOOT_DEVICE:
return BOOTCS_LOW_DECODE_ADDRESS;
}
return CS_0_LOW_DECODE_ADDRESS; /* default value */
}
unsigned int memoryGetDeviceBaseAddress(DEVICE device)
{
unsigned int regBase;
unsigned int regEnd;
unsigned int regOffset=memoryGetDeviceRegOffset(device);
GT_REG_READ(regOffset, &regBase);
GT_REG_READ(regOffset+8, &regEnd);
if(regEnd<=regBase) return 0xffffffff; /* ERROR !!! */
regBase = regBase << 20;
return regBase;
}
/********************************************************************
* memoryGetBankSize - Returns the size of a memory bank.
*
*
* INPUT: MEMORY_BANK bank - The bank we ask for its size.
* OUTPUT: N/A
* RETURNS: Memory bank size.
*********************************************************************/
unsigned int memoryGetBankSize(MEMORY_BANK bank)
{
unsigned int size,base;
unsigned int highValue;
unsigned int highAddress=memoryGetBankRegOffset(bank)+8;
base = memoryGetBankBaseAddress(bank);
GT_REG_READ(highAddress,&highValue);
highValue = (highValue + 1) << 20;
if(base > highValue)
size=0;
else
size = highValue - base;
return size;
}
/********************************************************************
* memoryGetDeviceSize - Returns the size of a device memory space
*
*
* INPUT: DEVICE device - The device we ask for its base address.
* OUTPUT: N/A
* RETURNS: Size of a device memory space.
*********************************************************************/
unsigned int memoryGetDeviceSize(DEVICE device)
{
unsigned int size,base;
unsigned int highValue;
unsigned int highAddress=memoryGetDeviceRegOffset(device)+8;
base = memoryGetDeviceBaseAddress(device);
GT_REG_READ(highAddress,&highValue);
if (highValue == 0xfff)
{
size = (~base) + 1; /* what the heck is this? */
return size;
}
else
highValue = (highValue + 1) << 20;
if(base > highValue)
size=0;
else
size = highValue - base;
return size;
}
/********************************************************************
* memoryGetDeviceWidth - A device can be with: 1,2,4 or 8 Bytes data width.
* The width is determine in registers: 'Device Parameters'
* registers (0x45c, 0x460, 0x464, 0x468, 0x46c - for each device.
* at bits: [21:20].
*
* INPUT: DEVICE device - Device number
* OUTPUT: N/A
* RETURNS: Device width in Bytes (1,2,4 or 8), 0 if error had occurred.
*********************************************************************/
unsigned int memoryGetDeviceWidth(DEVICE device)
{
unsigned int width;
unsigned int regValue;
GT_REG_READ(DEVICE_BANK0PARAMETERS + device*4,&regValue);
width = (regValue & 0x00300000) >> 20;
switch (width)
{
case 0:
return 1;
case 1:
return 2;
case 2:
return 4;
case 3:
return 8;
default:
return 0;
}
}
bool memoryMapBank(MEMORY_BANK bank, unsigned int bankBase,unsigned int bankLength)
{
unsigned int low=0xfff;
unsigned int high=0x0;
unsigned int regOffset=memoryGetBankRegOffset(bank);
if(bankLength!=0) {
low = (bankBase >> 20) & 0xffff;
high=((bankBase+bankLength)>>20)-1;
}
#ifdef DEBUG
{
unsigned int oldLow, oldHigh;
GT_REG_READ(regOffset,&oldLow);
GT_REG_READ(regOffset+8,&oldHigh);
printf("b%d %x-%x->%x-%x\n", bank, oldLow, oldHigh, low, high);
}
#endif
GT_REG_WRITE(regOffset,low);
GT_REG_WRITE(regOffset+8,high);
return true;
}
bool memoryMapDeviceSpace(DEVICE device, unsigned int deviceBase,unsigned int deviceLength)
{
/* TODO: what are appropriate "unmapped" values? */
unsigned int low=0xfff;
unsigned int high=0x0;
unsigned int regOffset=memoryGetDeviceRegOffset(device);
if(deviceLength != 0) {
low=deviceBase>>20;
high=((deviceBase+deviceLength)>>20)-1;
} else {
/* big problems in here... */
/* this will HANG */
}
GT_REG_WRITE(regOffset,low);
GT_REG_WRITE(regOffset+8,high);
return true;
}
/********************************************************************
* memoryMapInternalRegistersSpace - Sets new base address for the internals
* registers.
*
* INPUTS: unsigned int internalRegBase - The new base address.
* RETURNS: true on success, false on failure
*********************************************************************/
bool memoryMapInternalRegistersSpace(unsigned int internalRegBase)
{
unsigned int currentValue;
unsigned int internalValue = internalRegBase;
internalRegBase = (internalRegBase >> 20);
GT_REG_READ(INTERNAL_SPACE_DECODE,&currentValue);
internalRegBase = (currentValue & 0xffff0000) | internalRegBase;
GT_REG_WRITE(INTERNAL_SPACE_DECODE,internalRegBase);
INTERNAL_REG_BASE_ADDR = internalValue;
return true;
}
/********************************************************************
* memoryGetInternalRegistersSpace - Gets internal registers Base Address.
*
* INPUTS: unsigned int internalRegBase - The new base address.
* RETURNS: true on success, false on failure
*********************************************************************/
unsigned int memoryGetInternalRegistersSpace(void)
{
return INTERNAL_REG_BASE_ADDR;
}
/********************************************************************
* memorySetProtectRegion - This function modifys one of the 8 regions with
* one of the three protection mode.
* - Be advised to check the spec before modifying them.
*
*
* Inputs: CPU_PROTECT_REGION - one of the eight regions.
* CPU_ACCESS - general access.
* CPU_WRITE - read only access.
* CPU_CACHE_PROTECT - chache access.
* we defining CPU because there is another protect from the pci SIDE.
* Returns: false if one of the parameters is wrong and true else
*********************************************************************/
bool memorySetProtectRegion(MEMORY_PROTECT_REGION region,
MEMORY_ACCESS memAccess,
MEMORY_ACCESS_WRITE memWrite,
MEMORY_CACHE_PROTECT cacheProtection,
unsigned int baseAddress,
unsigned int regionLength)
{
unsigned int protectHigh = baseAddress + regionLength;
if(regionLength == 0) /* closing the region */
{
GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,0x0000ffff);
GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,0);
return true;
}
baseAddress = (baseAddress & 0xfff00000) >> 20;
baseAddress = baseAddress | memAccess << 16 | memWrite << 17
| cacheProtection << 18;
GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,baseAddress);
protectHigh = (protectHigh & 0xfff00000) >> 20;
GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,protectHigh - 1);
return true;
}
/********************************************************************
* memorySetRegionSnoopMode - This function modifys one of the 4 regions which
* supports Cache Coherency.
*
*
* Inputs: SNOOP_REGION region - One of the four regions.
* SNOOP_TYPE snoopType - There is four optional Types:
* 1. No Snoop.
* 2. Snoop to WT region.
* 3. Snoop to WB region.
* 4. Snoop & Invalidate to WB region.
* unsigned int baseAddress - Base Address of this region.
* unsigned int topAddress - Top Address of this region.
* Returns: false if one of the parameters is wrong and true else
*********************************************************************/
bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
MEMORY_SNOOP_TYPE snoopType,
unsigned int baseAddress,
unsigned int regionLength)
{
unsigned int snoopXbaseAddress;
unsigned int snoopXtopAddress;
unsigned int data;
unsigned int snoopHigh = baseAddress + regionLength;
if( (region > MEM_SNOOP_REGION3) || (snoopType > MEM_SNOOP_WB) )
return false;
snoopXbaseAddress = SNOOP_BASE_ADDRESS_0 + 0x10 * region;
snoopXtopAddress = SNOOP_TOP_ADDRESS_0 + 0x10 * region;
if(regionLength == 0) /* closing the region */
{
GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
GT_REG_WRITE(snoopXtopAddress,0);
return true;
}
baseAddress = baseAddress & 0xffff0000;
data = (baseAddress >> 16) | snoopType << 16;
GT_REG_WRITE(snoopXbaseAddress,data);
snoopHigh = (snoopHigh & 0xfff00000) >> 20;
GT_REG_WRITE(snoopXtopAddress,snoopHigh - 1);
return true;
}
/********************************************************************
* memoryRemapAddress - This fubction used for address remapping.
*
*
* Inputs: regOffset: remap register
* remapValue :
* Returns: false if one of the parameters is erroneous,true otherwise.
*********************************************************************/
bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue)
{
unsigned int valueForReg;
valueForReg = (remapValue & 0xfff00000) >> 20;
GT_REG_WRITE(remapReg, valueForReg);
return true;
}
/********************************************************************
* memoryGetDeviceParam - This function used for getting device parameters from
* DEVICE BANK PARAMETERS REGISTER
*
*
* Inputs: - deviceParam: STRUCT with paramiters for DEVICE BANK
* PARAMETERS REGISTER
* - deviceNum : number of device
* Returns: false if one of the parameters is erroneous,true otherwise.
*********************************************************************/
bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum)
{
unsigned int valueOfReg;
unsigned int calcData;
GT_REG_READ(DEVICE_BANK0PARAMETERS + 4 * deviceNum, &valueOfReg);
calcData = (0x7 & valueOfReg) + ((0x400000 & valueOfReg) >> 19);
deviceParam -> turnOff = calcData; /* Turn Off */
calcData = ((0x78 & valueOfReg) >> 3) + ((0x800000 & valueOfReg) >> 19);
deviceParam -> acc2First = calcData; /* Access To First */
calcData = ((0x780 & valueOfReg) >> 7) + ((0x1000000 & valueOfReg) >> 20);
deviceParam -> acc2Next = calcData; /* Access To Next */
calcData = ((0x3800 & valueOfReg) >> 11) + ((0x2000000 & valueOfReg) >> 22);
deviceParam -> ale2Wr = calcData; /* Ale To Write */
calcData = ((0x1c000 & valueOfReg) >> 14) + ((0x4000000 & valueOfReg) >> 23);
deviceParam -> wrLow = calcData; /* Write Active */
calcData = ((0xe0000 & valueOfReg) >> 17) + ((0x8000000 & valueOfReg) >> 24);
deviceParam -> wrHigh = calcData; /* Write High */
calcData = ((0x300000 & valueOfReg) >> 20);
switch (calcData)
{
case 0:
deviceParam -> deviceWidth = 1; /* one Byte - 8-bit */
break;
case 1:
deviceParam -> deviceWidth = 2; /* two Bytes - 16-bit */
break;
case 2:
deviceParam -> deviceWidth = 4; /* four Bytes - 32-bit */
break;
case 3:
deviceParam -> deviceWidth = 8; /* eight Bytes - 64-bit */
break;
default:
deviceParam -> deviceWidth = 1;
break;
}
return true;
}
/********************************************************************
* memorySetDeviceParam - This function used for setting device parameters to
* DEVICE BANK PARAMETERS REGISTER
*
*
* Inputs: - deviceParam: STRUCT for store paramiters from DEVICE BANK
* PARAMETERS REGISTER
* - deviceNum : number of device
* Returns: false if one of the parameters is erroneous,true otherwise.
*********************************************************************/
bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum)
{
unsigned int valueForReg;
if((deviceParam -> turnOff >= 0xf) || (deviceParam -> acc2First >= 0x1f) ||
(deviceParam -> acc2Next >= 0x1f) || (deviceParam -> ale2Wr >= 0xf) ||
(deviceParam -> wrLow >= 0xf) || (deviceParam -> wrHigh >= 0xf))
return false;
valueForReg = (((deviceParam -> turnOff) & 0x7) |
(((deviceParam -> turnOff) & 0x8) << 19) |
(((deviceParam -> acc2First) & 0xf) << 3) |
(((deviceParam -> acc2First) & 0x10) << 19) |
(((deviceParam -> acc2Next) & 0xf) << 7) |
(((deviceParam -> acc2Next) & 0x10) << 20) |
(((deviceParam -> ale2Wr) & 0x7) << 11) |
(((deviceParam -> ale2Wr) & 0xf) << 22) |
(((deviceParam -> wrLow) & 0x7) << 14) |
(((deviceParam -> wrLow) & 0xf) << 23) |
(((deviceParam -> wrHigh) & 0x7) << 17) |
(((deviceParam -> wrHigh) & 0xf) << 24));
/* insert the device width: */
switch(deviceParam->deviceWidth)
{
case 1:
valueForReg = valueForReg | _8BIT;
break;
case 2:
valueForReg = valueForReg | _16BIT;
break;
case 4:
valueForReg = valueForReg | _32BIT;
break;
case 8:
valueForReg = valueForReg | _64BIT;
break;
default:
valueForReg = valueForReg | _8BIT;
break;
}
GT_REG_WRITE(DEVICE_BANK0PARAMETERS + 4 * deviceNum, valueForReg);
return true;
}

129
board/evb64260/u-boot.lds
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/*
* (C) Copyright 2001
* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/74xx_7xx/start.o (.text)
/* store the environment in a seperate sector in the boot flash */
/* . = env_offset; */
/* common/environment.o(.text) */
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

20
board/gth/README
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Written by Thomas.Lange@corelatus.com 010805
To make a system for gth that actually works ;-)
the variable TBASE needs to be set to 0,1 or 2
depending on location where image is supposed to
be started from.
E.g. make TBASE=1
0: Start from RAM, base 0
1: Start from flash_base + 0x10070
2: Start from flash_base + 0x30070
When using 1 or 2, the image is supposed to be launched
from miniboot that boots the first U-Boot image found in
flash.
For miniboot code, description, see www.opensource.se

57
mkconfig
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#!/bin/sh -e
# Script to create header files and links to configure
# U-Boot for a specific board.
#
# Parameters: Target Architecture CPU Board
#
# (C) 2002 DENX Software Engineering, Wolfgang Denk <wd@denx.de>
#
APPEND=no # Default: Create new config file
while [ $# -gt 0 ] ; do
case "$1" in
--) shift ; break ;;
-a) shift ; APPEND=yes ;;
*) break ;;
esac
done
[ $# -lt 4 ] && exit 1
[ $# -gt 5 ] && exit 1
echo "Configuring for $1 board..."
cd ./include
#
# Create link to architecture specific headers
#
rm -f asm
ln -s asm-$2 asm
rm -f asm-$2/arch
ln -s arch-$3 asm-$2/arch
#
# Create include file for Make
#
echo "ARCH = $2" > config.mk
echo "CPU = $3" >> config.mk
echo "BOARD = $4" >> config.mk
[ "$5" ] && echo "VENDOR = $5" >> config.mk
#
# Create board specific header file
#
if [ "$APPEND" = "yes" ] # Append to existing config file
then
echo >> config.h
else
> config.h # Create new config file
fi
echo "/* Automatically generated - do not edit */" >>config.h
echo "#include <configs/$1.h>" >>config.h
exit 0
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